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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/common/time-acorn.c | |
3 | * | |
4 | * Copyright (c) 1996-2000 Russell King. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * Changelog: | |
11 | * 24-Sep-1996 RMK Created | |
12 | * 10-Oct-1996 RMK Brought up to date with arch-sa110eval | |
13 | * 04-Dec-1997 RMK Updated for new arch/arm/time.c | |
14 | * 13=Jun-2004 DS Moved to arch/arm/common b/c shared w/CLPS7500 | |
15 | */ | |
16 | #include <linux/timex.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/interrupt.h> | |
19 | ||
20 | #include <asm/hardware.h> | |
21 | #include <asm/io.h> | |
22 | #include <asm/hardware/ioc.h> | |
23 | ||
24 | #include <asm/mach/time.h> | |
25 | ||
26 | unsigned long ioc_timer_gettimeoffset(void) | |
27 | { | |
28 | unsigned int count1, count2, status; | |
29 | long offset; | |
30 | ||
31 | ioc_writeb (0, IOC_T0LATCH); | |
32 | barrier (); | |
33 | count1 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8); | |
34 | barrier (); | |
35 | status = ioc_readb(IOC_IRQREQA); | |
36 | barrier (); | |
37 | ioc_writeb (0, IOC_T0LATCH); | |
38 | barrier (); | |
39 | count2 = ioc_readb(IOC_T0CNTL) | (ioc_readb(IOC_T0CNTH) << 8); | |
40 | ||
41 | offset = count2; | |
42 | if (count2 < count1) { | |
43 | /* | |
44 | * We have not had an interrupt between reading count1 | |
45 | * and count2. | |
46 | */ | |
47 | if (status & (1 << 5)) | |
48 | offset -= LATCH; | |
49 | } else if (count2 > count1) { | |
50 | /* | |
51 | * We have just had another interrupt between reading | |
52 | * count1 and count2. | |
53 | */ | |
54 | offset -= LATCH; | |
55 | } | |
56 | ||
57 | offset = (LATCH - offset) * (tick_nsec / 1000); | |
58 | return (offset + LATCH/2) / LATCH; | |
59 | } | |
60 | ||
61 | void __init ioctime_init(void) | |
62 | { | |
63 | ioc_writeb(LATCH & 255, IOC_T0LTCHL); | |
64 | ioc_writeb(LATCH >> 8, IOC_T0LTCHH); | |
65 | ioc_writeb(0, IOC_T0GO); | |
66 | } | |
67 | ||
68 | static irqreturn_t | |
69 | ioc_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
70 | { | |
71 | write_seqlock(&xtime_lock); | |
72 | timer_tick(regs); | |
73 | write_sequnlock(&xtime_lock); | |
74 | return IRQ_HANDLED; | |
75 | } | |
76 | ||
77 | static struct irqaction ioc_timer_irq = { | |
78 | .name = "timer", | |
79 | .flags = SA_INTERRUPT, | |
80 | .handler = ioc_timer_interrupt | |
81 | }; | |
82 | ||
83 | /* | |
84 | * Set up timer interrupt. | |
85 | */ | |
86 | static void __init ioc_timer_init(void) | |
87 | { | |
88 | ioctime_init(); | |
89 | setup_irq(IRQ_TIMER, &ioc_timer_irq); | |
90 | } | |
91 | ||
92 | struct sys_timer ioc_timer = { | |
93 | .init = ioc_timer_init, | |
94 | .offset = ioc_timer_gettimeoffset, | |
95 | }; | |
96 |