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002547b4 | 1 | /* |
4baa9922 | 2 | * arch/arm/include/asm/pgtable-nommu.h |
002547b4 RK |
3 | * |
4 | * Copyright (C) 1995-2002 Russell King | |
5 | * Copyright (C) 2004 Hyok S. Choi | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | #ifndef _ASMARM_PGTABLE_NOMMU_H | |
12 | #define _ASMARM_PGTABLE_NOMMU_H | |
13 | ||
14 | #ifndef __ASSEMBLY__ | |
15 | ||
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16 | #include <linux/slab.h> |
17 | #include <asm/processor.h> | |
18 | #include <asm/page.h> | |
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19 | |
20 | /* | |
21 | * Trivial page table functions. | |
22 | */ | |
23 | #define pgd_present(pgd) (1) | |
24 | #define pgd_none(pgd) (0) | |
25 | #define pgd_bad(pgd) (0) | |
26 | #define pgd_clear(pgdp) | |
27 | #define kern_addr_valid(addr) (1) | |
28 | #define pmd_offset(a, b) ((void *)0) | |
29 | /* FIXME */ | |
30 | /* | |
31 | * PMD_SHIFT determines the size of the area a second-level page table can map | |
32 | * PGDIR_SHIFT determines what a third-level page table entry can map | |
33 | */ | |
34 | #define PGDIR_SHIFT 21 | |
35 | ||
36 | #define PGDIR_SIZE (1UL << PGDIR_SHIFT) | |
37 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) | |
38 | /* FIXME */ | |
39 | ||
40 | #define PAGE_NONE __pgprot(0) | |
41 | #define PAGE_SHARED __pgprot(0) | |
42 | #define PAGE_COPY __pgprot(0) | |
43 | #define PAGE_READONLY __pgprot(0) | |
44 | #define PAGE_KERNEL __pgprot(0) | |
45 | ||
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46 | #define swapper_pg_dir ((pgd_t *) 0) |
47 | ||
48 | #define __swp_type(x) (0) | |
49 | #define __swp_offset(x) (0) | |
50 | #define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) }) | |
51 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) | |
52 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) | |
53 | ||
54 | ||
55 | typedef pte_t *pte_addr_t; | |
56 | ||
57 | static inline int pte_file(pte_t pte) { return 0; } | |
58 | ||
59 | /* | |
60 | * ZERO_PAGE is a global shared page that is always zero: used | |
61 | * for zero-mapped memory areas etc.. | |
62 | */ | |
63 | #define ZERO_PAGE(vaddr) (virt_to_page(0)) | |
64 | ||
65 | /* | |
66 | * Mark the prot value as uncacheable and unbufferable. | |
67 | */ | |
68 | #define pgprot_noncached(prot) __pgprot(0) | |
69 | #define pgprot_writecombine(prot) __pgprot(0) | |
a91ed072 | 70 | #define pgprot_dmacoherent(prot) __pgprot(0) |
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71 | |
72 | ||
73 | /* | |
74 | * These would be in other places but having them here reduces the diffs. | |
75 | */ | |
76 | extern unsigned int kobjsize(const void *objp); | |
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77 | |
78 | /* | |
79 | * No page table caches to initialise. | |
80 | */ | |
81 | #define pgtable_cache_init() do { } while (0) | |
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82 | |
83 | /* | |
84 | * All 32bit addresses are effectively valid for vmalloc... | |
85 | * Sort of meaningless for non-VM targets. | |
86 | */ | |
c931b4f6 FB |
87 | #define VMALLOC_START 0UL |
88 | #define VMALLOC_END 0xffffffffUL | |
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89 | |
90 | #define FIRST_USER_ADDRESS (0) | |
91 | ||
92df7851 GU |
92 | #include <asm-generic/pgtable.h> |
93 | ||
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94 | #else |
95 | ||
96 | /* | |
97 | * dummy tlb and user structures. | |
98 | */ | |
99 | #define v3_tlb_fns (0) | |
100 | #define v4_tlb_fns (0) | |
101 | #define v4wb_tlb_fns (0) | |
102 | #define v4wbi_tlb_fns (0) | |
7b4c965a | 103 | #define v6wbi_tlb_fns (0) |
2eb8c82b | 104 | #define v7wbi_tlb_fns (0) |
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105 | |
106 | #define v3_user_fns (0) | |
107 | #define v4_user_fns (0) | |
108 | #define v4_mc_user_fns (0) | |
109 | #define v4wb_user_fns (0) | |
110 | #define v4wt_user_fns (0) | |
111 | #define v6_user_fns (0) | |
112 | #define xscale_mc_user_fns (0) | |
113 | ||
114 | #endif /*__ASSEMBLY__*/ | |
115 | ||
116 | #endif /* _ASMARM_PGTABLE_H */ |