Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/kernel/traps.c | |
3 | * | |
ab72b007 | 4 | * Copyright (C) 1995-2009 Russell King |
1da177e4 LT |
5 | * Fragments that appear the same as linux/arch/i386/kernel/traps.c (C) Linus Torvalds |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * 'traps.c' handles hardware exceptions after we have saved some state in | |
12 | * 'linux/arch/arm/lib/traps.S'. Mostly a debugging aid, but will probably | |
13 | * kill the offending process. | |
14 | */ | |
1da177e4 | 15 | #include <linux/signal.h> |
1da177e4 | 16 | #include <linux/personality.h> |
1da177e4 | 17 | #include <linux/kallsyms.h> |
a9221de6 RK |
18 | #include <linux/spinlock.h> |
19 | #include <linux/uaccess.h> | |
67306da6 | 20 | #include <linux/hardirq.h> |
a9221de6 RK |
21 | #include <linux/kdebug.h> |
22 | #include <linux/module.h> | |
23 | #include <linux/kexec.h> | |
87e040b6 | 24 | #include <linux/bug.h> |
a9221de6 | 25 | #include <linux/delay.h> |
1da177e4 | 26 | #include <linux/init.h> |
425fc47a | 27 | #include <linux/sched.h> |
c0e7f7ee | 28 | #include <linux/irq.h> |
1da177e4 | 29 | |
60063497 | 30 | #include <linux/atomic.h> |
1da177e4 | 31 | #include <asm/cacheflush.h> |
5a567d78 | 32 | #include <asm/exception.h> |
1da177e4 LT |
33 | #include <asm/unistd.h> |
34 | #include <asm/traps.h> | |
49432d4a | 35 | #include <asm/ptrace.h> |
bff595c1 | 36 | #include <asm/unwind.h> |
f159f4ed | 37 | #include <asm/tls.h> |
9f97da78 | 38 | #include <asm/system_misc.h> |
a79a0cb1 | 39 | #include <asm/opcodes.h> |
1da177e4 | 40 | |
49432d4a | 41 | |
29c350bf RK |
42 | static const char *handler[]= { |
43 | "prefetch abort", | |
44 | "data abort", | |
45 | "address exception", | |
46 | "interrupt", | |
47 | "undefined instruction", | |
48 | }; | |
1da177e4 | 49 | |
247055aa CM |
50 | void *vectors_page; |
51 | ||
1da177e4 LT |
52 | #ifdef CONFIG_DEBUG_USER |
53 | unsigned int user_debug; | |
54 | ||
55 | static int __init user_debug_setup(char *str) | |
56 | { | |
57 | get_option(&str, &user_debug); | |
58 | return 1; | |
59 | } | |
60 | __setup("user_debug=", user_debug_setup); | |
61 | #endif | |
62 | ||
e40c2ec6 | 63 | static void dump_mem(const char *, const char *, unsigned long, unsigned long); |
7ab3f8d5 | 64 | |
7ab3f8d5 | 65 | void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) |
1da177e4 LT |
66 | { |
67 | #ifdef CONFIG_KALLSYMS | |
ef41b5c9 | 68 | printk("[<%08lx>] (%ps) from [<%08lx>] (%pS)\n", where, (void *)where, from, (void *)from); |
1da177e4 LT |
69 | #else |
70 | printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from); | |
71 | #endif | |
7ab3f8d5 RK |
72 | |
73 | if (in_exception_text(where)) | |
e40c2ec6 | 74 | dump_mem("", "Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs)); |
1da177e4 LT |
75 | } |
76 | ||
bff595c1 | 77 | #ifndef CONFIG_ARM_UNWIND |
1da177e4 LT |
78 | /* |
79 | * Stack pointers should always be within the kernels view of | |
80 | * physical memory. If it is not there, then we can't dump | |
81 | * out any information relating to the stack. | |
82 | */ | |
83 | static int verify_stack(unsigned long sp) | |
84 | { | |
09d9bae0 RK |
85 | if (sp < PAGE_OFFSET || |
86 | (sp > (unsigned long)high_memory && high_memory != NULL)) | |
1da177e4 LT |
87 | return -EFAULT; |
88 | ||
89 | return 0; | |
90 | } | |
bff595c1 | 91 | #endif |
1da177e4 LT |
92 | |
93 | /* | |
94 | * Dump out the contents of some memory nicely... | |
95 | */ | |
e40c2ec6 RK |
96 | static void dump_mem(const char *lvl, const char *str, unsigned long bottom, |
97 | unsigned long top) | |
1da177e4 | 98 | { |
d191fe09 | 99 | unsigned long first; |
1da177e4 LT |
100 | mm_segment_t fs; |
101 | int i; | |
102 | ||
103 | /* | |
104 | * We need to switch to kernel mode so that we can use __get_user | |
105 | * to safely read from kernel space. Note that we now dump the | |
106 | * code first, just in case the backtrace kills us. | |
107 | */ | |
108 | fs = get_fs(); | |
109 | set_fs(KERNEL_DS); | |
110 | ||
e40c2ec6 | 111 | printk("%s%s(0x%08lx to 0x%08lx)\n", lvl, str, bottom, top); |
1da177e4 | 112 | |
d191fe09 RK |
113 | for (first = bottom & ~31; first < top; first += 32) { |
114 | unsigned long p; | |
115 | char str[sizeof(" 12345678") * 8 + 1]; | |
1da177e4 | 116 | |
d191fe09 RK |
117 | memset(str, ' ', sizeof(str)); |
118 | str[sizeof(str) - 1] = '\0'; | |
1da177e4 | 119 | |
d191fe09 RK |
120 | for (p = first, i = 0; i < 8 && p < top; i++, p += 4) { |
121 | if (p >= bottom && p < top) { | |
122 | unsigned long val; | |
123 | if (__get_user(val, (unsigned long *)p) == 0) | |
124 | sprintf(str + i * 9, " %08lx", val); | |
125 | else | |
126 | sprintf(str + i * 9, " ????????"); | |
1da177e4 LT |
127 | } |
128 | } | |
e40c2ec6 | 129 | printk("%s%04lx:%s\n", lvl, first & 0xffff, str); |
1da177e4 LT |
130 | } |
131 | ||
132 | set_fs(fs); | |
133 | } | |
134 | ||
e40c2ec6 | 135 | static void dump_instr(const char *lvl, struct pt_regs *regs) |
1da177e4 LT |
136 | { |
137 | unsigned long addr = instruction_pointer(regs); | |
138 | const int thumb = thumb_mode(regs); | |
139 | const int width = thumb ? 4 : 8; | |
140 | mm_segment_t fs; | |
d191fe09 | 141 | char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str; |
1da177e4 LT |
142 | int i; |
143 | ||
144 | /* | |
145 | * We need to switch to kernel mode so that we can use __get_user | |
146 | * to safely read from kernel space. Note that we now dump the | |
147 | * code first, just in case the backtrace kills us. | |
148 | */ | |
149 | fs = get_fs(); | |
150 | set_fs(KERNEL_DS); | |
151 | ||
a9011580 | 152 | for (i = -4; i < 1 + !!thumb; i++) { |
1da177e4 LT |
153 | unsigned int val, bad; |
154 | ||
155 | if (thumb) | |
156 | bad = __get_user(val, &((u16 *)addr)[i]); | |
157 | else | |
158 | bad = __get_user(val, &((u32 *)addr)[i]); | |
159 | ||
160 | if (!bad) | |
d191fe09 RK |
161 | p += sprintf(p, i == 0 ? "(%0*x) " : "%0*x ", |
162 | width, val); | |
1da177e4 | 163 | else { |
d191fe09 | 164 | p += sprintf(p, "bad PC value"); |
1da177e4 LT |
165 | break; |
166 | } | |
167 | } | |
e40c2ec6 | 168 | printk("%sCode: %s\n", lvl, str); |
1da177e4 LT |
169 | |
170 | set_fs(fs); | |
171 | } | |
172 | ||
bff595c1 CM |
173 | #ifdef CONFIG_ARM_UNWIND |
174 | static inline void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) | |
175 | { | |
176 | unwind_backtrace(regs, tsk); | |
177 | } | |
178 | #else | |
1da177e4 LT |
179 | static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) |
180 | { | |
67a94c23 | 181 | unsigned int fp, mode; |
1da177e4 LT |
182 | int ok = 1; |
183 | ||
184 | printk("Backtrace: "); | |
67a94c23 CM |
185 | |
186 | if (!tsk) | |
187 | tsk = current; | |
188 | ||
189 | if (regs) { | |
49432d4a | 190 | fp = frame_pointer(regs); |
67a94c23 CM |
191 | mode = processor_mode(regs); |
192 | } else if (tsk != current) { | |
193 | fp = thread_saved_fp(tsk); | |
194 | mode = 0x10; | |
195 | } else { | |
196 | asm("mov %0, fp" : "=r" (fp) : : "cc"); | |
197 | mode = 0x10; | |
198 | } | |
199 | ||
1da177e4 | 200 | if (!fp) { |
4ed89f22 | 201 | pr_cont("no frame pointer"); |
1da177e4 LT |
202 | ok = 0; |
203 | } else if (verify_stack(fp)) { | |
4ed89f22 | 204 | pr_cont("invalid frame pointer 0x%08x", fp); |
1da177e4 | 205 | ok = 0; |
55205823 | 206 | } else if (fp < (unsigned long)end_of_stack(tsk)) |
4ed89f22 RK |
207 | pr_cont("frame pointer underflow"); |
208 | pr_cont("\n"); | |
1da177e4 LT |
209 | |
210 | if (ok) | |
67a94c23 | 211 | c_backtrace(fp, mode); |
1da177e4 | 212 | } |
bff595c1 | 213 | #endif |
1da177e4 | 214 | |
1da177e4 LT |
215 | void show_stack(struct task_struct *tsk, unsigned long *sp) |
216 | { | |
67a94c23 | 217 | dump_backtrace(NULL, tsk); |
1da177e4 LT |
218 | barrier(); |
219 | } | |
220 | ||
d9202429 RK |
221 | #ifdef CONFIG_PREEMPT |
222 | #define S_PREEMPT " PREEMPT" | |
223 | #else | |
224 | #define S_PREEMPT "" | |
225 | #endif | |
226 | #ifdef CONFIG_SMP | |
227 | #define S_SMP " SMP" | |
228 | #else | |
229 | #define S_SMP "" | |
230 | #endif | |
8211ca65 RK |
231 | #ifdef CONFIG_THUMB2_KERNEL |
232 | #define S_ISA " THUMB2" | |
233 | #else | |
234 | #define S_ISA " ARM" | |
235 | #endif | |
d9202429 | 236 | |
02df19b4 | 237 | static int __die(const char *str, int err, struct pt_regs *regs) |
1da177e4 | 238 | { |
02df19b4 | 239 | struct task_struct *tsk = current; |
1da177e4 | 240 | static int die_counter; |
a9221de6 | 241 | int ret; |
1da177e4 | 242 | |
4ed89f22 RK |
243 | pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP S_ISA "\n", |
244 | str, err, ++die_counter); | |
a9221de6 RK |
245 | |
246 | /* trap and error numbers are mostly meaningless on ARM */ | |
247 | ret = notify_die(DIE_OOPS, str, regs, err, tsk->thread.trap_no, SIGSEGV); | |
248 | if (ret == NOTIFY_STOP) | |
02df19b4 | 249 | return 1; |
a9221de6 | 250 | |
1da177e4 | 251 | print_modules(); |
652a12ef | 252 | __show_regs(regs); |
4ed89f22 RK |
253 | pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n", |
254 | TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), end_of_stack(tsk)); | |
1da177e4 LT |
255 | |
256 | if (!user_mode(regs) || in_interrupt()) { | |
e40c2ec6 | 257 | dump_mem(KERN_EMERG, "Stack: ", regs->ARM_sp, |
32d39a93 | 258 | THREAD_SIZE + (unsigned long)task_stack_page(tsk)); |
1da177e4 | 259 | dump_backtrace(regs, tsk); |
e40c2ec6 | 260 | dump_instr(KERN_EMERG, regs); |
1da177e4 | 261 | } |
a9221de6 | 262 | |
02df19b4 | 263 | return 0; |
d362979a | 264 | } |
1da177e4 | 265 | |
02df19b4 RV |
266 | static arch_spinlock_t die_lock = __ARCH_SPIN_LOCK_UNLOCKED; |
267 | static int die_owner = -1; | |
268 | static unsigned int die_nest_count; | |
d362979a | 269 | |
02df19b4 | 270 | static unsigned long oops_begin(void) |
d362979a | 271 | { |
02df19b4 RV |
272 | int cpu; |
273 | unsigned long flags; | |
d362979a | 274 | |
d9202429 RK |
275 | oops_enter(); |
276 | ||
02df19b4 RV |
277 | /* racy, but better than risking deadlock. */ |
278 | raw_local_irq_save(flags); | |
279 | cpu = smp_processor_id(); | |
280 | if (!arch_spin_trylock(&die_lock)) { | |
281 | if (cpu == die_owner) | |
282 | /* nested oops. should stop eventually */; | |
283 | else | |
284 | arch_spin_lock(&die_lock); | |
285 | } | |
286 | die_nest_count++; | |
287 | die_owner = cpu; | |
03a6e5bd | 288 | console_verbose(); |
d362979a | 289 | bust_spinlocks(1); |
02df19b4 RV |
290 | return flags; |
291 | } | |
a9221de6 | 292 | |
02df19b4 RV |
293 | static void oops_end(unsigned long flags, struct pt_regs *regs, int signr) |
294 | { | |
295 | if (regs && kexec_should_crash(current)) | |
a9221de6 RK |
296 | crash_kexec(regs); |
297 | ||
1da177e4 | 298 | bust_spinlocks(0); |
02df19b4 | 299 | die_owner = -1; |
373d4d09 | 300 | add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE); |
02df19b4 RV |
301 | die_nest_count--; |
302 | if (!die_nest_count) | |
303 | /* Nest count reaches zero, release the lock. */ | |
304 | arch_spin_unlock(&die_lock); | |
305 | raw_local_irq_restore(flags); | |
03a6e5bd | 306 | oops_exit(); |
31867499 | 307 | |
d9202429 RK |
308 | if (in_interrupt()) |
309 | panic("Fatal exception in interrupt"); | |
cea6a4ba | 310 | if (panic_on_oops) |
012c437d | 311 | panic("Fatal exception"); |
02df19b4 RV |
312 | if (signr) |
313 | do_exit(signr); | |
314 | } | |
315 | ||
316 | /* | |
317 | * This function is protected against re-entrancy. | |
318 | */ | |
319 | void die(const char *str, struct pt_regs *regs, int err) | |
320 | { | |
321 | enum bug_trap_type bug_type = BUG_TRAP_TYPE_NONE; | |
322 | unsigned long flags = oops_begin(); | |
323 | int sig = SIGSEGV; | |
324 | ||
325 | if (!user_mode(regs)) | |
326 | bug_type = report_bug(regs->ARM_pc, regs); | |
327 | if (bug_type != BUG_TRAP_TYPE_NONE) | |
328 | str = "Oops - BUG"; | |
329 | ||
330 | if (__die(str, err, regs)) | |
331 | sig = 0; | |
332 | ||
333 | oops_end(flags, regs, sig); | |
1da177e4 LT |
334 | } |
335 | ||
1eeb66a1 CH |
336 | void arm_notify_die(const char *str, struct pt_regs *regs, |
337 | struct siginfo *info, unsigned long err, unsigned long trap) | |
1da177e4 LT |
338 | { |
339 | if (user_mode(regs)) { | |
340 | current->thread.error_code = err; | |
341 | current->thread.trap_no = trap; | |
342 | ||
343 | force_sig_info(info->si_signo, info, current); | |
344 | } else { | |
345 | die(str, regs, err); | |
346 | } | |
347 | } | |
348 | ||
87e040b6 SG |
349 | #ifdef CONFIG_GENERIC_BUG |
350 | ||
351 | int is_valid_bugaddr(unsigned long pc) | |
352 | { | |
353 | #ifdef CONFIG_THUMB2_KERNEL | |
63328070 BD |
354 | u16 bkpt; |
355 | u16 insn = __opcode_to_mem_thumb16(BUG_INSTR_VALUE); | |
87e040b6 | 356 | #else |
63328070 BD |
357 | u32 bkpt; |
358 | u32 insn = __opcode_to_mem_arm(BUG_INSTR_VALUE); | |
87e040b6 SG |
359 | #endif |
360 | ||
361 | if (probe_kernel_address((unsigned *)pc, bkpt)) | |
362 | return 0; | |
363 | ||
63328070 | 364 | return bkpt == insn; |
87e040b6 SG |
365 | } |
366 | ||
367 | #endif | |
368 | ||
1da177e4 | 369 | static LIST_HEAD(undef_hook); |
bd31b859 | 370 | static DEFINE_RAW_SPINLOCK(undef_lock); |
1da177e4 LT |
371 | |
372 | void register_undef_hook(struct undef_hook *hook) | |
373 | { | |
109d89ca RK |
374 | unsigned long flags; |
375 | ||
bd31b859 | 376 | raw_spin_lock_irqsave(&undef_lock, flags); |
1da177e4 | 377 | list_add(&hook->node, &undef_hook); |
bd31b859 | 378 | raw_spin_unlock_irqrestore(&undef_lock, flags); |
1da177e4 LT |
379 | } |
380 | ||
381 | void unregister_undef_hook(struct undef_hook *hook) | |
382 | { | |
109d89ca RK |
383 | unsigned long flags; |
384 | ||
bd31b859 | 385 | raw_spin_lock_irqsave(&undef_lock, flags); |
1da177e4 | 386 | list_del(&hook->node); |
bd31b859 | 387 | raw_spin_unlock_irqrestore(&undef_lock, flags); |
1da177e4 LT |
388 | } |
389 | ||
b03a5b75 RK |
390 | static int call_undef_hook(struct pt_regs *regs, unsigned int instr) |
391 | { | |
392 | struct undef_hook *hook; | |
393 | unsigned long flags; | |
394 | int (*fn)(struct pt_regs *regs, unsigned int instr) = NULL; | |
395 | ||
bd31b859 | 396 | raw_spin_lock_irqsave(&undef_lock, flags); |
b03a5b75 RK |
397 | list_for_each_entry(hook, &undef_hook, node) |
398 | if ((instr & hook->instr_mask) == hook->instr_val && | |
399 | (regs->ARM_cpsr & hook->cpsr_mask) == hook->cpsr_val) | |
400 | fn = hook->fn; | |
bd31b859 | 401 | raw_spin_unlock_irqrestore(&undef_lock, flags); |
b03a5b75 RK |
402 | |
403 | return fn ? fn(regs, instr) : 1; | |
404 | } | |
405 | ||
7ab3f8d5 | 406 | asmlinkage void __exception do_undefinstr(struct pt_regs *regs) |
1da177e4 | 407 | { |
1da177e4 | 408 | unsigned int instr; |
1da177e4 LT |
409 | siginfo_t info; |
410 | void __user *pc; | |
411 | ||
1da177e4 | 412 | pc = (void __user *)instruction_pointer(regs); |
dfc544c7 DW |
413 | |
414 | if (processor_mode(regs) == SVC_MODE) { | |
592201a9 JM |
415 | #ifdef CONFIG_THUMB2_KERNEL |
416 | if (thumb_mode(regs)) { | |
a79a0cb1 | 417 | instr = __mem_to_opcode_thumb16(((u16 *)pc)[0]); |
592201a9 | 418 | if (is_wide_instruction(instr)) { |
a79a0cb1 BD |
419 | u16 inst2; |
420 | inst2 = __mem_to_opcode_thumb16(((u16 *)pc)[1]); | |
421 | instr = __opcode_thumb32_compose(instr, inst2); | |
592201a9 JM |
422 | } |
423 | } else | |
424 | #endif | |
a79a0cb1 | 425 | instr = __mem_to_opcode_arm(*(u32 *) pc); |
dfc544c7 | 426 | } else if (thumb_mode(regs)) { |
2b2040af WD |
427 | if (get_user(instr, (u16 __user *)pc)) |
428 | goto die_sig; | |
a79a0cb1 | 429 | instr = __mem_to_opcode_thumb16(instr); |
592201a9 JM |
430 | if (is_wide_instruction(instr)) { |
431 | unsigned int instr2; | |
2b2040af WD |
432 | if (get_user(instr2, (u16 __user *)pc+1)) |
433 | goto die_sig; | |
a79a0cb1 BD |
434 | instr2 = __mem_to_opcode_thumb16(instr2); |
435 | instr = __opcode_thumb32_compose(instr, instr2); | |
592201a9 | 436 | } |
d6cd9894 TK |
437 | } else { |
438 | if (get_user(instr, (u32 __user *)pc)) | |
439 | goto die_sig; | |
a79a0cb1 | 440 | instr = __mem_to_opcode_arm(instr); |
1da177e4 LT |
441 | } |
442 | ||
b03a5b75 RK |
443 | if (call_undef_hook(regs, instr) == 0) |
444 | return; | |
1da177e4 | 445 | |
2b2040af | 446 | die_sig: |
1da177e4 LT |
447 | #ifdef CONFIG_DEBUG_USER |
448 | if (user_debug & UDBG_UNDEFINED) { | |
4ed89f22 | 449 | pr_info("%s (%d): undefined instruction: pc=%p\n", |
19c5870c | 450 | current->comm, task_pid_nr(current), pc); |
b5b6b5f5 | 451 | __show_regs(regs); |
e40c2ec6 | 452 | dump_instr(KERN_INFO, regs); |
1da177e4 LT |
453 | } |
454 | #endif | |
455 | ||
456 | info.si_signo = SIGILL; | |
457 | info.si_errno = 0; | |
458 | info.si_code = ILL_ILLOPC; | |
459 | info.si_addr = pc; | |
460 | ||
1eeb66a1 | 461 | arm_notify_die("Oops - undefined instruction", regs, &info, 0, 6); |
1da177e4 LT |
462 | } |
463 | ||
c0e7f7ee DT |
464 | /* |
465 | * Handle FIQ similarly to NMI on x86 systems. | |
466 | * | |
467 | * The runtime environment for NMIs is extremely restrictive | |
468 | * (NMIs can pre-empt critical sections meaning almost all locking is | |
469 | * forbidden) meaning this default FIQ handling must only be used in | |
470 | * circumstances where non-maskability improves robustness, such as | |
471 | * watchdog or debug logic. | |
472 | * | |
473 | * This handler is not appropriate for general purpose use in drivers | |
474 | * platform code and can be overrideen using set_fiq_handler. | |
475 | */ | |
476 | asmlinkage void __exception_irq_entry handle_fiq_as_nmi(struct pt_regs *regs) | |
477 | { | |
478 | struct pt_regs *old_regs = set_irq_regs(regs); | |
479 | ||
480 | nmi_enter(); | |
481 | ||
482 | /* nop. FIQ handlers for special arch/arm features can be added here. */ | |
483 | ||
484 | nmi_exit(); | |
485 | ||
486 | set_irq_regs(old_regs); | |
487 | } | |
488 | ||
1da177e4 LT |
489 | /* |
490 | * bad_mode handles the impossible case in the vectors. If you see one of | |
491 | * these, then it's extremely serious, and could mean you have buggy hardware. | |
492 | * It never returns, and never tries to sync. We hope that we can at least | |
493 | * dump out some state information... | |
494 | */ | |
ae0a846e | 495 | asmlinkage void bad_mode(struct pt_regs *regs, int reason) |
1da177e4 LT |
496 | { |
497 | console_verbose(); | |
498 | ||
4ed89f22 | 499 | pr_crit("Bad mode in %s handler detected\n", handler[reason]); |
1da177e4 LT |
500 | |
501 | die("Oops - bad mode", regs, 0); | |
502 | local_irq_disable(); | |
503 | panic("bad mode"); | |
504 | } | |
505 | ||
506 | static int bad_syscall(int n, struct pt_regs *regs) | |
507 | { | |
1da177e4 LT |
508 | siginfo_t info; |
509 | ||
a4980448 RW |
510 | if ((current->personality & PER_MASK) != PER_LINUX) { |
511 | send_sig(SIGSEGV, current, 1); | |
1da177e4 LT |
512 | return regs->ARM_r0; |
513 | } | |
514 | ||
515 | #ifdef CONFIG_DEBUG_USER | |
516 | if (user_debug & UDBG_SYSCALL) { | |
4ed89f22 | 517 | pr_err("[%d] %s: obsolete system call %08x.\n", |
19c5870c | 518 | task_pid_nr(current), current->comm, n); |
e40c2ec6 | 519 | dump_instr(KERN_ERR, regs); |
1da177e4 LT |
520 | } |
521 | #endif | |
522 | ||
523 | info.si_signo = SIGILL; | |
524 | info.si_errno = 0; | |
525 | info.si_code = ILL_ILLTRP; | |
526 | info.si_addr = (void __user *)instruction_pointer(regs) - | |
527 | (thumb_mode(regs) ? 2 : 4); | |
528 | ||
1eeb66a1 | 529 | arm_notify_die("Oops - bad syscall", regs, &info, n, 0); |
1da177e4 LT |
530 | |
531 | return regs->ARM_r0; | |
532 | } | |
533 | ||
c5102f59 | 534 | static inline int |
28256d61 WD |
535 | __do_cache_op(unsigned long start, unsigned long end) |
536 | { | |
537 | int ret; | |
28256d61 WD |
538 | |
539 | do { | |
b31459ad JM |
540 | unsigned long chunk = min(PAGE_SIZE, end - start); |
541 | ||
3f4aa45c VM |
542 | if (fatal_signal_pending(current)) |
543 | return 0; | |
28256d61 WD |
544 | |
545 | ret = flush_cache_user_range(start, start + chunk); | |
546 | if (ret) | |
547 | return ret; | |
548 | ||
549 | cond_resched(); | |
550 | start += chunk; | |
551 | } while (start < end); | |
552 | ||
553 | return 0; | |
554 | } | |
555 | ||
c5102f59 | 556 | static inline int |
1da177e4 LT |
557 | do_cache_op(unsigned long start, unsigned long end, int flags) |
558 | { | |
1da177e4 | 559 | if (end < start || flags) |
c5102f59 | 560 | return -EINVAL; |
1da177e4 | 561 | |
97c72d89 WD |
562 | if (!access_ok(VERIFY_READ, start, end - start)) |
563 | return -EFAULT; | |
1da177e4 | 564 | |
28256d61 | 565 | return __do_cache_op(start, end); |
1da177e4 LT |
566 | } |
567 | ||
568 | /* | |
569 | * Handle all unrecognised system calls. | |
570 | * 0x9f0000 - 0x9fffff are some more esoteric system calls | |
571 | */ | |
572 | #define NR(x) ((__ARM_NR_##x) - __ARM_NR_BASE) | |
573 | asmlinkage int arm_syscall(int no, struct pt_regs *regs) | |
574 | { | |
1da177e4 LT |
575 | siginfo_t info; |
576 | ||
3f2829a3 | 577 | if ((no >> 16) != (__ARM_NR_BASE>> 16)) |
1da177e4 LT |
578 | return bad_syscall(no, regs); |
579 | ||
580 | switch (no & 0xffff) { | |
581 | case 0: /* branch through 0 */ | |
582 | info.si_signo = SIGSEGV; | |
583 | info.si_errno = 0; | |
584 | info.si_code = SEGV_MAPERR; | |
585 | info.si_addr = NULL; | |
586 | ||
1eeb66a1 | 587 | arm_notify_die("branch through zero", regs, &info, 0, 0); |
1da177e4 LT |
588 | return 0; |
589 | ||
590 | case NR(breakpoint): /* SWI BREAK_POINT */ | |
591 | regs->ARM_pc -= thumb_mode(regs) ? 2 : 4; | |
592 | ptrace_break(current, regs); | |
593 | return regs->ARM_r0; | |
594 | ||
595 | /* | |
596 | * Flush a region from virtual address 'r0' to virtual address 'r1' | |
597 | * _exclusive_. There is no alignment requirement on either address; | |
598 | * user space does not need to know the hardware cache layout. | |
599 | * | |
600 | * r2 contains flags. It should ALWAYS be passed as ZERO until it | |
601 | * is defined to be something else. For now we ignore it, but may | |
602 | * the fires of hell burn in your belly if you break this rule. ;) | |
603 | * | |
604 | * (at a later date, we may want to allow this call to not flush | |
605 | * various aspects of the cache. Passing '0' will guarantee that | |
606 | * everything necessary gets flushed to maintain consistency in | |
607 | * the specified region). | |
608 | */ | |
609 | case NR(cacheflush): | |
c5102f59 | 610 | return do_cache_op(regs->ARM_r0, regs->ARM_r1, regs->ARM_r2); |
1da177e4 LT |
611 | |
612 | case NR(usr26): | |
613 | if (!(elf_hwcap & HWCAP_26BIT)) | |
614 | break; | |
615 | regs->ARM_cpsr &= ~MODE32_BIT; | |
616 | return regs->ARM_r0; | |
617 | ||
618 | case NR(usr32): | |
619 | if (!(elf_hwcap & HWCAP_26BIT)) | |
620 | break; | |
621 | regs->ARM_cpsr |= MODE32_BIT; | |
622 | return regs->ARM_r0; | |
623 | ||
624 | case NR(set_tls): | |
fbfb872f | 625 | set_tls(regs->ARM_r0); |
1da177e4 LT |
626 | return 0; |
627 | ||
628 | default: | |
629 | /* Calls 9f00xx..9f07ff are defined to return -ENOSYS | |
630 | if not implemented, rather than raising SIGILL. This | |
631 | way the calling program can gracefully determine whether | |
632 | a feature is supported. */ | |
bfd2e29f | 633 | if ((no & 0xffff) <= 0x7ff) |
1da177e4 LT |
634 | return -ENOSYS; |
635 | break; | |
636 | } | |
637 | #ifdef CONFIG_DEBUG_USER | |
638 | /* | |
639 | * experience shows that these seem to indicate that | |
640 | * something catastrophic has happened | |
641 | */ | |
642 | if (user_debug & UDBG_SYSCALL) { | |
4ed89f22 | 643 | pr_err("[%d] %s: arm syscall %d\n", |
19c5870c | 644 | task_pid_nr(current), current->comm, no); |
e40c2ec6 | 645 | dump_instr("", regs); |
1da177e4 | 646 | if (user_mode(regs)) { |
652a12ef | 647 | __show_regs(regs); |
49432d4a | 648 | c_backtrace(frame_pointer(regs), processor_mode(regs)); |
1da177e4 LT |
649 | } |
650 | } | |
651 | #endif | |
652 | info.si_signo = SIGILL; | |
653 | info.si_errno = 0; | |
654 | info.si_code = ILL_ILLTRP; | |
655 | info.si_addr = (void __user *)instruction_pointer(regs) - | |
656 | (thumb_mode(regs) ? 2 : 4); | |
657 | ||
1eeb66a1 | 658 | arm_notify_die("Oops - bad syscall(2)", regs, &info, no, 0); |
1da177e4 LT |
659 | return 0; |
660 | } | |
661 | ||
4b0e07a5 | 662 | #ifdef CONFIG_TLS_REG_EMUL |
2d2669b6 NP |
663 | |
664 | /* | |
665 | * We might be running on an ARMv6+ processor which should have the TLS | |
4b0e07a5 NP |
666 | * register but for some reason we can't use it, or maybe an SMP system |
667 | * using a pre-ARMv6 processor (there are apparently a few prototypes like | |
668 | * that in existence) and therefore access to that register must be | |
669 | * emulated. | |
2d2669b6 NP |
670 | */ |
671 | ||
672 | static int get_tp_trap(struct pt_regs *regs, unsigned int instr) | |
673 | { | |
674 | int reg = (instr >> 12) & 15; | |
675 | if (reg == 15) | |
676 | return 1; | |
a4780ade | 677 | regs->uregs[reg] = current_thread_info()->tp_value[0]; |
2d2669b6 NP |
678 | regs->ARM_pc += 4; |
679 | return 0; | |
680 | } | |
681 | ||
682 | static struct undef_hook arm_mrc_hook = { | |
683 | .instr_mask = 0x0fff0fff, | |
684 | .instr_val = 0x0e1d0f70, | |
685 | .cpsr_mask = PSR_T_BIT, | |
686 | .cpsr_val = 0, | |
687 | .fn = get_tp_trap, | |
688 | }; | |
689 | ||
690 | static int __init arm_mrc_hook_init(void) | |
691 | { | |
692 | register_undef_hook(&arm_mrc_hook); | |
693 | return 0; | |
694 | } | |
695 | ||
696 | late_initcall(arm_mrc_hook_init); | |
697 | ||
698 | #endif | |
699 | ||
1da177e4 LT |
700 | /* |
701 | * A data abort trap was taken, but we did not handle the instruction. | |
702 | * Try to abort the user program, or panic if it was the kernel. | |
703 | */ | |
704 | asmlinkage void | |
705 | baddataabort(int code, unsigned long instr, struct pt_regs *regs) | |
706 | { | |
707 | unsigned long addr = instruction_pointer(regs); | |
708 | siginfo_t info; | |
709 | ||
710 | #ifdef CONFIG_DEBUG_USER | |
711 | if (user_debug & UDBG_BADABORT) { | |
4ed89f22 RK |
712 | pr_err("[%d] %s: bad data abort: code %d instr 0x%08lx\n", |
713 | task_pid_nr(current), current->comm, code, instr); | |
e40c2ec6 | 714 | dump_instr(KERN_ERR, regs); |
1da177e4 LT |
715 | show_pte(current->mm, addr); |
716 | } | |
717 | #endif | |
718 | ||
719 | info.si_signo = SIGILL; | |
720 | info.si_errno = 0; | |
721 | info.si_code = ILL_ILLOPC; | |
722 | info.si_addr = (void __user *)addr; | |
723 | ||
1eeb66a1 | 724 | arm_notify_die("unknown data abort code", regs, &info, instr, 0); |
1da177e4 LT |
725 | } |
726 | ||
1da177e4 LT |
727 | void __readwrite_bug(const char *fn) |
728 | { | |
4ed89f22 | 729 | pr_err("%s called, but not implemented\n", fn); |
1da177e4 LT |
730 | BUG(); |
731 | } | |
732 | EXPORT_SYMBOL(__readwrite_bug); | |
733 | ||
69529c0e | 734 | void __pte_error(const char *file, int line, pte_t pte) |
1da177e4 | 735 | { |
4ed89f22 | 736 | pr_err("%s:%d: bad pte %08llx.\n", file, line, (long long)pte_val(pte)); |
1da177e4 LT |
737 | } |
738 | ||
69529c0e | 739 | void __pmd_error(const char *file, int line, pmd_t pmd) |
1da177e4 | 740 | { |
4ed89f22 | 741 | pr_err("%s:%d: bad pmd %08llx.\n", file, line, (long long)pmd_val(pmd)); |
1da177e4 LT |
742 | } |
743 | ||
69529c0e | 744 | void __pgd_error(const char *file, int line, pgd_t pgd) |
1da177e4 | 745 | { |
4ed89f22 | 746 | pr_err("%s:%d: bad pgd %08llx.\n", file, line, (long long)pgd_val(pgd)); |
1da177e4 LT |
747 | } |
748 | ||
749 | asmlinkage void __div0(void) | |
750 | { | |
4ed89f22 | 751 | pr_err("Division by zero in kernel.\n"); |
1da177e4 LT |
752 | dump_stack(); |
753 | } | |
754 | EXPORT_SYMBOL(__div0); | |
755 | ||
756 | void abort(void) | |
757 | { | |
758 | BUG(); | |
759 | ||
760 | /* if that doesn't kill us, halt */ | |
761 | panic("Oops failed to kill thread"); | |
762 | } | |
763 | EXPORT_SYMBOL(abort); | |
764 | ||
765 | void __init trap_init(void) | |
5cbad0eb JW |
766 | { |
767 | return; | |
768 | } | |
769 | ||
f6f91b0d RK |
770 | #ifdef CONFIG_KUSER_HELPERS |
771 | static void __init kuser_init(void *vectors) | |
f159f4ed | 772 | { |
f6f91b0d RK |
773 | extern char __kuser_helper_start[], __kuser_helper_end[]; |
774 | int kuser_sz = __kuser_helper_end - __kuser_helper_start; | |
775 | ||
776 | memcpy(vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz); | |
777 | ||
f159f4ed TL |
778 | /* |
779 | * vectors + 0xfe0 = __kuser_get_tls | |
780 | * vectors + 0xfe8 = hardware TLS instruction at 0xffff0fe8 | |
781 | */ | |
782 | if (tls_emu || has_tls_reg) | |
f6f91b0d RK |
783 | memcpy(vectors + 0xfe0, vectors + 0xfe8, 4); |
784 | } | |
785 | #else | |
5761704a | 786 | static inline void __init kuser_init(void *vectors) |
f6f91b0d | 787 | { |
f159f4ed | 788 | } |
f6f91b0d | 789 | #endif |
f159f4ed | 790 | |
94e5a85b | 791 | void __init early_trap_init(void *vectors_base) |
1da177e4 | 792 | { |
55bdd694 | 793 | #ifndef CONFIG_CPU_V7M |
94e5a85b | 794 | unsigned long vectors = (unsigned long)vectors_base; |
7933523d RK |
795 | extern char __stubs_start[], __stubs_end[]; |
796 | extern char __vectors_start[], __vectors_end[]; | |
f928d4f2 | 797 | unsigned i; |
1da177e4 | 798 | |
94e5a85b RK |
799 | vectors_page = vectors_base; |
800 | ||
f928d4f2 RK |
801 | /* |
802 | * Poison the vectors page with an undefined instruction. This | |
803 | * instruction is chosen to be undefined for both ARM and Thumb | |
804 | * ISAs. The Thumb version is an undefined instruction with a | |
805 | * branch back to the undefined instruction. | |
806 | */ | |
807 | for (i = 0; i < PAGE_SIZE / sizeof(u32); i++) | |
808 | ((u32 *)vectors_base)[i] = 0xe7fddef1; | |
809 | ||
7933523d | 810 | /* |
2d2669b6 NP |
811 | * Copy the vectors, stubs and kuser helpers (in entry-armv.S) |
812 | * into the vector page, mapped at 0xffff0000, and ensure these | |
813 | * are visible to the instruction stream. | |
7933523d | 814 | */ |
c760fc19 | 815 | memcpy((void *)vectors, __vectors_start, __vectors_end - __vectors_start); |
19accfd3 | 816 | memcpy((void *)vectors + 0x1000, __stubs_start, __stubs_end - __stubs_start); |
e00d349e | 817 | |
f6f91b0d | 818 | kuser_init(vectors_base); |
f159f4ed | 819 | |
19accfd3 | 820 | flush_icache_range(vectors, vectors + PAGE_SIZE * 2); |
55bdd694 CM |
821 | #else /* ifndef CONFIG_CPU_V7M */ |
822 | /* | |
823 | * on V7-M there is no need to copy the vector table to a dedicated | |
824 | * memory area. The address is configurable and so a table in the kernel | |
825 | * image can be used. | |
826 | */ | |
827 | #endif | |
1da177e4 | 828 | } |