ARM: at91: PIT: Follow the general coding rules
[deliverable/linux.git] / arch / arm / mach-at91 / generic.h
CommitLineData
73a59c1c 1/*
9d041268 2 * linux/arch/arm/mach-at91/generic.h
73a59c1c
SP
3 *
4 * Copyright (C) 2005 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
bd602995 11#include <linux/clkdev.h>
8014d6f4 12#include <linux/of.h>
7b6d864b 13#include <linux/reboot.h>
bd602995 14
1b021a3b 15 /* Map io */
21d08b9d 16extern void __init at91_map_io(void);
f0051d82
JCPV
17extern void __init at91_init_sram(int bank, unsigned long base,
18 unsigned int length);
1b021a3b 19
2eeaaa21 20 /* Processors */
e57556e3 21extern void __init at91rm9200_set_type(int type);
21d08b9d 22extern void __init at91_initialize(unsigned long main_clock);
9a7e246b 23extern void __init at91x40_initialize(unsigned long main_clock);
397f8c3c 24extern void __init at91rm9200_dt_initialize(void);
2b11ea5b 25extern void __init at91_dt_initialize(void);
2eeaaa21 26
ba854e18 27 /* Interrupts */
92100c12
JCPV
28extern void __init at91_init_irq_default(void);
29extern void __init at91_init_interrupts(unsigned int priority[]);
9a7e246b 30extern void __init at91x40_init_interrupts(unsigned int priority[]);
738a0fd7
NF
31extern void __init at91_aic_init(unsigned int priority[],
32 unsigned int ext_irq_mask);
8014d6f4
NF
33extern int __init at91_aic_of_init(struct device_node *node,
34 struct device_node *parent);
c4b68520
LD
35extern int __init at91_aic5_of_init(struct device_node *node,
36 struct device_node *parent);
6de714c2 37extern void __init at91_sysirq_mask_rtc(u32 rtc_base);
94c4c79f 38extern void __init at91_sysirq_mask_rtt(u32 rtt_base);
8014d6f4 39
65f2ce96
MR
40 /* Devices */
41extern void __init at91_register_devices(void);
73a59c1c 42
ba854e18 43 /* Timer */
5e9cf5e1 44extern void at91rm9200_ioremap_st(u32 addr);
6bb27d73 45extern void at91rm9200_timer_init(void);
4ab0c599 46extern void at91sam926x_ioremap_pit(u32 addr);
6bb27d73
SW
47extern void at91sam926x_pit_init(void);
48extern void at91x40_timer_init(void);
73a59c1c 49
ba854e18 50 /* Clocks */
c8a8c630 51#ifdef CONFIG_OLD_CLK_AT91
46539374 52extern int __init at91_clock_init(unsigned long main_clock);
eb5e76ff 53extern int __init at91_dt_clock_init(void);
46539374
JCPV
54#else
55static int inline at91_clock_init(unsigned long main_clock) { return 0; }
c8a8c630 56static int inline at91_dt_clock_init(void) { return 0; }
46539374 57#endif
907d6deb 58struct device;
907d6deb
AV
59
60 /* Power Management */
61extern void at91_irq_suspend(void);
62extern void at91_irq_resume(void);
63
0d781716
JCPV
64/* idle */
65extern void at91sam9_idle(void);
66
4342d647
JCPV
67/* Matrix */
68extern void at91_ioremap_matrix(u32 base_addr);
69
f363c407
JCPV
70/* Ram Controler */
71extern void at91_ioremap_ramc(int id, u32 addr, u32 size);
72
f2173834
AV
73 /* GPIO */
74#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
75#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */
76
77struct at91_gpio_bank {
78 unsigned short id; /* peripheral ID */
80e91cb8 79 unsigned long regbase; /* offset from system peripheral base */
f2173834
AV
80};
81extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
82extern void __init at91_gpio_irq_setup(void);
8014d6f4
NF
83extern int __init at91_gpio_of_irq_setup(struct device_node *node,
84 struct device_node *parent);
1f4fd0a0 85
546c830c 86extern u32 at91_get_extern_irq(void);
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