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fa50ae9c DL |
1 | /* |
2 | * AT91 Power Management | |
3 | * | |
4 | * Copyright (C) 2005 David Brownell | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
11 | #ifndef __ARCH_ARM_MACH_AT91_PM | |
12 | #define __ARCH_ARM_MACH_AT91_PM | |
13 | ||
5ad945ea DL |
14 | #include <asm/proc-fns.h> |
15 | ||
09099f19 AB |
16 | #include <linux/mfd/syscon/atmel-mc.h> |
17 | #include <soc/at91/at91sam9_ddrsdr.h> | |
18 | #include <soc/at91/at91sam9_sdramc.h> | |
19 | ||
20 | #ifndef __ASSEMBLY__ | |
21 | extern void __iomem *at91_ramc_base[]; | |
22 | ||
23 | #define at91_ramc_read(id, field) \ | |
24 | __raw_readl(at91_ramc_base[id] + field) | |
25 | ||
26 | #define at91_ramc_write(id, field, value) \ | |
27 | __raw_writel(value, at91_ramc_base[id] + field) | |
28 | #endif | |
1ea60cf7 | 29 | |
2e57dc08 AB |
30 | #define AT91_MEMCTRL_MC 0 |
31 | #define AT91_MEMCTRL_SDRAMC 1 | |
32 | #define AT91_MEMCTRL_DDRSDR 2 | |
33 | ||
23be4be5 WY |
34 | #define AT91_PM_MEMTYPE_MASK 0x0f |
35 | ||
36 | #define AT91_PM_MODE_OFFSET 4 | |
37 | #define AT91_PM_MODE_MASK 0x01 | |
38 | #define AT91_PM_MODE(x) (((x) & AT91_PM_MODE_MASK) << AT91_PM_MODE_OFFSET) | |
39 | ||
40 | #define AT91_PM_SLOW_CLOCK 0x01 | |
41 | ||
23be4be5 | 42 | #endif |