projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 6781002b AV |
1 | /* |
| 2 | * linux/arch/arm/mach-at91/sam9_smc.c | |
| 3 | * | |
| 4 | * Copyright (C) 2008 Andrew Victor | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License version 2 as | |
| 8 | * published by the Free Software Foundation. | |
| 9 | */ | |
| 10 | ||
| 11 | #include <linux/module.h> | |
| 12 | #include <linux/io.h> | |
| faee0cc3 JCPV |
13 | #include <linux/of.h> |
| 14 | #include <linux/of_address.h> | |
| 6781002b AV |
15 | |
| 16 | #include <mach/at91sam9_smc.h> | |
| 17 | ||
| 18 | #include "sam9_smc.h" | |
| 19 | ||
| faee0cc3 JCPV |
20 | |
| 21 | #define AT91_SMC_CS(id, n) (smc_base_addr[id] + ((n) * 0x10)) | |
| 22 | ||
| 23 | static void __iomem *smc_base_addr[2]; | |
| 24 | ||
| 25 | static void __init sam9_smc_cs_configure(void __iomem *base, struct sam9_smc_config* config) | |
| 6781002b | 26 | { |
| faee0cc3 | 27 | |
| 6781002b | 28 | /* Setup register */ |
| faee0cc3 JCPV |
29 | __raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup) |
| 30 | | AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup) | |
| 31 | | AT91_SMC_NRDSETUP_(config->nrd_setup) | |
| 32 | | AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup), | |
| 33 | base + AT91_SMC_SETUP); | |
| 6781002b AV |
34 | |
| 35 | /* Pulse register */ | |
| faee0cc3 JCPV |
36 | __raw_writel(AT91_SMC_NWEPULSE_(config->nwe_pulse) |
| 37 | | AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse) | |
| 38 | | AT91_SMC_NRDPULSE_(config->nrd_pulse) | |
| 39 | | AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse), | |
| 40 | base + AT91_SMC_PULSE); | |
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41 | |
| 42 | /* Cycle register */ | |
| faee0cc3 JCPV |
43 | __raw_writel(AT91_SMC_NWECYCLE_(config->write_cycle) |
| 44 | | AT91_SMC_NRDCYCLE_(config->read_cycle), | |
| 45 | base + AT91_SMC_CYCLE); | |
| 6781002b AV |
46 | |
| 47 | /* Mode register */ | |
| faee0cc3 JCPV |
48 | __raw_writel(config->mode |
| 49 | | AT91_SMC_TDF_(config->tdf_cycles), | |
| 50 | base + AT91_SMC_MODE); | |
| 51 | } | |
| 52 | ||
| 53 | void __init sam9_smc_configure(int id, int cs, struct sam9_smc_config* config) | |
| 54 | { | |
| 55 | sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config); | |
| 56 | } | |
| 57 | ||
| 58 | void __init at91sam9_ioremap_smc(int id, u32 addr) | |
| 59 | { | |
| 60 | if (id > 1) { | |
| 61 | pr_warn("%s: id > 2\n", __func__); | |
| 62 | return; | |
| 63 | } | |
| 64 | smc_base_addr[id] = ioremap(addr, 512); | |
| 65 | if (!smc_base_addr[id]) | |
| 66 | pr_warn("Impossible to ioremap smc.%d 0x%x\n", id, addr); | |
| 6781002b | 67 | } |