Commit | Line | Data |
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0fbc5592 SR |
1 | /* |
2 | * TI DA850/OMAP-L138 EVM board | |
3 | * | |
4 | * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * Derived from: arch/arm/mach-davinci/board-da830-evm.c | |
7 | * Original Copyrights follow: | |
8 | * | |
9 | * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under | |
10 | * the terms of the GNU General Public License version 2. This program | |
11 | * is licensed "as is" without any warranty of any kind, whether express | |
12 | * or implied. | |
13 | */ | |
0fbc5592 | 14 | #include <linux/console.h> |
6809084a MP |
15 | #include <linux/delay.h> |
16 | #include <linux/gpio.h> | |
17 | #include <linux/gpio_keys.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/kernel.h> | |
0fbc5592 SR |
20 | #include <linux/i2c.h> |
21 | #include <linux/i2c/at24.h> | |
75e2ea64 | 22 | #include <linux/i2c/pca953x.h> |
75929f5e | 23 | #include <linux/input.h> |
6809084a | 24 | #include <linux/input/tps6507x-ts.h> |
0bc20bba | 25 | #include <linux/mfd/tps6507x.h> |
38beb929 SR |
26 | #include <linux/mtd/mtd.h> |
27 | #include <linux/mtd/nand.h> | |
28 | #include <linux/mtd/partitions.h> | |
7c5ec609 | 29 | #include <linux/mtd/physmap.h> |
6809084a MP |
30 | #include <linux/platform_device.h> |
31 | #include <linux/platform_data/mtd-davinci.h> | |
32 | #include <linux/platform_data/mtd-davinci-aemif.h> | |
33 | #include <linux/platform_data/spi-davinci.h> | |
ae41d17a | 34 | #include <linux/platform_data/uio_pruss.h> |
a9eb1f67 | 35 | #include <linux/regulator/machine.h> |
8b24599e | 36 | #include <linux/regulator/tps6507x.h> |
fdce5568 SN |
37 | #include <linux/spi/spi.h> |
38 | #include <linux/spi/flash.h> | |
ab3f5c1f | 39 | #include <linux/wl12xx.h> |
0fbc5592 | 40 | |
0fbc5592 SR |
41 | #include <mach/cp_intc.h> |
42 | #include <mach/da8xx.h> | |
7761ef67 | 43 | #include <mach/mux.h> |
6809084a MP |
44 | |
45 | #include <asm/mach-types.h> | |
46 | #include <asm/mach/arch.h> | |
47 | #include <asm/system_info.h> | |
0fbc5592 | 48 | |
1e046d17 | 49 | #include <media/tvp514x.h> |
2bd4e58c | 50 | #include <media/adv7343.h> |
1e046d17 | 51 | |
f6f97588 | 52 | #define DA850_EVM_PHY_ID "davinci_mdio-0:00" |
7761ef67 | 53 | #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) |
5cbdf276 | 54 | #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15) |
5cbdf276 | 55 | |
700691f2 SR |
56 | #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0) |
57 | #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1) | |
58 | ||
ab3f5c1f IY |
59 | #define DA850_WLAN_EN GPIO_TO_PIN(6, 9) |
60 | #define DA850_WLAN_IRQ GPIO_TO_PIN(6, 10) | |
61 | ||
2206771c C |
62 | #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6) |
63 | ||
fdce5568 SN |
64 | static struct mtd_partition da850evm_spiflash_part[] = { |
65 | [0] = { | |
66 | .name = "UBL", | |
67 | .offset = 0, | |
68 | .size = SZ_64K, | |
69 | .mask_flags = MTD_WRITEABLE, | |
70 | }, | |
71 | [1] = { | |
72 | .name = "U-Boot", | |
73 | .offset = MTDPART_OFS_APPEND, | |
74 | .size = SZ_512K, | |
75 | .mask_flags = MTD_WRITEABLE, | |
76 | }, | |
77 | [2] = { | |
78 | .name = "U-Boot-Env", | |
79 | .offset = MTDPART_OFS_APPEND, | |
80 | .size = SZ_64K, | |
81 | .mask_flags = MTD_WRITEABLE, | |
82 | }, | |
83 | [3] = { | |
84 | .name = "Kernel", | |
85 | .offset = MTDPART_OFS_APPEND, | |
86 | .size = SZ_2M + SZ_512K, | |
87 | .mask_flags = 0, | |
88 | }, | |
89 | [4] = { | |
90 | .name = "Filesystem", | |
91 | .offset = MTDPART_OFS_APPEND, | |
92 | .size = SZ_4M, | |
93 | .mask_flags = 0, | |
94 | }, | |
95 | [5] = { | |
96 | .name = "MAC-Address", | |
97 | .offset = SZ_8M - SZ_64K, | |
98 | .size = SZ_64K, | |
99 | .mask_flags = MTD_WRITEABLE, | |
100 | }, | |
101 | }; | |
102 | ||
103 | static struct flash_platform_data da850evm_spiflash_data = { | |
104 | .name = "m25p80", | |
105 | .parts = da850evm_spiflash_part, | |
106 | .nr_parts = ARRAY_SIZE(da850evm_spiflash_part), | |
107 | .type = "m25p64", | |
108 | }; | |
109 | ||
110 | static struct davinci_spi_config da850evm_spiflash_cfg = { | |
111 | .io_type = SPI_IO_TYPE_DMA, | |
112 | .c2tdelay = 8, | |
113 | .t2cdelay = 8, | |
114 | }; | |
115 | ||
116 | static struct spi_board_info da850evm_spi_info[] = { | |
117 | { | |
118 | .modalias = "m25p80", | |
119 | .platform_data = &da850evm_spiflash_data, | |
120 | .controller_data = &da850evm_spiflash_cfg, | |
121 | .mode = SPI_MODE_0, | |
122 | .max_speed_hz = 30000000, | |
123 | .bus_num = 1, | |
124 | .chip_select = 0, | |
125 | }, | |
126 | }; | |
127 | ||
810198bc RS |
128 | #ifdef CONFIG_MTD |
129 | static void da850_evm_m25p80_notify_add(struct mtd_info *mtd) | |
130 | { | |
131 | char *mac_addr = davinci_soc_info.emac_pdata->mac_addr; | |
132 | size_t retlen; | |
133 | ||
134 | if (!strcmp(mtd->name, "MAC-Address")) { | |
329ad399 | 135 | mtd_read(mtd, 0, ETH_ALEN, &retlen, mac_addr); |
810198bc RS |
136 | if (retlen == ETH_ALEN) |
137 | pr_info("Read MAC addr from SPI Flash: %pM\n", | |
138 | mac_addr); | |
139 | } | |
140 | } | |
141 | ||
142 | static struct mtd_notifier da850evm_spi_notifier = { | |
143 | .add = da850_evm_m25p80_notify_add, | |
144 | }; | |
145 | ||
146 | static void da850_evm_setup_mac_addr(void) | |
147 | { | |
148 | register_mtd_user(&da850evm_spi_notifier); | |
149 | } | |
150 | #else | |
151 | static void da850_evm_setup_mac_addr(void) { } | |
152 | #endif | |
153 | ||
7c5ec609 SR |
154 | static struct mtd_partition da850_evm_norflash_partition[] = { |
155 | { | |
e2abd5a2 | 156 | .name = "bootloaders + env", |
7c5ec609 | 157 | .offset = 0, |
e2abd5a2 SR |
158 | .size = SZ_512K, |
159 | .mask_flags = MTD_WRITEABLE, | |
160 | }, | |
161 | { | |
162 | .name = "kernel", | |
163 | .offset = MTDPART_OFS_APPEND, | |
164 | .size = SZ_2M, | |
165 | .mask_flags = 0, | |
166 | }, | |
167 | { | |
168 | .name = "filesystem", | |
169 | .offset = MTDPART_OFS_APPEND, | |
7c5ec609 SR |
170 | .size = MTDPART_SIZ_FULL, |
171 | .mask_flags = 0, | |
172 | }, | |
173 | }; | |
174 | ||
175 | static struct physmap_flash_data da850_evm_norflash_data = { | |
176 | .width = 2, | |
177 | .parts = da850_evm_norflash_partition, | |
178 | .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition), | |
179 | }; | |
180 | ||
181 | static struct resource da850_evm_norflash_resource[] = { | |
182 | { | |
183 | .start = DA8XX_AEMIF_CS2_BASE, | |
184 | .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1, | |
185 | .flags = IORESOURCE_MEM, | |
186 | }, | |
187 | }; | |
188 | ||
189 | static struct platform_device da850_evm_norflash_device = { | |
190 | .name = "physmap-flash", | |
191 | .id = 0, | |
192 | .dev = { | |
193 | .platform_data = &da850_evm_norflash_data, | |
194 | }, | |
195 | .num_resources = 1, | |
196 | .resource = da850_evm_norflash_resource, | |
197 | }; | |
198 | ||
63534443 SN |
199 | static struct davinci_pm_config da850_pm_pdata = { |
200 | .sleepcount = 128, | |
201 | }; | |
202 | ||
203 | static struct platform_device da850_pm_device = { | |
204 | .name = "pm-davinci", | |
205 | .dev = { | |
206 | .platform_data = &da850_pm_pdata, | |
207 | }, | |
208 | .id = -1, | |
209 | }; | |
210 | ||
38beb929 SR |
211 | /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash |
212 | * (128K blocks). It may be used instead of the (default) SPI flash | |
213 | * to boot, using TI's tools to install the secondary boot loader | |
214 | * (UBL) and U-Boot. | |
215 | */ | |
db549d22 | 216 | static struct mtd_partition da850_evm_nandflash_partition[] = { |
38beb929 SR |
217 | { |
218 | .name = "u-boot env", | |
219 | .offset = 0, | |
220 | .size = SZ_128K, | |
221 | .mask_flags = MTD_WRITEABLE, | |
222 | }, | |
223 | { | |
224 | .name = "UBL", | |
225 | .offset = MTDPART_OFS_APPEND, | |
226 | .size = SZ_128K, | |
227 | .mask_flags = MTD_WRITEABLE, | |
228 | }, | |
229 | { | |
230 | .name = "u-boot", | |
231 | .offset = MTDPART_OFS_APPEND, | |
232 | .size = 4 * SZ_128K, | |
233 | .mask_flags = MTD_WRITEABLE, | |
234 | }, | |
235 | { | |
236 | .name = "kernel", | |
237 | .offset = 0x200000, | |
238 | .size = SZ_2M, | |
239 | .mask_flags = 0, | |
240 | }, | |
241 | { | |
242 | .name = "filesystem", | |
243 | .offset = MTDPART_OFS_APPEND, | |
244 | .size = MTDPART_SIZ_FULL, | |
245 | .mask_flags = 0, | |
246 | }, | |
247 | }; | |
248 | ||
18a8505c SN |
249 | static struct davinci_aemif_timing da850_evm_nandflash_timing = { |
250 | .wsetup = 24, | |
251 | .wstrobe = 21, | |
252 | .whold = 14, | |
253 | .rsetup = 19, | |
254 | .rstrobe = 50, | |
255 | .rhold = 0, | |
256 | .ta = 20, | |
257 | }; | |
258 | ||
38beb929 SR |
259 | static struct davinci_nand_pdata da850_evm_nandflash_data = { |
260 | .parts = da850_evm_nandflash_partition, | |
261 | .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), | |
262 | .ecc_mode = NAND_ECC_HW, | |
fc42e335 | 263 | .ecc_bits = 4, |
bb9ebd4e | 264 | .bbt_options = NAND_BBT_USE_FLASH, |
18a8505c | 265 | .timing = &da850_evm_nandflash_timing, |
38beb929 SR |
266 | }; |
267 | ||
268 | static struct resource da850_evm_nandflash_resource[] = { | |
269 | { | |
270 | .start = DA8XX_AEMIF_CS3_BASE, | |
271 | .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1, | |
272 | .flags = IORESOURCE_MEM, | |
273 | }, | |
274 | { | |
275 | .start = DA8XX_AEMIF_CTL_BASE, | |
276 | .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, | |
277 | .flags = IORESOURCE_MEM, | |
278 | }, | |
279 | }; | |
280 | ||
281 | static struct platform_device da850_evm_nandflash_device = { | |
282 | .name = "davinci_nand", | |
283 | .id = 1, | |
284 | .dev = { | |
285 | .platform_data = &da850_evm_nandflash_data, | |
286 | }, | |
287 | .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource), | |
288 | .resource = da850_evm_nandflash_resource, | |
289 | }; | |
290 | ||
59858b71 | 291 | static struct platform_device *da850_evm_devices[] = { |
039c5ee3 SR |
292 | &da850_evm_nandflash_device, |
293 | &da850_evm_norflash_device, | |
294 | }; | |
295 | ||
296 | #define DA8XX_AEMIF_CE2CFG_OFFSET 0x10 | |
297 | #define DA8XX_AEMIF_ASIZE_16BIT 0x1 | |
298 | ||
299 | static void __init da850_evm_init_nor(void) | |
300 | { | |
301 | void __iomem *aemif_addr; | |
302 | ||
303 | aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K); | |
304 | ||
305 | /* Configure data bus width of CS2 to 16 bit */ | |
306 | writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) | | |
307 | DA8XX_AEMIF_ASIZE_16BIT, | |
308 | aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET); | |
309 | ||
310 | iounmap(aemif_addr); | |
311 | } | |
312 | ||
f48ecc2f SS |
313 | static const short da850_evm_nand_pins[] = { |
314 | DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3, | |
315 | DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7, | |
316 | DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4, | |
317 | DA850_NEMA_WE, DA850_NEMA_OE, | |
318 | -1 | |
319 | }; | |
320 | ||
321 | static const short da850_evm_nor_pins[] = { | |
322 | DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2, | |
323 | DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1, | |
324 | DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5, | |
325 | DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9, | |
326 | DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13, | |
327 | DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1, | |
328 | DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5, | |
329 | DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9, | |
330 | DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13, | |
331 | DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17, | |
332 | DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21, | |
333 | DA850_EMA_A_22, DA850_EMA_A_23, | |
334 | -1 | |
335 | }; | |
336 | ||
039c5ee3 SR |
337 | #if defined(CONFIG_MMC_DAVINCI) || \ |
338 | defined(CONFIG_MMC_DAVINCI_MODULE) | |
339 | #define HAS_MMC 1 | |
340 | #else | |
341 | #define HAS_MMC 0 | |
342 | #endif | |
343 | ||
f48ecc2f | 344 | static inline void da850_evm_setup_nor_nand(void) |
039c5ee3 SR |
345 | { |
346 | int ret = 0; | |
347 | ||
b688c2fb | 348 | if (!HAS_MMC) { |
f48ecc2f | 349 | ret = davinci_cfg_reg_list(da850_evm_nand_pins); |
039c5ee3 SR |
350 | if (ret) |
351 | pr_warning("da850_evm_init: nand mux setup failed: " | |
352 | "%d\n", ret); | |
353 | ||
f48ecc2f | 354 | ret = davinci_cfg_reg_list(da850_evm_nor_pins); |
039c5ee3 SR |
355 | if (ret) |
356 | pr_warning("da850_evm_init: nor mux setup failed: %d\n", | |
357 | ret); | |
358 | ||
359 | da850_evm_init_nor(); | |
360 | ||
361 | platform_add_devices(da850_evm_devices, | |
362 | ARRAY_SIZE(da850_evm_devices)); | |
363 | } | |
364 | } | |
75e2ea64 | 365 | |
bae10587 SN |
366 | #ifdef CONFIG_DA850_UI_RMII |
367 | static inline void da850_evm_setup_emac_rmii(int rmii_sel) | |
368 | { | |
369 | struct davinci_soc_info *soc_info = &davinci_soc_info; | |
370 | ||
371 | soc_info->emac_pdata->rmii_en = 1; | |
47e7cb14 | 372 | gpio_set_value_cansleep(rmii_sel, 0); |
bae10587 SN |
373 | } |
374 | #else | |
375 | static inline void da850_evm_setup_emac_rmii(int rmii_sel) { } | |
376 | #endif | |
377 | ||
75929f5e BG |
378 | |
379 | #define DA850_KEYS_DEBOUNCE_MS 10 | |
380 | /* | |
381 | * At 200ms polling interval it is possible to miss an | |
382 | * event by tapping very lightly on the push button but most | |
383 | * pushes do result in an event; longer intervals require the | |
384 | * user to hold the button whereas shorter intervals require | |
385 | * more CPU time for polling. | |
386 | */ | |
387 | #define DA850_GPIO_KEYS_POLL_MS 200 | |
388 | ||
389 | enum da850_evm_ui_exp_pins { | |
390 | DA850_EVM_UI_EXP_SEL_C = 5, | |
391 | DA850_EVM_UI_EXP_SEL_B, | |
392 | DA850_EVM_UI_EXP_SEL_A, | |
393 | DA850_EVM_UI_EXP_PB8, | |
394 | DA850_EVM_UI_EXP_PB7, | |
395 | DA850_EVM_UI_EXP_PB6, | |
396 | DA850_EVM_UI_EXP_PB5, | |
397 | DA850_EVM_UI_EXP_PB4, | |
398 | DA850_EVM_UI_EXP_PB3, | |
399 | DA850_EVM_UI_EXP_PB2, | |
400 | DA850_EVM_UI_EXP_PB1, | |
401 | }; | |
402 | ||
403 | static const char const *da850_evm_ui_exp[] = { | |
404 | [DA850_EVM_UI_EXP_SEL_C] = "sel_c", | |
405 | [DA850_EVM_UI_EXP_SEL_B] = "sel_b", | |
406 | [DA850_EVM_UI_EXP_SEL_A] = "sel_a", | |
407 | [DA850_EVM_UI_EXP_PB8] = "pb8", | |
408 | [DA850_EVM_UI_EXP_PB7] = "pb7", | |
409 | [DA850_EVM_UI_EXP_PB6] = "pb6", | |
410 | [DA850_EVM_UI_EXP_PB5] = "pb5", | |
411 | [DA850_EVM_UI_EXP_PB4] = "pb4", | |
412 | [DA850_EVM_UI_EXP_PB3] = "pb3", | |
413 | [DA850_EVM_UI_EXP_PB2] = "pb2", | |
414 | [DA850_EVM_UI_EXP_PB1] = "pb1", | |
415 | }; | |
416 | ||
417 | #define DA850_N_UI_PB 8 | |
418 | ||
419 | static struct gpio_keys_button da850_evm_ui_keys[] = { | |
420 | [0 ... DA850_N_UI_PB - 1] = { | |
421 | .type = EV_KEY, | |
422 | .active_low = 1, | |
423 | .wakeup = 0, | |
424 | .debounce_interval = DA850_KEYS_DEBOUNCE_MS, | |
425 | .code = -1, /* assigned at runtime */ | |
426 | .gpio = -1, /* assigned at runtime */ | |
427 | .desc = NULL, /* assigned at runtime */ | |
428 | }, | |
429 | }; | |
430 | ||
431 | static struct gpio_keys_platform_data da850_evm_ui_keys_pdata = { | |
432 | .buttons = da850_evm_ui_keys, | |
433 | .nbuttons = ARRAY_SIZE(da850_evm_ui_keys), | |
434 | .poll_interval = DA850_GPIO_KEYS_POLL_MS, | |
435 | }; | |
436 | ||
437 | static struct platform_device da850_evm_ui_keys_device = { | |
438 | .name = "gpio-keys-polled", | |
439 | .id = 0, | |
440 | .dev = { | |
441 | .platform_data = &da850_evm_ui_keys_pdata | |
442 | }, | |
443 | }; | |
444 | ||
445 | static void da850_evm_ui_keys_init(unsigned gpio) | |
446 | { | |
447 | int i; | |
448 | struct gpio_keys_button *button; | |
449 | ||
450 | for (i = 0; i < DA850_N_UI_PB; i++) { | |
451 | button = &da850_evm_ui_keys[i]; | |
452 | button->code = KEY_F8 - i; | |
453 | button->desc = (char *) | |
454 | da850_evm_ui_exp[DA850_EVM_UI_EXP_PB8 + i]; | |
455 | button->gpio = gpio + DA850_EVM_UI_EXP_PB8 + i; | |
456 | } | |
457 | } | |
458 | ||
1e046d17 MH |
459 | #ifdef CONFIG_DA850_UI_SD_VIDEO_PORT |
460 | static inline void da850_evm_setup_video_port(int video_sel) | |
461 | { | |
462 | gpio_set_value_cansleep(video_sel, 0); | |
463 | } | |
464 | #else | |
465 | static inline void da850_evm_setup_video_port(int video_sel) { } | |
466 | #endif | |
467 | ||
75e2ea64 C |
468 | static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio, |
469 | unsigned ngpio, void *c) | |
470 | { | |
471 | int sel_a, sel_b, sel_c, ret; | |
472 | ||
53c2897d BG |
473 | sel_a = gpio + DA850_EVM_UI_EXP_SEL_A; |
474 | sel_b = gpio + DA850_EVM_UI_EXP_SEL_B; | |
475 | sel_c = gpio + DA850_EVM_UI_EXP_SEL_C; | |
75e2ea64 | 476 | |
53c2897d | 477 | ret = gpio_request(sel_a, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_A]); |
75e2ea64 C |
478 | if (ret) { |
479 | pr_warning("Cannot open UI expander pin %d\n", sel_a); | |
480 | goto exp_setup_sela_fail; | |
481 | } | |
482 | ||
53c2897d | 483 | ret = gpio_request(sel_b, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_B]); |
75e2ea64 C |
484 | if (ret) { |
485 | pr_warning("Cannot open UI expander pin %d\n", sel_b); | |
486 | goto exp_setup_selb_fail; | |
487 | } | |
488 | ||
53c2897d | 489 | ret = gpio_request(sel_c, da850_evm_ui_exp[DA850_EVM_UI_EXP_SEL_C]); |
75e2ea64 C |
490 | if (ret) { |
491 | pr_warning("Cannot open UI expander pin %d\n", sel_c); | |
492 | goto exp_setup_selc_fail; | |
493 | } | |
494 | ||
495 | /* deselect all functionalities */ | |
496 | gpio_direction_output(sel_a, 1); | |
497 | gpio_direction_output(sel_b, 1); | |
498 | gpio_direction_output(sel_c, 1); | |
499 | ||
75929f5e BG |
500 | da850_evm_ui_keys_init(gpio); |
501 | ret = platform_device_register(&da850_evm_ui_keys_device); | |
502 | if (ret) { | |
503 | pr_warning("Could not register UI GPIO expander push-buttons"); | |
504 | goto exp_setup_keys_fail; | |
505 | } | |
506 | ||
75e2ea64 C |
507 | pr_info("DA850/OMAP-L138 EVM UI card detected\n"); |
508 | ||
509 | da850_evm_setup_nor_nand(); | |
510 | ||
bae10587 | 511 | da850_evm_setup_emac_rmii(sel_a); |
2206771c | 512 | |
1e046d17 MH |
513 | da850_evm_setup_video_port(sel_c); |
514 | ||
75e2ea64 C |
515 | return 0; |
516 | ||
75929f5e BG |
517 | exp_setup_keys_fail: |
518 | gpio_free(sel_c); | |
75e2ea64 C |
519 | exp_setup_selc_fail: |
520 | gpio_free(sel_b); | |
521 | exp_setup_selb_fail: | |
522 | gpio_free(sel_a); | |
523 | exp_setup_sela_fail: | |
524 | return ret; | |
525 | } | |
526 | ||
527 | static int da850_evm_ui_expander_teardown(struct i2c_client *client, | |
528 | unsigned gpio, unsigned ngpio, void *c) | |
529 | { | |
75929f5e BG |
530 | platform_device_unregister(&da850_evm_ui_keys_device); |
531 | ||
75e2ea64 | 532 | /* deselect all functionalities */ |
53c2897d BG |
533 | gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_C, 1); |
534 | gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_B, 1); | |
535 | gpio_set_value_cansleep(gpio + DA850_EVM_UI_EXP_SEL_A, 1); | |
75e2ea64 | 536 | |
53c2897d BG |
537 | gpio_free(gpio + DA850_EVM_UI_EXP_SEL_C); |
538 | gpio_free(gpio + DA850_EVM_UI_EXP_SEL_B); | |
539 | gpio_free(gpio + DA850_EVM_UI_EXP_SEL_A); | |
75e2ea64 C |
540 | |
541 | return 0; | |
542 | } | |
543 | ||
70b30939 BG |
544 | /* assign the baseboard expander's GPIOs after the UI board's */ |
545 | #define DA850_UI_EXPANDER_N_GPIOS ARRAY_SIZE(da850_evm_ui_exp) | |
546 | #define DA850_BB_EXPANDER_GPIO_BASE (DAVINCI_N_GPIO + DA850_UI_EXPANDER_N_GPIOS) | |
547 | ||
548 | enum da850_evm_bb_exp_pins { | |
549 | DA850_EVM_BB_EXP_DEEP_SLEEP_EN = 0, | |
550 | DA850_EVM_BB_EXP_SW_RST, | |
551 | DA850_EVM_BB_EXP_TP_23, | |
552 | DA850_EVM_BB_EXP_TP_22, | |
553 | DA850_EVM_BB_EXP_TP_21, | |
554 | DA850_EVM_BB_EXP_USER_PB1, | |
555 | DA850_EVM_BB_EXP_USER_LED2, | |
556 | DA850_EVM_BB_EXP_USER_LED1, | |
557 | DA850_EVM_BB_EXP_USER_SW1, | |
558 | DA850_EVM_BB_EXP_USER_SW2, | |
559 | DA850_EVM_BB_EXP_USER_SW3, | |
560 | DA850_EVM_BB_EXP_USER_SW4, | |
561 | DA850_EVM_BB_EXP_USER_SW5, | |
562 | DA850_EVM_BB_EXP_USER_SW6, | |
563 | DA850_EVM_BB_EXP_USER_SW7, | |
564 | DA850_EVM_BB_EXP_USER_SW8 | |
565 | }; | |
566 | ||
567 | static const char const *da850_evm_bb_exp[] = { | |
568 | [DA850_EVM_BB_EXP_DEEP_SLEEP_EN] = "deep_sleep_en", | |
569 | [DA850_EVM_BB_EXP_SW_RST] = "sw_rst", | |
570 | [DA850_EVM_BB_EXP_TP_23] = "tp_23", | |
571 | [DA850_EVM_BB_EXP_TP_22] = "tp_22", | |
572 | [DA850_EVM_BB_EXP_TP_21] = "tp_21", | |
573 | [DA850_EVM_BB_EXP_USER_PB1] = "user_pb1", | |
574 | [DA850_EVM_BB_EXP_USER_LED2] = "user_led2", | |
575 | [DA850_EVM_BB_EXP_USER_LED1] = "user_led1", | |
576 | [DA850_EVM_BB_EXP_USER_SW1] = "user_sw1", | |
577 | [DA850_EVM_BB_EXP_USER_SW2] = "user_sw2", | |
578 | [DA850_EVM_BB_EXP_USER_SW3] = "user_sw3", | |
579 | [DA850_EVM_BB_EXP_USER_SW4] = "user_sw4", | |
580 | [DA850_EVM_BB_EXP_USER_SW5] = "user_sw5", | |
581 | [DA850_EVM_BB_EXP_USER_SW6] = "user_sw6", | |
582 | [DA850_EVM_BB_EXP_USER_SW7] = "user_sw7", | |
583 | [DA850_EVM_BB_EXP_USER_SW8] = "user_sw8", | |
584 | }; | |
585 | ||
586 | #define DA850_N_BB_USER_SW 8 | |
587 | ||
588 | static struct gpio_keys_button da850_evm_bb_keys[] = { | |
589 | [0] = { | |
590 | .type = EV_KEY, | |
591 | .active_low = 1, | |
592 | .wakeup = 0, | |
593 | .debounce_interval = DA850_KEYS_DEBOUNCE_MS, | |
594 | .code = KEY_PROG1, | |
595 | .desc = NULL, /* assigned at runtime */ | |
596 | .gpio = -1, /* assigned at runtime */ | |
597 | }, | |
598 | [1 ... DA850_N_BB_USER_SW] = { | |
599 | .type = EV_SW, | |
600 | .active_low = 1, | |
601 | .wakeup = 0, | |
602 | .debounce_interval = DA850_KEYS_DEBOUNCE_MS, | |
603 | .code = -1, /* assigned at runtime */ | |
604 | .desc = NULL, /* assigned at runtime */ | |
605 | .gpio = -1, /* assigned at runtime */ | |
606 | }, | |
607 | }; | |
608 | ||
609 | static struct gpio_keys_platform_data da850_evm_bb_keys_pdata = { | |
610 | .buttons = da850_evm_bb_keys, | |
611 | .nbuttons = ARRAY_SIZE(da850_evm_bb_keys), | |
612 | .poll_interval = DA850_GPIO_KEYS_POLL_MS, | |
613 | }; | |
614 | ||
615 | static struct platform_device da850_evm_bb_keys_device = { | |
616 | .name = "gpio-keys-polled", | |
617 | .id = 1, | |
618 | .dev = { | |
619 | .platform_data = &da850_evm_bb_keys_pdata | |
620 | }, | |
621 | }; | |
622 | ||
623 | static void da850_evm_bb_keys_init(unsigned gpio) | |
624 | { | |
625 | int i; | |
626 | struct gpio_keys_button *button; | |
627 | ||
628 | button = &da850_evm_bb_keys[0]; | |
629 | button->desc = (char *) | |
630 | da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_PB1]; | |
631 | button->gpio = gpio + DA850_EVM_BB_EXP_USER_PB1; | |
632 | ||
633 | for (i = 0; i < DA850_N_BB_USER_SW; i++) { | |
634 | button = &da850_evm_bb_keys[i + 1]; | |
635 | button->code = SW_LID + i; | |
636 | button->desc = (char *) | |
637 | da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_SW1 + i]; | |
638 | button->gpio = gpio + DA850_EVM_BB_EXP_USER_SW1 + i; | |
639 | } | |
640 | } | |
641 | ||
642 | #define DA850_N_BB_USER_LED 2 | |
643 | ||
644 | static struct gpio_led da850_evm_bb_leds[] = { | |
645 | [0 ... DA850_N_BB_USER_LED - 1] = { | |
646 | .active_low = 1, | |
647 | .gpio = -1, /* assigned at runtime */ | |
648 | .name = NULL, /* assigned at runtime */ | |
649 | }, | |
650 | }; | |
651 | ||
652 | static struct gpio_led_platform_data da850_evm_bb_leds_pdata = { | |
653 | .leds = da850_evm_bb_leds, | |
654 | .num_leds = ARRAY_SIZE(da850_evm_bb_leds), | |
655 | }; | |
656 | ||
657 | static struct platform_device da850_evm_bb_leds_device = { | |
658 | .name = "leds-gpio", | |
659 | .id = -1, | |
660 | .dev = { | |
661 | .platform_data = &da850_evm_bb_leds_pdata | |
662 | } | |
663 | }; | |
664 | ||
665 | static void da850_evm_bb_leds_init(unsigned gpio) | |
666 | { | |
667 | int i; | |
668 | struct gpio_led *led; | |
669 | ||
670 | for (i = 0; i < DA850_N_BB_USER_LED; i++) { | |
671 | led = &da850_evm_bb_leds[i]; | |
672 | ||
673 | led->gpio = gpio + DA850_EVM_BB_EXP_USER_LED2 + i; | |
674 | led->name = | |
675 | da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_LED2 + i]; | |
676 | } | |
677 | } | |
678 | ||
679 | static int da850_evm_bb_expander_setup(struct i2c_client *client, | |
680 | unsigned gpio, unsigned ngpio, | |
681 | void *c) | |
682 | { | |
683 | int ret; | |
684 | ||
685 | /* | |
686 | * Register the switches and pushbutton on the baseboard as a gpio-keys | |
687 | * device. | |
688 | */ | |
689 | da850_evm_bb_keys_init(gpio); | |
690 | ret = platform_device_register(&da850_evm_bb_keys_device); | |
691 | if (ret) { | |
692 | pr_warning("Could not register baseboard GPIO expander keys"); | |
693 | goto io_exp_setup_sw_fail; | |
694 | } | |
695 | ||
696 | da850_evm_bb_leds_init(gpio); | |
697 | ret = platform_device_register(&da850_evm_bb_leds_device); | |
698 | if (ret) { | |
699 | pr_warning("Could not register baseboard GPIO expander LEDS"); | |
700 | goto io_exp_setup_leds_fail; | |
701 | } | |
702 | ||
703 | return 0; | |
704 | ||
705 | io_exp_setup_leds_fail: | |
706 | platform_device_unregister(&da850_evm_bb_keys_device); | |
707 | io_exp_setup_sw_fail: | |
708 | return ret; | |
709 | } | |
710 | ||
711 | static int da850_evm_bb_expander_teardown(struct i2c_client *client, | |
712 | unsigned gpio, unsigned ngpio, void *c) | |
713 | { | |
714 | platform_device_unregister(&da850_evm_bb_leds_device); | |
715 | platform_device_unregister(&da850_evm_bb_keys_device); | |
716 | ||
717 | return 0; | |
718 | } | |
719 | ||
75e2ea64 C |
720 | static struct pca953x_platform_data da850_evm_ui_expander_info = { |
721 | .gpio_base = DAVINCI_N_GPIO, | |
722 | .setup = da850_evm_ui_expander_setup, | |
723 | .teardown = da850_evm_ui_expander_teardown, | |
75929f5e | 724 | .names = da850_evm_ui_exp, |
75e2ea64 C |
725 | }; |
726 | ||
70b30939 BG |
727 | static struct pca953x_platform_data da850_evm_bb_expander_info = { |
728 | .gpio_base = DA850_BB_EXPANDER_GPIO_BASE, | |
729 | .setup = da850_evm_bb_expander_setup, | |
730 | .teardown = da850_evm_bb_expander_teardown, | |
731 | .names = da850_evm_bb_exp, | |
732 | }; | |
733 | ||
1a7ff8ff C |
734 | static struct i2c_board_info __initdata da850_evm_i2c_devices[] = { |
735 | { | |
736 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
75e2ea64 C |
737 | }, |
738 | { | |
739 | I2C_BOARD_INFO("tca6416", 0x20), | |
740 | .platform_data = &da850_evm_ui_expander_info, | |
741 | }, | |
70b30939 BG |
742 | { |
743 | I2C_BOARD_INFO("tca6416", 0x21), | |
744 | .platform_data = &da850_evm_bb_expander_info, | |
745 | }, | |
1a7ff8ff C |
746 | }; |
747 | ||
0fbc5592 SR |
748 | static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = { |
749 | .bus_freq = 100, /* kHz */ | |
750 | .bus_delay = 0, /* usec */ | |
751 | }; | |
752 | ||
753 | static struct davinci_uart_config da850_evm_uart_config __initdata = { | |
754 | .enabled_uarts = 0x7, | |
755 | }; | |
756 | ||
491214e1 C |
757 | /* davinci da850 evm audio machine driver */ |
758 | static u8 da850_iis_serializer_direction[] = { | |
759 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
760 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
761 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE, | |
762 | RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
763 | }; | |
764 | ||
765 | static struct snd_platform_data da850_evm_snd_data = { | |
88abfd5b MP |
766 | .tx_dma_offset = 0x2000, |
767 | .rx_dma_offset = 0x2000, | |
768 | .op_mode = DAVINCI_MCASP_IIS_MODE, | |
769 | .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), | |
770 | .tdm_slots = 2, | |
771 | .serial_dir = da850_iis_serializer_direction, | |
772 | .asp_chan_q = EVENTQ_0, | |
773 | .ram_chan_q = EVENTQ_1, | |
774 | .version = MCASP_VERSION_2, | |
775 | .txnumevt = 1, | |
776 | .rxnumevt = 1, | |
777 | .sram_size_playback = SZ_8K, | |
778 | .sram_size_capture = SZ_8K, | |
491214e1 C |
779 | }; |
780 | ||
c840fc74 MW |
781 | static const short da850_evm_mcasp_pins[] __initconst = { |
782 | DA850_AHCLKX, DA850_ACLKX, DA850_AFSX, | |
783 | DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE, | |
784 | DA850_AXR_11, DA850_AXR_12, | |
785 | -1 | |
786 | }; | |
787 | ||
700691f2 SR |
788 | static int da850_evm_mmc_get_ro(int index) |
789 | { | |
790 | return gpio_get_value(DA850_MMCSD_WP_PIN); | |
791 | } | |
792 | ||
793 | static int da850_evm_mmc_get_cd(int index) | |
794 | { | |
795 | return !gpio_get_value(DA850_MMCSD_CD_PIN); | |
796 | } | |
797 | ||
798 | static struct davinci_mmc_config da850_mmc_config = { | |
799 | .get_ro = da850_evm_mmc_get_ro, | |
800 | .get_cd = da850_evm_mmc_get_cd, | |
801 | .wires = 4, | |
0046d0bf C |
802 | .max_freq = 50000000, |
803 | .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, | |
700691f2 SR |
804 | .version = MMC_CTLR_VERSION_2, |
805 | }; | |
806 | ||
5a0d80ea MW |
807 | static const short da850_evm_mmcsd0_pins[] __initconst = { |
808 | DA850_MMCSD0_DAT_0, DA850_MMCSD0_DAT_1, DA850_MMCSD0_DAT_2, | |
809 | DA850_MMCSD0_DAT_3, DA850_MMCSD0_CLK, DA850_MMCSD0_CMD, | |
810 | DA850_GPIO4_0, DA850_GPIO4_1, | |
811 | -1 | |
812 | }; | |
813 | ||
d52f235f C |
814 | static void da850_panel_power_ctrl(int val) |
815 | { | |
816 | /* lcd backlight */ | |
817 | gpio_set_value(DA850_LCD_BL_PIN, val); | |
818 | ||
819 | /* lcd power */ | |
820 | gpio_set_value(DA850_LCD_PWR_PIN, val); | |
821 | } | |
822 | ||
5cbdf276 SR |
823 | static int da850_lcd_hw_init(void) |
824 | { | |
825 | int status; | |
826 | ||
827 | status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n"); | |
828 | if (status < 0) | |
829 | return status; | |
830 | ||
831 | status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n"); | |
832 | if (status < 0) { | |
833 | gpio_free(DA850_LCD_BL_PIN); | |
834 | return status; | |
835 | } | |
836 | ||
837 | gpio_direction_output(DA850_LCD_BL_PIN, 0); | |
838 | gpio_direction_output(DA850_LCD_PWR_PIN, 0); | |
839 | ||
d52f235f C |
840 | /* Switch off panel power and backlight */ |
841 | da850_panel_power_ctrl(0); | |
5cbdf276 | 842 | |
d52f235f C |
843 | /* Switch on panel power and backlight */ |
844 | da850_panel_power_ctrl(1); | |
5cbdf276 SR |
845 | |
846 | return 0; | |
847 | } | |
491214e1 | 848 | |
a9eb1f67 SN |
849 | /* TPS65070 voltage regulator support */ |
850 | ||
851 | /* 3.3V */ | |
db549d22 | 852 | static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = { |
a9eb1f67 SN |
853 | { |
854 | .supply = "usb0_vdda33", | |
855 | }, | |
856 | { | |
857 | .supply = "usb1_vdda33", | |
858 | }, | |
859 | }; | |
860 | ||
861 | /* 3.3V or 1.8V */ | |
db549d22 | 862 | static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = { |
a9eb1f67 SN |
863 | { |
864 | .supply = "dvdd3318_a", | |
865 | }, | |
866 | { | |
867 | .supply = "dvdd3318_b", | |
868 | }, | |
869 | { | |
870 | .supply = "dvdd3318_c", | |
871 | }, | |
872 | }; | |
873 | ||
874 | /* 1.2V */ | |
db549d22 | 875 | static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = { |
a9eb1f67 SN |
876 | { |
877 | .supply = "cvdd", | |
878 | }, | |
879 | }; | |
880 | ||
881 | /* 1.8V LDO */ | |
db549d22 | 882 | static struct regulator_consumer_supply tps65070_ldo1_consumers[] = { |
a9eb1f67 SN |
883 | { |
884 | .supply = "sata_vddr", | |
885 | }, | |
886 | { | |
887 | .supply = "usb0_vdda18", | |
888 | }, | |
889 | { | |
890 | .supply = "usb1_vdda18", | |
891 | }, | |
892 | { | |
893 | .supply = "ddr_dvdd18", | |
894 | }, | |
895 | }; | |
896 | ||
897 | /* 1.2V LDO */ | |
db549d22 | 898 | static struct regulator_consumer_supply tps65070_ldo2_consumers[] = { |
a9eb1f67 SN |
899 | { |
900 | .supply = "sata_vdd", | |
901 | }, | |
902 | { | |
903 | .supply = "pll0_vdda", | |
904 | }, | |
905 | { | |
906 | .supply = "pll1_vdda", | |
907 | }, | |
908 | { | |
909 | .supply = "usbs_cvdd", | |
910 | }, | |
911 | { | |
912 | .supply = "vddarnwa1", | |
913 | }, | |
914 | }; | |
915 | ||
8b24599e SN |
916 | /* We take advantage of the fact that both defdcdc{2,3} are tied high */ |
917 | static struct tps6507x_reg_platform_data tps6507x_platform_data = { | |
918 | .defdcdc_default = true, | |
919 | }; | |
920 | ||
db549d22 | 921 | static struct regulator_init_data tps65070_regulator_data[] = { |
a9eb1f67 SN |
922 | /* dcdc1 */ |
923 | { | |
924 | .constraints = { | |
925 | .min_uV = 3150000, | |
926 | .max_uV = 3450000, | |
927 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
928 | REGULATOR_CHANGE_STATUS), | |
929 | .boot_on = 1, | |
930 | }, | |
931 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers), | |
932 | .consumer_supplies = tps65070_dcdc1_consumers, | |
933 | }, | |
934 | ||
935 | /* dcdc2 */ | |
936 | { | |
937 | .constraints = { | |
938 | .min_uV = 1710000, | |
939 | .max_uV = 3450000, | |
940 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
941 | REGULATOR_CHANGE_STATUS), | |
942 | .boot_on = 1, | |
943 | }, | |
944 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers), | |
945 | .consumer_supplies = tps65070_dcdc2_consumers, | |
8b24599e | 946 | .driver_data = &tps6507x_platform_data, |
a9eb1f67 SN |
947 | }, |
948 | ||
949 | /* dcdc3 */ | |
950 | { | |
951 | .constraints = { | |
952 | .min_uV = 950000, | |
28bd2c34 | 953 | .max_uV = 1350000, |
a9eb1f67 SN |
954 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | |
955 | REGULATOR_CHANGE_STATUS), | |
956 | .boot_on = 1, | |
957 | }, | |
958 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers), | |
959 | .consumer_supplies = tps65070_dcdc3_consumers, | |
8b24599e | 960 | .driver_data = &tps6507x_platform_data, |
a9eb1f67 SN |
961 | }, |
962 | ||
963 | /* ldo1 */ | |
964 | { | |
965 | .constraints = { | |
966 | .min_uV = 1710000, | |
967 | .max_uV = 1890000, | |
968 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
969 | REGULATOR_CHANGE_STATUS), | |
970 | .boot_on = 1, | |
971 | }, | |
972 | .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers), | |
973 | .consumer_supplies = tps65070_ldo1_consumers, | |
974 | }, | |
975 | ||
976 | /* ldo2 */ | |
977 | { | |
978 | .constraints = { | |
979 | .min_uV = 1140000, | |
980 | .max_uV = 1320000, | |
981 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
982 | REGULATOR_CHANGE_STATUS), | |
983 | .boot_on = 1, | |
984 | }, | |
985 | .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers), | |
986 | .consumer_supplies = tps65070_ldo2_consumers, | |
987 | }, | |
988 | }; | |
989 | ||
da1e3680 TF |
990 | static struct touchscreen_init_data tps6507x_touchscreen_data = { |
991 | .poll_period = 30, /* ms between touch samples */ | |
992 | .min_pressure = 0x30, /* minimum pressure to trigger touch */ | |
993 | .vref = 0, /* turn off vref when not using A/D */ | |
994 | .vendor = 0, /* /sys/class/input/input?/id/vendor */ | |
995 | .product = 65070, /* /sys/class/input/input?/id/product */ | |
996 | .version = 0x100, /* /sys/class/input/input?/id/version */ | |
997 | }; | |
998 | ||
0bc20bba TF |
999 | static struct tps6507x_board tps_board = { |
1000 | .tps6507x_pmic_init_data = &tps65070_regulator_data[0], | |
da1e3680 | 1001 | .tps6507x_ts_init_data = &tps6507x_touchscreen_data, |
0bc20bba TF |
1002 | }; |
1003 | ||
3506f277 | 1004 | static struct i2c_board_info __initdata da850_evm_tps65070_info[] = { |
a9eb1f67 SN |
1005 | { |
1006 | I2C_BOARD_INFO("tps6507x", 0x48), | |
0bc20bba | 1007 | .platform_data = &tps_board, |
a9eb1f67 SN |
1008 | }, |
1009 | }; | |
1010 | ||
1011 | static int __init pmic_tps65070_init(void) | |
1012 | { | |
3506f277 BG |
1013 | return i2c_register_board_info(1, da850_evm_tps65070_info, |
1014 | ARRAY_SIZE(da850_evm_tps65070_info)); | |
a9eb1f67 SN |
1015 | } |
1016 | ||
7761ef67 SR |
1017 | static const short da850_evm_lcdc_pins[] = { |
1018 | DA850_GPIO2_8, DA850_GPIO2_15, | |
1019 | -1 | |
1020 | }; | |
1021 | ||
85b8307f SS |
1022 | static const short da850_evm_mii_pins[] = { |
1023 | DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, | |
1024 | DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, | |
1025 | DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, | |
1026 | DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, | |
1027 | DA850_MDIO_D, | |
1028 | -1 | |
1029 | }; | |
1030 | ||
1031 | static const short da850_evm_rmii_pins[] = { | |
1032 | DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, | |
1033 | DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, | |
1034 | DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK, | |
1035 | DA850_MDIO_D, | |
1036 | -1 | |
1037 | }; | |
1038 | ||
bae10587 | 1039 | static int __init da850_evm_config_emac(void) |
2206771c C |
1040 | { |
1041 | void __iomem *cfg_chip3_base; | |
1042 | int ret; | |
1043 | u32 val; | |
bae10587 SN |
1044 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
1045 | u8 rmii_en = soc_info->emac_pdata->rmii_en; | |
1046 | ||
1047 | if (!machine_is_davinci_da850_evm()) | |
1048 | return 0; | |
2206771c | 1049 | |
d2de0582 | 1050 | cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); |
2206771c | 1051 | |
2206771c | 1052 | val = __raw_readl(cfg_chip3_base); |
17fadd9a SN |
1053 | |
1054 | if (rmii_en) { | |
2206771c | 1055 | val |= BIT(8); |
85b8307f | 1056 | ret = davinci_cfg_reg_list(da850_evm_rmii_pins); |
17fadd9a SN |
1057 | pr_info("EMAC: RMII PHY configured, MII PHY will not be" |
1058 | " functional\n"); | |
1059 | } else { | |
2206771c | 1060 | val &= ~BIT(8); |
85b8307f | 1061 | ret = davinci_cfg_reg_list(da850_evm_mii_pins); |
17fadd9a SN |
1062 | pr_info("EMAC: MII PHY configured, RMII PHY will not be" |
1063 | " functional\n"); | |
1064 | } | |
1065 | ||
2206771c C |
1066 | if (ret) |
1067 | pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n", | |
1068 | ret); | |
1069 | ||
17fadd9a SN |
1070 | /* configure the CFGCHIP3 register for RMII or MII */ |
1071 | __raw_writel(val, cfg_chip3_base); | |
1072 | ||
2206771c C |
1073 | ret = davinci_cfg_reg(DA850_GPIO2_6); |
1074 | if (ret) | |
1075 | pr_warning("da850_evm_init:GPIO(2,6) mux setup " | |
1076 | "failed\n"); | |
1077 | ||
1078 | ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en"); | |
1079 | if (ret) { | |
1080 | pr_warning("Cannot open GPIO %d\n", | |
1081 | DA850_MII_MDIO_CLKEN_PIN); | |
1082 | return ret; | |
1083 | } | |
1084 | ||
17fadd9a SN |
1085 | /* Enable/Disable MII MDIO clock */ |
1086 | gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en); | |
2206771c | 1087 | |
782f2d78 | 1088 | soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID; |
bae10587 SN |
1089 | |
1090 | ret = da8xx_register_emac(); | |
1091 | if (ret) | |
1092 | pr_warning("da850_evm_init: emac registration failed: %d\n", | |
1093 | ret); | |
1094 | ||
2206771c C |
1095 | return 0; |
1096 | } | |
bae10587 | 1097 | device_initcall(da850_evm_config_emac); |
2206771c | 1098 | |
a941c503 RS |
1099 | /* |
1100 | * The following EDMA channels/slots are not being used by drivers (for | |
1101 | * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence | |
1102 | * they are being reserved for codecs on the DSP side. | |
1103 | */ | |
1104 | static const s16 da850_dma0_rsv_chans[][2] = { | |
1105 | /* (offset, number) */ | |
1106 | { 8, 6}, | |
1107 | {24, 4}, | |
1108 | {30, 2}, | |
1109 | {-1, -1} | |
1110 | }; | |
1111 | ||
1112 | static const s16 da850_dma0_rsv_slots[][2] = { | |
1113 | /* (offset, number) */ | |
1114 | { 8, 6}, | |
1115 | {24, 4}, | |
1116 | {30, 50}, | |
1117 | {-1, -1} | |
1118 | }; | |
1119 | ||
1120 | static const s16 da850_dma1_rsv_chans[][2] = { | |
1121 | /* (offset, number) */ | |
1122 | { 0, 28}, | |
1123 | {30, 2}, | |
1124 | {-1, -1} | |
1125 | }; | |
1126 | ||
1127 | static const s16 da850_dma1_rsv_slots[][2] = { | |
1128 | /* (offset, number) */ | |
1129 | { 0, 28}, | |
1130 | {30, 90}, | |
1131 | {-1, -1} | |
1132 | }; | |
1133 | ||
1134 | static struct edma_rsv_info da850_edma_cc0_rsv = { | |
1135 | .rsv_chans = da850_dma0_rsv_chans, | |
1136 | .rsv_slots = da850_dma0_rsv_slots, | |
1137 | }; | |
1138 | ||
1139 | static struct edma_rsv_info da850_edma_cc1_rsv = { | |
1140 | .rsv_chans = da850_dma1_rsv_chans, | |
1141 | .rsv_slots = da850_dma1_rsv_slots, | |
1142 | }; | |
1143 | ||
1144 | static struct edma_rsv_info *da850_edma_rsv[2] = { | |
1145 | &da850_edma_cc0_rsv, | |
1146 | &da850_edma_cc1_rsv, | |
1147 | }; | |
1148 | ||
28bd2c34 SN |
1149 | #ifdef CONFIG_CPU_FREQ |
1150 | static __init int da850_evm_init_cpufreq(void) | |
1151 | { | |
1152 | switch (system_rev & 0xF) { | |
1153 | case 3: | |
1154 | da850_max_speed = 456000; | |
1155 | break; | |
1156 | case 2: | |
1157 | da850_max_speed = 408000; | |
1158 | break; | |
1159 | case 1: | |
1160 | da850_max_speed = 372000; | |
1161 | break; | |
1162 | } | |
1163 | ||
1164 | return da850_register_cpufreq("pll0_sysclk3"); | |
1165 | } | |
1166 | #else | |
1167 | static __init int da850_evm_init_cpufreq(void) { return 0; } | |
1168 | #endif | |
1169 | ||
1e046d17 MH |
1170 | #if defined(CONFIG_DA850_UI_SD_VIDEO_PORT) |
1171 | ||
1172 | #define TVP5147_CH0 "tvp514x-0" | |
1173 | #define TVP5147_CH1 "tvp514x-1" | |
1174 | ||
1175 | /* VPIF capture configuration */ | |
1176 | static struct tvp514x_platform_data tvp5146_pdata = { | |
1177 | .clk_polarity = 0, | |
1178 | .hs_polarity = 1, | |
1179 | .vs_polarity = 1, | |
1180 | }; | |
1181 | ||
1182 | #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) | |
1183 | ||
1184 | static const struct vpif_input da850_ch0_inputs[] = { | |
1185 | { | |
1186 | .input = { | |
1187 | .index = 0, | |
1188 | .name = "Composite", | |
1189 | .type = V4L2_INPUT_TYPE_CAMERA, | |
7aaad131 | 1190 | .capabilities = V4L2_IN_CAP_STD, |
1e046d17 MH |
1191 | .std = TVP514X_STD_ALL, |
1192 | }, | |
7aaad131 HV |
1193 | .input_route = INPUT_CVBS_VI2B, |
1194 | .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC, | |
1e046d17 MH |
1195 | .subdev_name = TVP5147_CH0, |
1196 | }, | |
1197 | }; | |
1198 | ||
1199 | static const struct vpif_input da850_ch1_inputs[] = { | |
1200 | { | |
1201 | .input = { | |
1202 | .index = 0, | |
1203 | .name = "S-Video", | |
1204 | .type = V4L2_INPUT_TYPE_CAMERA, | |
7aaad131 | 1205 | .capabilities = V4L2_IN_CAP_STD, |
1e046d17 MH |
1206 | .std = TVP514X_STD_ALL, |
1207 | }, | |
7aaad131 HV |
1208 | .input_route = INPUT_SVIDEO_VI2C_VI1C, |
1209 | .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC, | |
1e046d17 MH |
1210 | .subdev_name = TVP5147_CH1, |
1211 | }, | |
1212 | }; | |
1213 | ||
1214 | static struct vpif_subdev_info da850_vpif_capture_sdev_info[] = { | |
1215 | { | |
1216 | .name = TVP5147_CH0, | |
1217 | .board_info = { | |
1218 | I2C_BOARD_INFO("tvp5146", 0x5d), | |
1219 | .platform_data = &tvp5146_pdata, | |
1220 | }, | |
1e046d17 MH |
1221 | }, |
1222 | { | |
1223 | .name = TVP5147_CH1, | |
1224 | .board_info = { | |
1225 | I2C_BOARD_INFO("tvp5146", 0x5c), | |
1226 | .platform_data = &tvp5146_pdata, | |
1227 | }, | |
1e046d17 MH |
1228 | }, |
1229 | }; | |
1230 | ||
1231 | static struct vpif_capture_config da850_vpif_capture_config = { | |
1232 | .subdev_info = da850_vpif_capture_sdev_info, | |
1233 | .subdev_count = ARRAY_SIZE(da850_vpif_capture_sdev_info), | |
1234 | .chan_config[0] = { | |
1235 | .inputs = da850_ch0_inputs, | |
1236 | .input_count = ARRAY_SIZE(da850_ch0_inputs), | |
0d4f35f3 HV |
1237 | .vpif_if = { |
1238 | .if_type = VPIF_IF_BT656, | |
1239 | .hd_pol = 1, | |
1240 | .vd_pol = 1, | |
1241 | .fid_pol = 0, | |
1242 | }, | |
1e046d17 MH |
1243 | }, |
1244 | .chan_config[1] = { | |
1245 | .inputs = da850_ch1_inputs, | |
1246 | .input_count = ARRAY_SIZE(da850_ch1_inputs), | |
0d4f35f3 HV |
1247 | .vpif_if = { |
1248 | .if_type = VPIF_IF_BT656, | |
1249 | .hd_pol = 1, | |
1250 | .vd_pol = 1, | |
1251 | .fid_pol = 0, | |
1252 | }, | |
1e046d17 MH |
1253 | }, |
1254 | .card_name = "DA850/OMAP-L138 Video Capture", | |
1255 | }; | |
1256 | ||
1257 | /* VPIF display configuration */ | |
1258 | static struct vpif_subdev_info da850_vpif_subdev[] = { | |
1259 | { | |
1260 | .name = "adv7343", | |
1261 | .board_info = { | |
1262 | I2C_BOARD_INFO("adv7343", 0x2a), | |
1263 | }, | |
1264 | }, | |
1265 | }; | |
1266 | ||
2bd4e58c LP |
1267 | static const struct vpif_output da850_ch0_outputs[] = { |
1268 | { | |
1269 | .output = { | |
1270 | .index = 0, | |
1271 | .name = "Composite", | |
1272 | .type = V4L2_OUTPUT_TYPE_ANALOG, | |
1273 | .capabilities = V4L2_OUT_CAP_STD, | |
1274 | .std = V4L2_STD_ALL, | |
1275 | }, | |
1276 | .subdev_name = "adv7343", | |
1277 | .output_route = ADV7343_COMPOSITE_ID, | |
1278 | }, | |
1279 | { | |
1280 | .output = { | |
1281 | .index = 1, | |
1282 | .name = "S-Video", | |
1283 | .type = V4L2_OUTPUT_TYPE_ANALOG, | |
1284 | .capabilities = V4L2_OUT_CAP_STD, | |
1285 | .std = V4L2_STD_ALL, | |
1286 | }, | |
1287 | .subdev_name = "adv7343", | |
1288 | .output_route = ADV7343_SVIDEO_ID, | |
1289 | }, | |
1e046d17 MH |
1290 | }; |
1291 | ||
1292 | static struct vpif_display_config da850_vpif_display_config = { | |
1293 | .subdevinfo = da850_vpif_subdev, | |
1294 | .subdev_count = ARRAY_SIZE(da850_vpif_subdev), | |
2bd4e58c LP |
1295 | .chan_config[0] = { |
1296 | .outputs = da850_ch0_outputs, | |
1297 | .output_count = ARRAY_SIZE(da850_ch0_outputs), | |
1298 | }, | |
1e046d17 MH |
1299 | .card_name = "DA850/OMAP-L138 Video Display", |
1300 | }; | |
1301 | ||
1302 | static __init void da850_vpif_init(void) | |
1303 | { | |
1304 | int ret; | |
1305 | ||
1306 | ret = da850_register_vpif(); | |
1307 | if (ret) | |
1308 | pr_warn("da850_evm_init: VPIF setup failed: %d\n", ret); | |
1309 | ||
1310 | ret = davinci_cfg_reg_list(da850_vpif_capture_pins); | |
1311 | if (ret) | |
1312 | pr_warn("da850_evm_init: VPIF capture mux setup failed: %d\n", | |
1313 | ret); | |
1314 | ||
1315 | ret = da850_register_vpif_capture(&da850_vpif_capture_config); | |
1316 | if (ret) | |
1317 | pr_warn("da850_evm_init: VPIF capture setup failed: %d\n", ret); | |
1318 | ||
1319 | ret = davinci_cfg_reg_list(da850_vpif_display_pins); | |
1320 | if (ret) | |
1321 | pr_warn("da850_evm_init: VPIF display mux setup failed: %d\n", | |
1322 | ret); | |
1323 | ||
1324 | ret = da850_register_vpif_display(&da850_vpif_display_config); | |
1325 | if (ret) | |
1326 | pr_warn("da850_evm_init: VPIF display setup failed: %d\n", ret); | |
1327 | } | |
1328 | ||
1329 | #else | |
1330 | static __init void da850_vpif_init(void) {} | |
1331 | #endif | |
1332 | ||
ab3f5c1f IY |
1333 | #ifdef CONFIG_DA850_WL12XX |
1334 | ||
1335 | static void wl12xx_set_power(int index, bool power_on) | |
1336 | { | |
1337 | static bool power_state; | |
1338 | ||
1339 | pr_debug("Powering %s wl12xx", power_on ? "on" : "off"); | |
1340 | ||
1341 | if (power_on == power_state) | |
1342 | return; | |
1343 | power_state = power_on; | |
1344 | ||
1345 | if (power_on) { | |
1346 | /* Power up sequence required for wl127x devices */ | |
1347 | gpio_set_value(DA850_WLAN_EN, 1); | |
1348 | usleep_range(15000, 15000); | |
1349 | gpio_set_value(DA850_WLAN_EN, 0); | |
1350 | usleep_range(1000, 1000); | |
1351 | gpio_set_value(DA850_WLAN_EN, 1); | |
1352 | msleep(70); | |
1353 | } else { | |
1354 | gpio_set_value(DA850_WLAN_EN, 0); | |
1355 | } | |
1356 | } | |
1357 | ||
1358 | static struct davinci_mmc_config da850_wl12xx_mmc_config = { | |
1359 | .set_power = wl12xx_set_power, | |
1360 | .wires = 4, | |
1361 | .max_freq = 25000000, | |
1362 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_NONREMOVABLE | | |
1363 | MMC_CAP_POWER_OFF_CARD, | |
1364 | .version = MMC_CTLR_VERSION_2, | |
1365 | }; | |
1366 | ||
1367 | static const short da850_wl12xx_pins[] __initconst = { | |
1368 | DA850_MMCSD1_DAT_0, DA850_MMCSD1_DAT_1, DA850_MMCSD1_DAT_2, | |
1369 | DA850_MMCSD1_DAT_3, DA850_MMCSD1_CLK, DA850_MMCSD1_CMD, | |
1370 | DA850_GPIO6_9, DA850_GPIO6_10, | |
1371 | -1 | |
1372 | }; | |
1373 | ||
1374 | static struct wl12xx_platform_data da850_wl12xx_wlan_data __initdata = { | |
1375 | .irq = -1, | |
1376 | .board_ref_clock = WL12XX_REFCLOCK_38, | |
1377 | .platform_quirks = WL12XX_PLATFORM_QUIRK_EDGE_IRQ, | |
1378 | }; | |
1379 | ||
1380 | static __init int da850_wl12xx_init(void) | |
1381 | { | |
1382 | int ret; | |
1383 | ||
1384 | ret = davinci_cfg_reg_list(da850_wl12xx_pins); | |
1385 | if (ret) { | |
1386 | pr_err("wl12xx/mmc mux setup failed: %d\n", ret); | |
1387 | goto exit; | |
1388 | } | |
1389 | ||
1390 | ret = da850_register_mmcsd1(&da850_wl12xx_mmc_config); | |
1391 | if (ret) { | |
1392 | pr_err("wl12xx/mmc registration failed: %d\n", ret); | |
1393 | goto exit; | |
1394 | } | |
1395 | ||
1396 | ret = gpio_request_one(DA850_WLAN_EN, GPIOF_OUT_INIT_LOW, "wl12xx_en"); | |
1397 | if (ret) { | |
1398 | pr_err("Could not request wl12xx enable gpio: %d\n", ret); | |
1399 | goto exit; | |
1400 | } | |
1401 | ||
1402 | ret = gpio_request_one(DA850_WLAN_IRQ, GPIOF_IN, "wl12xx_irq"); | |
1403 | if (ret) { | |
1404 | pr_err("Could not request wl12xx irq gpio: %d\n", ret); | |
1405 | goto free_wlan_en; | |
1406 | } | |
1407 | ||
1408 | da850_wl12xx_wlan_data.irq = gpio_to_irq(DA850_WLAN_IRQ); | |
1409 | ||
1410 | ret = wl12xx_set_platform_data(&da850_wl12xx_wlan_data); | |
1411 | if (ret) { | |
1412 | pr_err("Could not set wl12xx data: %d\n", ret); | |
1413 | goto free_wlan_irq; | |
1414 | } | |
1415 | ||
1416 | return 0; | |
1417 | ||
1418 | free_wlan_irq: | |
1419 | gpio_free(DA850_WLAN_IRQ); | |
1420 | ||
1421 | free_wlan_en: | |
1422 | gpio_free(DA850_WLAN_EN); | |
1423 | ||
1424 | exit: | |
1425 | return ret; | |
1426 | } | |
1427 | ||
1428 | #else /* CONFIG_DA850_WL12XX */ | |
1429 | ||
1430 | static __init int da850_wl12xx_init(void) | |
1431 | { | |
1432 | return 0; | |
1433 | } | |
1434 | ||
1435 | #endif /* CONFIG_DA850_WL12XX */ | |
1436 | ||
8bb2c481 SN |
1437 | #define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000) |
1438 | ||
0fbc5592 SR |
1439 | static __init void da850_evm_init(void) |
1440 | { | |
1441 | int ret; | |
1442 | ||
a9eb1f67 SN |
1443 | ret = pmic_tps65070_init(); |
1444 | if (ret) | |
1445 | pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n", | |
1446 | ret); | |
1447 | ||
a941c503 | 1448 | ret = da850_register_edma(da850_edma_rsv); |
0fbc5592 SR |
1449 | if (ret) |
1450 | pr_warning("da850_evm_init: edma registration failed: %d\n", | |
1451 | ret); | |
1452 | ||
3821d10a | 1453 | ret = davinci_cfg_reg_list(da850_i2c0_pins); |
0fbc5592 SR |
1454 | if (ret) |
1455 | pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n", | |
1456 | ret); | |
1457 | ||
1458 | ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata); | |
1459 | if (ret) | |
1460 | pr_warning("da850_evm_init: i2c0 registration failed: %d\n", | |
1461 | ret); | |
1462 | ||
5a4b1315 | 1463 | |
0fbc5592 SR |
1464 | ret = da8xx_register_watchdog(); |
1465 | if (ret) | |
1466 | pr_warning("da830_evm_init: watchdog registration failed: %d\n", | |
1467 | ret); | |
1468 | ||
820c4fe3 | 1469 | if (HAS_MMC) { |
5a0d80ea | 1470 | ret = davinci_cfg_reg_list(da850_evm_mmcsd0_pins); |
820c4fe3 SR |
1471 | if (ret) |
1472 | pr_warning("da850_evm_init: mmcsd0 mux setup failed:" | |
1473 | " %d\n", ret); | |
1474 | ||
1475 | ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n"); | |
1476 | if (ret) | |
1477 | pr_warning("da850_evm_init: can not open GPIO %d\n", | |
1478 | DA850_MMCSD_CD_PIN); | |
1479 | gpio_direction_input(DA850_MMCSD_CD_PIN); | |
1480 | ||
1481 | ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n"); | |
1482 | if (ret) | |
1483 | pr_warning("da850_evm_init: can not open GPIO %d\n", | |
1484 | DA850_MMCSD_WP_PIN); | |
1485 | gpio_direction_input(DA850_MMCSD_WP_PIN); | |
1486 | ||
1487 | ret = da8xx_register_mmcsd0(&da850_mmc_config); | |
1488 | if (ret) | |
1489 | pr_warning("da850_evm_init: mmcsd0 registration failed:" | |
1490 | " %d\n", ret); | |
ab3f5c1f IY |
1491 | |
1492 | ret = da850_wl12xx_init(); | |
1493 | if (ret) | |
1494 | pr_warning("da850_evm_init: wl12xx initialization" | |
1495 | " failed: %d\n", ret); | |
820c4fe3 | 1496 | } |
700691f2 | 1497 | |
0fbc5592 SR |
1498 | davinci_serial_init(&da850_evm_uart_config); |
1499 | ||
1a7ff8ff C |
1500 | i2c_register_board_info(1, da850_evm_i2c_devices, |
1501 | ARRAY_SIZE(da850_evm_i2c_devices)); | |
1502 | ||
0fbc5592 SR |
1503 | /* |
1504 | * shut down uart 0 and 1; they are not used on the board and | |
1505 | * accessing them causes endless "too much work in irq53" messages | |
1506 | * with arago fs | |
1507 | */ | |
1508 | __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); | |
1509 | __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); | |
491214e1 | 1510 | |
c840fc74 | 1511 | ret = davinci_cfg_reg_list(da850_evm_mcasp_pins); |
491214e1 C |
1512 | if (ret) |
1513 | pr_warning("da850_evm_init: mcasp mux setup failed: %d\n", | |
1514 | ret); | |
1515 | ||
88abfd5b | 1516 | da850_evm_snd_data.sram_pool = sram_get_gen_pool(); |
b8864aa4 | 1517 | da8xx_register_mcasp(0, &da850_evm_snd_data); |
5cbdf276 | 1518 | |
3821d10a | 1519 | ret = davinci_cfg_reg_list(da850_lcdcntl_pins); |
5cbdf276 SR |
1520 | if (ret) |
1521 | pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n", | |
1522 | ret); | |
1523 | ||
ae41d17a MP |
1524 | ret = da8xx_register_uio_pruss(); |
1525 | if (ret) | |
1526 | pr_warn("da850_evm_init: pruss initialization failed: %d\n", | |
1527 | ret); | |
1528 | ||
7761ef67 | 1529 | /* Handle board specific muxing for LCD here */ |
3821d10a | 1530 | ret = davinci_cfg_reg_list(da850_evm_lcdc_pins); |
7761ef67 SR |
1531 | if (ret) |
1532 | pr_warning("da850_evm_init: evm specific lcd mux setup " | |
1533 | "failed: %d\n", ret); | |
1534 | ||
5cbdf276 SR |
1535 | ret = da850_lcd_hw_init(); |
1536 | if (ret) | |
1537 | pr_warning("da850_evm_init: lcd initialization failed: %d\n", | |
1538 | ret); | |
1539 | ||
d52f235f | 1540 | sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl, |
b9e6342b | 1541 | ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata); |
5cbdf276 SR |
1542 | if (ret) |
1543 | pr_warning("da850_evm_init: lcdc registration failed: %d\n", | |
1544 | ret); | |
c51df70b MG |
1545 | |
1546 | ret = da8xx_register_rtc(); | |
1547 | if (ret) | |
1548 | pr_warning("da850_evm_init: rtc setup failed: %d\n", ret); | |
09dc2d45 | 1549 | |
28bd2c34 | 1550 | ret = da850_evm_init_cpufreq(); |
09dc2d45 SN |
1551 | if (ret) |
1552 | pr_warning("da850_evm_init: cpufreq registration failed: %d\n", | |
1553 | ret); | |
5aeb15aa SN |
1554 | |
1555 | ret = da8xx_register_cpuidle(); | |
1556 | if (ret) | |
1557 | pr_warning("da850_evm_init: cpuidle registration failed: %d\n", | |
1558 | ret); | |
63534443 SN |
1559 | |
1560 | ret = da850_register_pm(&da850_pm_device); | |
1561 | if (ret) | |
1562 | pr_warning("da850_evm_init: suspend registration failed: %d\n", | |
1563 | ret); | |
fdce5568 | 1564 | |
1e046d17 MH |
1565 | da850_vpif_init(); |
1566 | ||
fdce5568 SN |
1567 | ret = da8xx_register_spi(1, da850evm_spi_info, |
1568 | ARRAY_SIZE(da850evm_spi_info)); | |
1569 | if (ret) | |
1570 | pr_warning("da850_evm_init: spi 1 registration failed: %d\n", | |
1571 | ret); | |
8bb2c481 SN |
1572 | |
1573 | ret = da850_register_sata(DA850EVM_SATA_REFCLKPN_RATE); | |
1574 | if (ret) | |
1575 | pr_warning("da850_evm_init: sata registration failed: %d\n", | |
1576 | ret); | |
810198bc RS |
1577 | |
1578 | da850_evm_setup_mac_addr(); | |
0fbc5592 SR |
1579 | } |
1580 | ||
1581 | #ifdef CONFIG_SERIAL_8250_CONSOLE | |
1582 | static int __init da850_evm_console_init(void) | |
1583 | { | |
1aa5f2a9 MW |
1584 | if (!machine_is_davinci_da850_evm()) |
1585 | return 0; | |
1586 | ||
0fbc5592 SR |
1587 | return add_preferred_console("ttyS", 2, "115200"); |
1588 | } | |
1589 | console_initcall(da850_evm_console_init); | |
1590 | #endif | |
1591 | ||
0fbc5592 SR |
1592 | static void __init da850_evm_map_io(void) |
1593 | { | |
1594 | da850_init(); | |
1595 | } | |
1596 | ||
48ea89ea | 1597 | MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM") |
e7e56014 | 1598 | .atag_offset = 0x100, |
0fbc5592 | 1599 | .map_io = da850_evm_map_io, |
bd808947 | 1600 | .init_irq = cp_intc_init, |
0fbc5592 SR |
1601 | .timer = &davinci_timer, |
1602 | .init_machine = da850_evm_init, | |
3aa3e840 | 1603 | .init_late = davinci_init_late, |
f68deabf | 1604 | .dma_zone_size = SZ_128M, |
c6121ddd | 1605 | .restart = da8xx_restart, |
0fbc5592 | 1606 | MACHINE_END |