Commit | Line | Data |
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0fbc5592 SR |
1 | /* |
2 | * TI DA850/OMAP-L138 EVM board | |
3 | * | |
4 | * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * Derived from: arch/arm/mach-davinci/board-da830-evm.c | |
7 | * Original Copyrights follow: | |
8 | * | |
9 | * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under | |
10 | * the terms of the GNU General Public License version 2. This program | |
11 | * is licensed "as is" without any warranty of any kind, whether express | |
12 | * or implied. | |
13 | */ | |
14 | #include <linux/kernel.h> | |
0fbc5592 SR |
15 | #include <linux/init.h> |
16 | #include <linux/console.h> | |
17 | #include <linux/i2c.h> | |
18 | #include <linux/i2c/at24.h> | |
75e2ea64 | 19 | #include <linux/i2c/pca953x.h> |
0bc20bba | 20 | #include <linux/mfd/tps6507x.h> |
5cbdf276 | 21 | #include <linux/gpio.h> |
38beb929 SR |
22 | #include <linux/platform_device.h> |
23 | #include <linux/mtd/mtd.h> | |
24 | #include <linux/mtd/nand.h> | |
25 | #include <linux/mtd/partitions.h> | |
7c5ec609 | 26 | #include <linux/mtd/physmap.h> |
a9eb1f67 | 27 | #include <linux/regulator/machine.h> |
da1e3680 TF |
28 | #include <linux/mfd/tps6507x.h> |
29 | #include <linux/input/tps6507x-ts.h> | |
0fbc5592 SR |
30 | |
31 | #include <asm/mach-types.h> | |
32 | #include <asm/mach/arch.h> | |
33 | ||
0fbc5592 SR |
34 | #include <mach/cp_intc.h> |
35 | #include <mach/da8xx.h> | |
38beb929 | 36 | #include <mach/nand.h> |
7761ef67 | 37 | #include <mach/mux.h> |
0fbc5592 | 38 | |
5a4b1315 SR |
39 | #define DA850_EVM_PHY_MASK 0x1 |
40 | #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ | |
41 | ||
7761ef67 | 42 | #define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8) |
5cbdf276 | 43 | #define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15) |
5cbdf276 | 44 | |
700691f2 SR |
45 | #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0) |
46 | #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1) | |
47 | ||
2206771c C |
48 | #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6) |
49 | ||
7c5ec609 SR |
50 | static struct mtd_partition da850_evm_norflash_partition[] = { |
51 | { | |
e2abd5a2 | 52 | .name = "bootloaders + env", |
7c5ec609 | 53 | .offset = 0, |
e2abd5a2 SR |
54 | .size = SZ_512K, |
55 | .mask_flags = MTD_WRITEABLE, | |
56 | }, | |
57 | { | |
58 | .name = "kernel", | |
59 | .offset = MTDPART_OFS_APPEND, | |
60 | .size = SZ_2M, | |
61 | .mask_flags = 0, | |
62 | }, | |
63 | { | |
64 | .name = "filesystem", | |
65 | .offset = MTDPART_OFS_APPEND, | |
7c5ec609 SR |
66 | .size = MTDPART_SIZ_FULL, |
67 | .mask_flags = 0, | |
68 | }, | |
69 | }; | |
70 | ||
71 | static struct physmap_flash_data da850_evm_norflash_data = { | |
72 | .width = 2, | |
73 | .parts = da850_evm_norflash_partition, | |
74 | .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition), | |
75 | }; | |
76 | ||
77 | static struct resource da850_evm_norflash_resource[] = { | |
78 | { | |
79 | .start = DA8XX_AEMIF_CS2_BASE, | |
80 | .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1, | |
81 | .flags = IORESOURCE_MEM, | |
82 | }, | |
83 | }; | |
84 | ||
85 | static struct platform_device da850_evm_norflash_device = { | |
86 | .name = "physmap-flash", | |
87 | .id = 0, | |
88 | .dev = { | |
89 | .platform_data = &da850_evm_norflash_data, | |
90 | }, | |
91 | .num_resources = 1, | |
92 | .resource = da850_evm_norflash_resource, | |
93 | }; | |
94 | ||
63534443 SN |
95 | static struct davinci_pm_config da850_pm_pdata = { |
96 | .sleepcount = 128, | |
97 | }; | |
98 | ||
99 | static struct platform_device da850_pm_device = { | |
100 | .name = "pm-davinci", | |
101 | .dev = { | |
102 | .platform_data = &da850_pm_pdata, | |
103 | }, | |
104 | .id = -1, | |
105 | }; | |
106 | ||
38beb929 SR |
107 | /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash |
108 | * (128K blocks). It may be used instead of the (default) SPI flash | |
109 | * to boot, using TI's tools to install the secondary boot loader | |
110 | * (UBL) and U-Boot. | |
111 | */ | |
112 | struct mtd_partition da850_evm_nandflash_partition[] = { | |
113 | { | |
114 | .name = "u-boot env", | |
115 | .offset = 0, | |
116 | .size = SZ_128K, | |
117 | .mask_flags = MTD_WRITEABLE, | |
118 | }, | |
119 | { | |
120 | .name = "UBL", | |
121 | .offset = MTDPART_OFS_APPEND, | |
122 | .size = SZ_128K, | |
123 | .mask_flags = MTD_WRITEABLE, | |
124 | }, | |
125 | { | |
126 | .name = "u-boot", | |
127 | .offset = MTDPART_OFS_APPEND, | |
128 | .size = 4 * SZ_128K, | |
129 | .mask_flags = MTD_WRITEABLE, | |
130 | }, | |
131 | { | |
132 | .name = "kernel", | |
133 | .offset = 0x200000, | |
134 | .size = SZ_2M, | |
135 | .mask_flags = 0, | |
136 | }, | |
137 | { | |
138 | .name = "filesystem", | |
139 | .offset = MTDPART_OFS_APPEND, | |
140 | .size = MTDPART_SIZ_FULL, | |
141 | .mask_flags = 0, | |
142 | }, | |
143 | }; | |
144 | ||
145 | static struct davinci_nand_pdata da850_evm_nandflash_data = { | |
146 | .parts = da850_evm_nandflash_partition, | |
147 | .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), | |
148 | .ecc_mode = NAND_ECC_HW, | |
fc42e335 | 149 | .ecc_bits = 4, |
38beb929 SR |
150 | .options = NAND_USE_FLASH_BBT, |
151 | }; | |
152 | ||
153 | static struct resource da850_evm_nandflash_resource[] = { | |
154 | { | |
155 | .start = DA8XX_AEMIF_CS3_BASE, | |
156 | .end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1, | |
157 | .flags = IORESOURCE_MEM, | |
158 | }, | |
159 | { | |
160 | .start = DA8XX_AEMIF_CTL_BASE, | |
161 | .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, | |
162 | .flags = IORESOURCE_MEM, | |
163 | }, | |
164 | }; | |
165 | ||
166 | static struct platform_device da850_evm_nandflash_device = { | |
167 | .name = "davinci_nand", | |
168 | .id = 1, | |
169 | .dev = { | |
170 | .platform_data = &da850_evm_nandflash_data, | |
171 | }, | |
172 | .num_resources = ARRAY_SIZE(da850_evm_nandflash_resource), | |
173 | .resource = da850_evm_nandflash_resource, | |
174 | }; | |
175 | ||
039c5ee3 SR |
176 | static struct platform_device *da850_evm_devices[] __initdata = { |
177 | &da850_evm_nandflash_device, | |
178 | &da850_evm_norflash_device, | |
179 | }; | |
180 | ||
181 | #define DA8XX_AEMIF_CE2CFG_OFFSET 0x10 | |
182 | #define DA8XX_AEMIF_ASIZE_16BIT 0x1 | |
183 | ||
184 | static void __init da850_evm_init_nor(void) | |
185 | { | |
186 | void __iomem *aemif_addr; | |
187 | ||
188 | aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K); | |
189 | ||
190 | /* Configure data bus width of CS2 to 16 bit */ | |
191 | writel(readl(aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET) | | |
192 | DA8XX_AEMIF_ASIZE_16BIT, | |
193 | aemif_addr + DA8XX_AEMIF_CE2CFG_OFFSET); | |
194 | ||
195 | iounmap(aemif_addr); | |
196 | } | |
197 | ||
75e2ea64 | 198 | static u32 ui_card_detected; |
039c5ee3 SR |
199 | |
200 | #if defined(CONFIG_MMC_DAVINCI) || \ | |
201 | defined(CONFIG_MMC_DAVINCI_MODULE) | |
202 | #define HAS_MMC 1 | |
203 | #else | |
204 | #define HAS_MMC 0 | |
205 | #endif | |
206 | ||
1ef203c3 | 207 | static __init void da850_evm_setup_nor_nand(void) |
039c5ee3 SR |
208 | { |
209 | int ret = 0; | |
210 | ||
211 | if (ui_card_detected & !HAS_MMC) { | |
3821d10a | 212 | ret = davinci_cfg_reg_list(da850_nand_pins); |
039c5ee3 SR |
213 | if (ret) |
214 | pr_warning("da850_evm_init: nand mux setup failed: " | |
215 | "%d\n", ret); | |
216 | ||
3821d10a | 217 | ret = davinci_cfg_reg_list(da850_nor_pins); |
039c5ee3 SR |
218 | if (ret) |
219 | pr_warning("da850_evm_init: nor mux setup failed: %d\n", | |
220 | ret); | |
221 | ||
222 | da850_evm_init_nor(); | |
223 | ||
224 | platform_add_devices(da850_evm_devices, | |
225 | ARRAY_SIZE(da850_evm_devices)); | |
226 | } | |
227 | } | |
75e2ea64 | 228 | |
bae10587 SN |
229 | #ifdef CONFIG_DA850_UI_RMII |
230 | static inline void da850_evm_setup_emac_rmii(int rmii_sel) | |
231 | { | |
232 | struct davinci_soc_info *soc_info = &davinci_soc_info; | |
233 | ||
234 | soc_info->emac_pdata->rmii_en = 1; | |
235 | gpio_set_value(rmii_sel, 0); | |
236 | } | |
237 | #else | |
238 | static inline void da850_evm_setup_emac_rmii(int rmii_sel) { } | |
239 | #endif | |
240 | ||
75e2ea64 C |
241 | static int da850_evm_ui_expander_setup(struct i2c_client *client, unsigned gpio, |
242 | unsigned ngpio, void *c) | |
243 | { | |
244 | int sel_a, sel_b, sel_c, ret; | |
245 | ||
246 | sel_a = gpio + 7; | |
247 | sel_b = gpio + 6; | |
248 | sel_c = gpio + 5; | |
249 | ||
250 | ret = gpio_request(sel_a, "sel_a"); | |
251 | if (ret) { | |
252 | pr_warning("Cannot open UI expander pin %d\n", sel_a); | |
253 | goto exp_setup_sela_fail; | |
254 | } | |
255 | ||
256 | ret = gpio_request(sel_b, "sel_b"); | |
257 | if (ret) { | |
258 | pr_warning("Cannot open UI expander pin %d\n", sel_b); | |
259 | goto exp_setup_selb_fail; | |
260 | } | |
261 | ||
262 | ret = gpio_request(sel_c, "sel_c"); | |
263 | if (ret) { | |
264 | pr_warning("Cannot open UI expander pin %d\n", sel_c); | |
265 | goto exp_setup_selc_fail; | |
266 | } | |
267 | ||
268 | /* deselect all functionalities */ | |
269 | gpio_direction_output(sel_a, 1); | |
270 | gpio_direction_output(sel_b, 1); | |
271 | gpio_direction_output(sel_c, 1); | |
272 | ||
273 | ui_card_detected = 1; | |
274 | pr_info("DA850/OMAP-L138 EVM UI card detected\n"); | |
275 | ||
276 | da850_evm_setup_nor_nand(); | |
277 | ||
bae10587 | 278 | da850_evm_setup_emac_rmii(sel_a); |
2206771c | 279 | |
75e2ea64 C |
280 | return 0; |
281 | ||
282 | exp_setup_selc_fail: | |
283 | gpio_free(sel_b); | |
284 | exp_setup_selb_fail: | |
285 | gpio_free(sel_a); | |
286 | exp_setup_sela_fail: | |
287 | return ret; | |
288 | } | |
289 | ||
290 | static int da850_evm_ui_expander_teardown(struct i2c_client *client, | |
291 | unsigned gpio, unsigned ngpio, void *c) | |
292 | { | |
293 | /* deselect all functionalities */ | |
294 | gpio_set_value(gpio + 5, 1); | |
295 | gpio_set_value(gpio + 6, 1); | |
296 | gpio_set_value(gpio + 7, 1); | |
297 | ||
298 | gpio_free(gpio + 5); | |
299 | gpio_free(gpio + 6); | |
300 | gpio_free(gpio + 7); | |
301 | ||
302 | return 0; | |
303 | } | |
304 | ||
305 | static struct pca953x_platform_data da850_evm_ui_expander_info = { | |
306 | .gpio_base = DAVINCI_N_GPIO, | |
307 | .setup = da850_evm_ui_expander_setup, | |
308 | .teardown = da850_evm_ui_expander_teardown, | |
309 | }; | |
310 | ||
1a7ff8ff C |
311 | static struct i2c_board_info __initdata da850_evm_i2c_devices[] = { |
312 | { | |
313 | I2C_BOARD_INFO("tlv320aic3x", 0x18), | |
75e2ea64 C |
314 | }, |
315 | { | |
316 | I2C_BOARD_INFO("tca6416", 0x20), | |
317 | .platform_data = &da850_evm_ui_expander_info, | |
318 | }, | |
1a7ff8ff C |
319 | }; |
320 | ||
0fbc5592 SR |
321 | static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = { |
322 | .bus_freq = 100, /* kHz */ | |
323 | .bus_delay = 0, /* usec */ | |
324 | }; | |
325 | ||
326 | static struct davinci_uart_config da850_evm_uart_config __initdata = { | |
327 | .enabled_uarts = 0x7, | |
328 | }; | |
329 | ||
491214e1 C |
330 | /* davinci da850 evm audio machine driver */ |
331 | static u8 da850_iis_serializer_direction[] = { | |
332 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
333 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
334 | INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE, | |
335 | RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, | |
336 | }; | |
337 | ||
338 | static struct snd_platform_data da850_evm_snd_data = { | |
339 | .tx_dma_offset = 0x2000, | |
340 | .rx_dma_offset = 0x2000, | |
341 | .op_mode = DAVINCI_MCASP_IIS_MODE, | |
342 | .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), | |
343 | .tdm_slots = 2, | |
344 | .serial_dir = da850_iis_serializer_direction, | |
345 | .eventq_no = EVENTQ_1, | |
346 | .version = MCASP_VERSION_2, | |
347 | .txnumevt = 1, | |
348 | .rxnumevt = 1, | |
349 | }; | |
350 | ||
700691f2 SR |
351 | static int da850_evm_mmc_get_ro(int index) |
352 | { | |
353 | return gpio_get_value(DA850_MMCSD_WP_PIN); | |
354 | } | |
355 | ||
356 | static int da850_evm_mmc_get_cd(int index) | |
357 | { | |
358 | return !gpio_get_value(DA850_MMCSD_CD_PIN); | |
359 | } | |
360 | ||
361 | static struct davinci_mmc_config da850_mmc_config = { | |
362 | .get_ro = da850_evm_mmc_get_ro, | |
363 | .get_cd = da850_evm_mmc_get_cd, | |
364 | .wires = 4, | |
0046d0bf C |
365 | .max_freq = 50000000, |
366 | .caps = MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED, | |
700691f2 SR |
367 | .version = MMC_CTLR_VERSION_2, |
368 | }; | |
369 | ||
d52f235f C |
370 | static void da850_panel_power_ctrl(int val) |
371 | { | |
372 | /* lcd backlight */ | |
373 | gpio_set_value(DA850_LCD_BL_PIN, val); | |
374 | ||
375 | /* lcd power */ | |
376 | gpio_set_value(DA850_LCD_PWR_PIN, val); | |
377 | } | |
378 | ||
5cbdf276 SR |
379 | static int da850_lcd_hw_init(void) |
380 | { | |
381 | int status; | |
382 | ||
383 | status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n"); | |
384 | if (status < 0) | |
385 | return status; | |
386 | ||
387 | status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n"); | |
388 | if (status < 0) { | |
389 | gpio_free(DA850_LCD_BL_PIN); | |
390 | return status; | |
391 | } | |
392 | ||
393 | gpio_direction_output(DA850_LCD_BL_PIN, 0); | |
394 | gpio_direction_output(DA850_LCD_PWR_PIN, 0); | |
395 | ||
d52f235f C |
396 | /* Switch off panel power and backlight */ |
397 | da850_panel_power_ctrl(0); | |
5cbdf276 | 398 | |
d52f235f C |
399 | /* Switch on panel power and backlight */ |
400 | da850_panel_power_ctrl(1); | |
5cbdf276 SR |
401 | |
402 | return 0; | |
403 | } | |
491214e1 | 404 | |
a9eb1f67 SN |
405 | /* TPS65070 voltage regulator support */ |
406 | ||
407 | /* 3.3V */ | |
408 | struct regulator_consumer_supply tps65070_dcdc1_consumers[] = { | |
409 | { | |
410 | .supply = "usb0_vdda33", | |
411 | }, | |
412 | { | |
413 | .supply = "usb1_vdda33", | |
414 | }, | |
415 | }; | |
416 | ||
417 | /* 3.3V or 1.8V */ | |
418 | struct regulator_consumer_supply tps65070_dcdc2_consumers[] = { | |
419 | { | |
420 | .supply = "dvdd3318_a", | |
421 | }, | |
422 | { | |
423 | .supply = "dvdd3318_b", | |
424 | }, | |
425 | { | |
426 | .supply = "dvdd3318_c", | |
427 | }, | |
428 | }; | |
429 | ||
430 | /* 1.2V */ | |
431 | struct regulator_consumer_supply tps65070_dcdc3_consumers[] = { | |
432 | { | |
433 | .supply = "cvdd", | |
434 | }, | |
435 | }; | |
436 | ||
437 | /* 1.8V LDO */ | |
438 | struct regulator_consumer_supply tps65070_ldo1_consumers[] = { | |
439 | { | |
440 | .supply = "sata_vddr", | |
441 | }, | |
442 | { | |
443 | .supply = "usb0_vdda18", | |
444 | }, | |
445 | { | |
446 | .supply = "usb1_vdda18", | |
447 | }, | |
448 | { | |
449 | .supply = "ddr_dvdd18", | |
450 | }, | |
451 | }; | |
452 | ||
453 | /* 1.2V LDO */ | |
454 | struct regulator_consumer_supply tps65070_ldo2_consumers[] = { | |
455 | { | |
456 | .supply = "sata_vdd", | |
457 | }, | |
458 | { | |
459 | .supply = "pll0_vdda", | |
460 | }, | |
461 | { | |
462 | .supply = "pll1_vdda", | |
463 | }, | |
464 | { | |
465 | .supply = "usbs_cvdd", | |
466 | }, | |
467 | { | |
468 | .supply = "vddarnwa1", | |
469 | }, | |
470 | }; | |
471 | ||
472 | struct regulator_init_data tps65070_regulator_data[] = { | |
473 | /* dcdc1 */ | |
474 | { | |
475 | .constraints = { | |
476 | .min_uV = 3150000, | |
477 | .max_uV = 3450000, | |
478 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
479 | REGULATOR_CHANGE_STATUS), | |
480 | .boot_on = 1, | |
481 | }, | |
482 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc1_consumers), | |
483 | .consumer_supplies = tps65070_dcdc1_consumers, | |
484 | }, | |
485 | ||
486 | /* dcdc2 */ | |
487 | { | |
488 | .constraints = { | |
489 | .min_uV = 1710000, | |
490 | .max_uV = 3450000, | |
491 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
492 | REGULATOR_CHANGE_STATUS), | |
493 | .boot_on = 1, | |
494 | }, | |
495 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc2_consumers), | |
496 | .consumer_supplies = tps65070_dcdc2_consumers, | |
497 | }, | |
498 | ||
499 | /* dcdc3 */ | |
500 | { | |
501 | .constraints = { | |
502 | .min_uV = 950000, | |
503 | .max_uV = 1320000, | |
504 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
505 | REGULATOR_CHANGE_STATUS), | |
506 | .boot_on = 1, | |
507 | }, | |
508 | .num_consumer_supplies = ARRAY_SIZE(tps65070_dcdc3_consumers), | |
509 | .consumer_supplies = tps65070_dcdc3_consumers, | |
510 | }, | |
511 | ||
512 | /* ldo1 */ | |
513 | { | |
514 | .constraints = { | |
515 | .min_uV = 1710000, | |
516 | .max_uV = 1890000, | |
517 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
518 | REGULATOR_CHANGE_STATUS), | |
519 | .boot_on = 1, | |
520 | }, | |
521 | .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo1_consumers), | |
522 | .consumer_supplies = tps65070_ldo1_consumers, | |
523 | }, | |
524 | ||
525 | /* ldo2 */ | |
526 | { | |
527 | .constraints = { | |
528 | .min_uV = 1140000, | |
529 | .max_uV = 1320000, | |
530 | .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE | | |
531 | REGULATOR_CHANGE_STATUS), | |
532 | .boot_on = 1, | |
533 | }, | |
534 | .num_consumer_supplies = ARRAY_SIZE(tps65070_ldo2_consumers), | |
535 | .consumer_supplies = tps65070_ldo2_consumers, | |
536 | }, | |
537 | }; | |
538 | ||
da1e3680 TF |
539 | static struct touchscreen_init_data tps6507x_touchscreen_data = { |
540 | .poll_period = 30, /* ms between touch samples */ | |
541 | .min_pressure = 0x30, /* minimum pressure to trigger touch */ | |
542 | .vref = 0, /* turn off vref when not using A/D */ | |
543 | .vendor = 0, /* /sys/class/input/input?/id/vendor */ | |
544 | .product = 65070, /* /sys/class/input/input?/id/product */ | |
545 | .version = 0x100, /* /sys/class/input/input?/id/version */ | |
546 | }; | |
547 | ||
0bc20bba TF |
548 | static struct tps6507x_board tps_board = { |
549 | .tps6507x_pmic_init_data = &tps65070_regulator_data[0], | |
da1e3680 | 550 | .tps6507x_ts_init_data = &tps6507x_touchscreen_data, |
0bc20bba TF |
551 | }; |
552 | ||
a9eb1f67 SN |
553 | static struct i2c_board_info __initdata da850evm_tps65070_info[] = { |
554 | { | |
555 | I2C_BOARD_INFO("tps6507x", 0x48), | |
0bc20bba | 556 | .platform_data = &tps_board, |
a9eb1f67 SN |
557 | }, |
558 | }; | |
559 | ||
560 | static int __init pmic_tps65070_init(void) | |
561 | { | |
562 | return i2c_register_board_info(1, da850evm_tps65070_info, | |
563 | ARRAY_SIZE(da850evm_tps65070_info)); | |
564 | } | |
565 | ||
7761ef67 SR |
566 | static const short da850_evm_lcdc_pins[] = { |
567 | DA850_GPIO2_8, DA850_GPIO2_15, | |
568 | -1 | |
569 | }; | |
570 | ||
bae10587 | 571 | static int __init da850_evm_config_emac(void) |
2206771c C |
572 | { |
573 | void __iomem *cfg_chip3_base; | |
574 | int ret; | |
575 | u32 val; | |
bae10587 SN |
576 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
577 | u8 rmii_en = soc_info->emac_pdata->rmii_en; | |
578 | ||
579 | if (!machine_is_davinci_da850_evm()) | |
580 | return 0; | |
2206771c | 581 | |
d2de0582 | 582 | cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); |
2206771c | 583 | |
2206771c | 584 | val = __raw_readl(cfg_chip3_base); |
17fadd9a SN |
585 | |
586 | if (rmii_en) { | |
2206771c | 587 | val |= BIT(8); |
3821d10a | 588 | ret = davinci_cfg_reg_list(da850_rmii_pins); |
17fadd9a SN |
589 | pr_info("EMAC: RMII PHY configured, MII PHY will not be" |
590 | " functional\n"); | |
591 | } else { | |
2206771c | 592 | val &= ~BIT(8); |
3821d10a | 593 | ret = davinci_cfg_reg_list(da850_cpgmac_pins); |
17fadd9a SN |
594 | pr_info("EMAC: MII PHY configured, RMII PHY will not be" |
595 | " functional\n"); | |
596 | } | |
597 | ||
2206771c C |
598 | if (ret) |
599 | pr_warning("da850_evm_init: cpgmac/rmii mux setup failed: %d\n", | |
600 | ret); | |
601 | ||
17fadd9a SN |
602 | /* configure the CFGCHIP3 register for RMII or MII */ |
603 | __raw_writel(val, cfg_chip3_base); | |
604 | ||
2206771c C |
605 | ret = davinci_cfg_reg(DA850_GPIO2_6); |
606 | if (ret) | |
607 | pr_warning("da850_evm_init:GPIO(2,6) mux setup " | |
608 | "failed\n"); | |
609 | ||
610 | ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en"); | |
611 | if (ret) { | |
612 | pr_warning("Cannot open GPIO %d\n", | |
613 | DA850_MII_MDIO_CLKEN_PIN); | |
614 | return ret; | |
615 | } | |
616 | ||
17fadd9a SN |
617 | /* Enable/Disable MII MDIO clock */ |
618 | gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en); | |
2206771c | 619 | |
bae10587 SN |
620 | soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK; |
621 | soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY; | |
622 | ||
623 | ret = da8xx_register_emac(); | |
624 | if (ret) | |
625 | pr_warning("da850_evm_init: emac registration failed: %d\n", | |
626 | ret); | |
627 | ||
2206771c C |
628 | return 0; |
629 | } | |
bae10587 | 630 | device_initcall(da850_evm_config_emac); |
2206771c | 631 | |
0fbc5592 SR |
632 | static __init void da850_evm_init(void) |
633 | { | |
634 | int ret; | |
635 | ||
a9eb1f67 SN |
636 | ret = pmic_tps65070_init(); |
637 | if (ret) | |
638 | pr_warning("da850_evm_init: TPS65070 PMIC init failed: %d\n", | |
639 | ret); | |
640 | ||
0fbc5592 SR |
641 | ret = da8xx_register_edma(); |
642 | if (ret) | |
643 | pr_warning("da850_evm_init: edma registration failed: %d\n", | |
644 | ret); | |
645 | ||
3821d10a | 646 | ret = davinci_cfg_reg_list(da850_i2c0_pins); |
0fbc5592 SR |
647 | if (ret) |
648 | pr_warning("da850_evm_init: i2c0 mux setup failed: %d\n", | |
649 | ret); | |
650 | ||
651 | ret = da8xx_register_i2c(0, &da850_evm_i2c_0_pdata); | |
652 | if (ret) | |
653 | pr_warning("da850_evm_init: i2c0 registration failed: %d\n", | |
654 | ret); | |
655 | ||
5a4b1315 | 656 | |
0fbc5592 SR |
657 | ret = da8xx_register_watchdog(); |
658 | if (ret) | |
659 | pr_warning("da830_evm_init: watchdog registration failed: %d\n", | |
660 | ret); | |
661 | ||
820c4fe3 | 662 | if (HAS_MMC) { |
3821d10a | 663 | ret = davinci_cfg_reg_list(da850_mmcsd0_pins); |
820c4fe3 SR |
664 | if (ret) |
665 | pr_warning("da850_evm_init: mmcsd0 mux setup failed:" | |
666 | " %d\n", ret); | |
667 | ||
668 | ret = gpio_request(DA850_MMCSD_CD_PIN, "MMC CD\n"); | |
669 | if (ret) | |
670 | pr_warning("da850_evm_init: can not open GPIO %d\n", | |
671 | DA850_MMCSD_CD_PIN); | |
672 | gpio_direction_input(DA850_MMCSD_CD_PIN); | |
673 | ||
674 | ret = gpio_request(DA850_MMCSD_WP_PIN, "MMC WP\n"); | |
675 | if (ret) | |
676 | pr_warning("da850_evm_init: can not open GPIO %d\n", | |
677 | DA850_MMCSD_WP_PIN); | |
678 | gpio_direction_input(DA850_MMCSD_WP_PIN); | |
679 | ||
680 | ret = da8xx_register_mmcsd0(&da850_mmc_config); | |
681 | if (ret) | |
682 | pr_warning("da850_evm_init: mmcsd0 registration failed:" | |
683 | " %d\n", ret); | |
684 | } | |
700691f2 | 685 | |
0fbc5592 SR |
686 | davinci_serial_init(&da850_evm_uart_config); |
687 | ||
1a7ff8ff C |
688 | i2c_register_board_info(1, da850_evm_i2c_devices, |
689 | ARRAY_SIZE(da850_evm_i2c_devices)); | |
690 | ||
0fbc5592 SR |
691 | /* |
692 | * shut down uart 0 and 1; they are not used on the board and | |
693 | * accessing them causes endless "too much work in irq53" messages | |
694 | * with arago fs | |
695 | */ | |
696 | __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); | |
697 | __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); | |
491214e1 | 698 | |
3821d10a | 699 | ret = davinci_cfg_reg_list(da850_mcasp_pins); |
491214e1 C |
700 | if (ret) |
701 | pr_warning("da850_evm_init: mcasp mux setup failed: %d\n", | |
702 | ret); | |
703 | ||
b8864aa4 | 704 | da8xx_register_mcasp(0, &da850_evm_snd_data); |
5cbdf276 | 705 | |
3821d10a | 706 | ret = davinci_cfg_reg_list(da850_lcdcntl_pins); |
5cbdf276 SR |
707 | if (ret) |
708 | pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n", | |
709 | ret); | |
710 | ||
7761ef67 | 711 | /* Handle board specific muxing for LCD here */ |
3821d10a | 712 | ret = davinci_cfg_reg_list(da850_evm_lcdc_pins); |
7761ef67 SR |
713 | if (ret) |
714 | pr_warning("da850_evm_init: evm specific lcd mux setup " | |
715 | "failed: %d\n", ret); | |
716 | ||
5cbdf276 SR |
717 | ret = da850_lcd_hw_init(); |
718 | if (ret) | |
719 | pr_warning("da850_evm_init: lcd initialization failed: %d\n", | |
720 | ret); | |
721 | ||
d52f235f | 722 | sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl, |
b9e6342b | 723 | ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata); |
5cbdf276 SR |
724 | if (ret) |
725 | pr_warning("da850_evm_init: lcdc registration failed: %d\n", | |
726 | ret); | |
c51df70b MG |
727 | |
728 | ret = da8xx_register_rtc(); | |
729 | if (ret) | |
730 | pr_warning("da850_evm_init: rtc setup failed: %d\n", ret); | |
09dc2d45 SN |
731 | |
732 | ret = da850_register_cpufreq(); | |
733 | if (ret) | |
734 | pr_warning("da850_evm_init: cpufreq registration failed: %d\n", | |
735 | ret); | |
5aeb15aa SN |
736 | |
737 | ret = da8xx_register_cpuidle(); | |
738 | if (ret) | |
739 | pr_warning("da850_evm_init: cpuidle registration failed: %d\n", | |
740 | ret); | |
63534443 SN |
741 | |
742 | ret = da850_register_pm(&da850_pm_device); | |
743 | if (ret) | |
744 | pr_warning("da850_evm_init: suspend registration failed: %d\n", | |
745 | ret); | |
0fbc5592 SR |
746 | } |
747 | ||
748 | #ifdef CONFIG_SERIAL_8250_CONSOLE | |
749 | static int __init da850_evm_console_init(void) | |
750 | { | |
751 | return add_preferred_console("ttyS", 2, "115200"); | |
752 | } | |
753 | console_initcall(da850_evm_console_init); | |
754 | #endif | |
755 | ||
0fbc5592 SR |
756 | static void __init da850_evm_map_io(void) |
757 | { | |
758 | da850_init(); | |
759 | } | |
760 | ||
761 | MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM") | |
762 | .phys_io = IO_PHYS, | |
763 | .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, | |
764 | .boot_params = (DA8XX_DDR_BASE + 0x100), | |
765 | .map_io = da850_evm_map_io, | |
bd808947 | 766 | .init_irq = cp_intc_init, |
0fbc5592 SR |
767 | .timer = &davinci_timer, |
768 | .init_machine = da850_evm_init, | |
769 | MACHINE_END |