Merge branch 'nfs-for-2.6.40' of git://git.linux-nfs.org/projects/trondmy/nfs-2.6
[deliverable/linux.git] / arch / arm / mach-davinci / cdce949.c
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1/*
2 * TI CDCE949 clock synthesizer driver
3 *
4 * Note: This implementation assumes an input of 27MHz to the CDCE.
5 * This is by no means constrained by CDCE hardware although the datasheet
6 * does use this as an example for all illustrations and more importantly:
7 * that is the crystal input on boards it is currently used on.
8 *
9 * Copyright (C) 2009 Texas Instruments Incorporated. http://www.ti.com/
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 */
16#include <linux/kernel.h>
17#include <linux/clk.h>
18#include <linux/platform_device.h>
19#include <linux/i2c.h>
20
21#include <mach/clock.h>
28552c2e 22#include <mach/cdce949.h>
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23
24#include "clock.h"
25
26static struct i2c_client *cdce_i2c_client;
3b43cd6f 27static DEFINE_MUTEX(cdce_mutex);
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28
29/* CDCE register descriptor */
30struct cdce_reg {
31 u8 addr;
32 u8 val;
33};
34
35/* Per-Output (Y1, Y2 etc.) frequency descriptor */
36struct cdce_freq {
37 /* Frequency in KHz */
38 unsigned long frequency;
39 /*
40 * List of registers to program to obtain a particular frequency.
41 * 0x0 in register address and value is the end of list marker.
42 */
43 struct cdce_reg *reglist;
44};
45
46#define CDCE_FREQ_TABLE_ENTRY(line, out) \
47{ \
48 .reglist = cdce_y ##line## _ ##out, \
49 .frequency = out, \
50}
51
52/* List of CDCE outputs */
53struct cdce_output {
54 /* List of frequencies on this output */
55 struct cdce_freq *freq_table;
56 /* Number of possible frequencies */
57 int size;
58};
59
60/*
61 * Finding out the values to program into CDCE949 registers for a particular
62 * frequency output is not a simple calculation. Have a look at the datasheet
63 * for the details. There is desktop software available to help users with
64 * the calculations. Here, we just depend on the output of that software
65 * (or hand calculations) instead trying to runtime calculate the register
66 * values and inflicting misery on ourselves.
67 */
68static struct cdce_reg cdce_y1_148500[] = {
69 { 0x13, 0x00 },
70 /* program PLL1_0 multiplier */
71 { 0x18, 0xaf },
72 { 0x19, 0x50 },
73 { 0x1a, 0x02 },
74 { 0x1b, 0xc9 },
75 /* program PLL1_11 multiplier */
76 { 0x1c, 0x00 },
77 { 0x1d, 0x40 },
78 { 0x1e, 0x02 },
79 { 0x1f, 0xc9 },
80 /* output state selection */
81 { 0x15, 0x00 },
82 { 0x14, 0xef },
83 /* switch MUX to PLL1 output */
84 { 0x14, 0x6f },
85 { 0x16, 0x06 },
86 /* set P2DIV divider, P3DIV and input crystal */
87 { 0x17, 0x06 },
88 { 0x01, 0x00 },
89 { 0x05, 0x48 },
90 { 0x02, 0x80 },
91 /* enable and disable PLL */
92 { 0x02, 0xbc },
93 { 0x03, 0x01 },
94 { },
95};
96
97static struct cdce_reg cdce_y1_74250[] = {
98 { 0x13, 0x00 },
99 { 0x18, 0xaf },
100 { 0x19, 0x50 },
101 { 0x1a, 0x02 },
102 { 0x1b, 0xc9 },
103 { 0x1c, 0x00 },
104 { 0x1d, 0x40 },
105 { 0x1e, 0x02 },
106 { 0x1f, 0xc9 },
107 /* output state selection */
108 { 0x15, 0x00 },
109 { 0x14, 0xef },
110 /* switch MUX to PLL1 output */
111 { 0x14, 0x6f },
112 { 0x16, 0x06 },
113 /* set P2DIV divider, P3DIV and input crystal */
114 { 0x17, 0x06 },
115 { 0x01, 0x00 },
116 { 0x05, 0x48 },
117 { 0x02, 0x80 },
118 /* enable and disable PLL */
119 { 0x02, 0xbc },
120 { 0x03, 0x02 },
121 { },
122};
123
124static struct cdce_reg cdce_y1_27000[] = {
125 { 0x13, 0x00 },
126 { 0x18, 0x00 },
127 { 0x19, 0x40 },
128 { 0x1a, 0x02 },
129 { 0x1b, 0x08 },
130 { 0x1c, 0x00 },
131 { 0x1d, 0x40 },
132 { 0x1e, 0x02 },
133 { 0x1f, 0x08 },
134 { 0x15, 0x02 },
135 { 0x14, 0xed },
136 { 0x16, 0x01 },
137 { 0x17, 0x01 },
138 { 0x01, 0x00 },
139 { 0x05, 0x50 },
140 { 0x02, 0xb4 },
141 { 0x03, 0x01 },
142 { },
143};
144
145static struct cdce_freq cdce_y1_freqs[] = {
146 CDCE_FREQ_TABLE_ENTRY(1, 148500),
147 CDCE_FREQ_TABLE_ENTRY(1, 74250),
148 CDCE_FREQ_TABLE_ENTRY(1, 27000),
149};
150
151static struct cdce_reg cdce_y5_13500[] = {
152 { 0x27, 0x08 },
153 { 0x28, 0x00 },
154 { 0x29, 0x40 },
155 { 0x2a, 0x02 },
156 { 0x2b, 0x08 },
157 { 0x24, 0x6f },
158 { },
159};
160
161static struct cdce_reg cdce_y5_16875[] = {
162 { 0x27, 0x08 },
163 { 0x28, 0x9f },
164 { 0x29, 0xb0 },
165 { 0x2a, 0x02 },
166 { 0x2b, 0x89 },
167 { 0x24, 0x6f },
168 { },
169};
170
171static struct cdce_reg cdce_y5_27000[] = {
172 { 0x27, 0x04 },
173 { 0x28, 0x00 },
174 { 0x29, 0x40 },
175 { 0x2a, 0x02 },
176 { 0x2b, 0x08 },
177 { 0x24, 0x6f },
178 { },
179};
180static struct cdce_reg cdce_y5_54000[] = {
181 { 0x27, 0x04 },
182 { 0x28, 0xff },
183 { 0x29, 0x80 },
184 { 0x2a, 0x02 },
185 { 0x2b, 0x07 },
186 { 0x24, 0x6f },
187 { },
188};
189
190static struct cdce_reg cdce_y5_81000[] = {
191 { 0x27, 0x02 },
192 { 0x28, 0xbf },
193 { 0x29, 0xa0 },
194 { 0x2a, 0x03 },
195 { 0x2b, 0x0a },
196 { 0x24, 0x6f },
197 { },
198};
199
200static struct cdce_freq cdce_y5_freqs[] = {
201 CDCE_FREQ_TABLE_ENTRY(5, 13500),
202 CDCE_FREQ_TABLE_ENTRY(5, 16875),
203 CDCE_FREQ_TABLE_ENTRY(5, 27000),
204 CDCE_FREQ_TABLE_ENTRY(5, 54000),
205 CDCE_FREQ_TABLE_ENTRY(5, 81000),
206};
207
208
209static struct cdce_output output_list[] = {
210 [1] = { cdce_y1_freqs, ARRAY_SIZE(cdce_y1_freqs) },
211 [5] = { cdce_y5_freqs, ARRAY_SIZE(cdce_y5_freqs) },
212};
213
214int cdce_set_rate(struct clk *clk, unsigned long rate)
215{
216 int i, ret = 0;
217 struct cdce_freq *freq_table = output_list[clk->lpsc].freq_table;
218 struct cdce_reg *regs = NULL;
219
220 if (!cdce_i2c_client)
221 return -ENODEV;
222
223 if (!freq_table)
224 return -EINVAL;
225
226 for (i = 0; i < output_list[clk->lpsc].size; i++) {
227 if (freq_table[i].frequency == rate / 1000) {
228 regs = freq_table[i].reglist;
229 break;
230 }
231 }
232
233 if (!regs)
234 return -EINVAL;
235
3b43cd6f 236 mutex_lock(&cdce_mutex);
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237 for (i = 0; regs[i].addr; i++) {
238 ret = i2c_smbus_write_byte_data(cdce_i2c_client,
239 regs[i].addr | 0x80, regs[i].val);
240 if (ret)
3b43cd6f 241 break;
5b8972d1 242 }
3b43cd6f 243 mutex_unlock(&cdce_mutex);
5b8972d1 244
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245 if (!ret)
246 clk->rate = rate;
5b8972d1 247
3b43cd6f 248 return ret;
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249}
250
251static int cdce_probe(struct i2c_client *client,
252 const struct i2c_device_id *id)
253{
254 cdce_i2c_client = client;
255 return 0;
256}
257
258static int __devexit cdce_remove(struct i2c_client *client)
259{
260 cdce_i2c_client = NULL;
261 return 0;
262}
263
264static const struct i2c_device_id cdce_id[] = {
265 {"cdce949", 0},
266 {},
267};
268MODULE_DEVICE_TABLE(i2c, cdce_id);
269
270static struct i2c_driver cdce_driver = {
271 .driver = {
272 .owner = THIS_MODULE,
273 .name = "cdce949",
274 },
275 .probe = cdce_probe,
276 .remove = __devexit_p(cdce_remove),
277 .id_table = cdce_id,
278};
279
280static int __init cdce_init(void)
281{
282 return i2c_add_driver(&cdce_driver);
283}
284subsys_initcall(cdce_init);
285
286static void __exit cdce_exit(void)
287{
288 i2c_del_driver(&cdce_driver);
289}
290module_exit(cdce_exit);
291
292MODULE_AUTHOR("Texas Instruments");
293MODULE_DESCRIPTION("CDCE949 clock synthesizer driver");
294MODULE_LICENSE("GPL v2");
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