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ARM: keystone: dts: add a k2hk-evm specific dts file
[deliverable/linux.git] / arch / arm / mach-ep93xx / core.c
CommitLineData
e7736d47
LB		 1/*
2 * arch/arm/mach-ep93xx/core.c
3 * Core routines for Cirrus EP93xx chips.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
3c9a071d 6 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
e7736d47
LB		 7 *
8 * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9 * role in the ep93xx linux community.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 */
16
64d6882d
HS		 17#define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
18
e7736d47
LB		 19#include <linux/kernel.h>
20#include <linux/init.h>
583ddafe 21#include <linux/platform_device.h>
e7736d47 22#include <linux/interrupt.h>
63890a0e 23#include <linux/dma-mapping.h>
e7736d47 24#include <linux/timex.h>
6bd4b382 25#include <linux/irq.h>
583ddafe
HS		 26#include <linux/io.h>
27#include <linux/gpio.h>
3aa7a9a3 28#include <linux/leds.h>
aee85fe8 29#include <linux/termios.h>
e7736d47 30#include <linux/amba/bus.h>
aee85fe8 31#include <linux/amba/serial.h>
16bcf78f 32#include <linux/mtd/physmap.h>
d52a26a9
HS		 33#include <linux/i2c.h>
34#include <linux/i2c-gpio.h>
4fec9978 35#include <linux/spi/spi.h>
dc28094b 36#include <linux/export.h>
9e47b8bf 37#include <linux/irqchip/arm-vic.h>
7b6d864b 38#include <linux/reboot.h>
e55f7cd2 39#include <linux/usb/ohci_pdriver.h>
e7736d47 40
a09e64fb 41#include <mach/hardware.h>
a3b29245
AB		 42#include <linux/platform_data/video-ep93xx.h>
43#include <linux/platform_data/keypad-ep93xx.h>
44#include <linux/platform_data/spi-ep93xx.h>
bd5f12a2 45#include <mach/gpio-ep93xx.h>
e7736d47
LB		 46
47#include <asm/mach/map.h>
48#include <asm/mach/time.h>
e7736d47 49
a05baf33 50#include "soc.h"
e7736d47
LB		 51
52/*************************************************************************
53 * Static I/O mappings that are needed for all EP93xx platforms
54 *************************************************************************/
55static struct map_desc ep93xx_io_desc[] __initdata = {
56 {
57 .virtual = EP93XX_AHB_VIRT_BASE,
58 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
59 .length = EP93XX_AHB_SIZE,
60 .type = MT_DEVICE,
61 }, {
62 .virtual = EP93XX_APB_VIRT_BASE,
63 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
64 .length = EP93XX_APB_SIZE,
65 .type = MT_DEVICE,
66 },
67};
68
69void __init ep93xx_map_io(void)
70{
71 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
72}
73
74
75/*************************************************************************
76 * Timer handling for EP93xx
77 *************************************************************************
78 * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
79 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
80 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
81 * is free-running, and can't generate interrupts.
82 *
83 * The 508 kHz timers are ideal for use for the timer interrupt, as the
84 * most common values of HZ divide 508 kHz nicely. We pick one of the 16
85 * bit timers (timer 1) since we don't need more than 16 bits of reload
86 * value as long as HZ >= 8.
87 *
88 * The higher clock rate of timer 4 makes it a better choice than the
89 * other timers for use in gettimeoffset(), while the fact that it can't
90 * generate interrupts means we don't have to worry about not being able
91 * to use this timer for something else. We also use timer 4 for keeping
92 * track of lost jiffies.
93 */
1587a373
HS		 94#define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
95#define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
96#define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
97#define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
98#define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
99#define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
100#define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
101#define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
102#define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
103#define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
104#define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
105#define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
106#define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
107#define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
108#define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
109#define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
110#define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
111#define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
112#define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
113
114#define EP93XX_TIMER123_CLOCK 508469
115#define EP93XX_TIMER4_CLOCK 983040
116
117#define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
af1057ab 118#define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
e7736d47 119
1587a373
HS		 120static unsigned int last_jiffy_time;
121
d5565f76 122static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
e7736d47 123{
1587a373 124 /* Writing any value clears the timer interrupt */
e7736d47 125 __raw_writel(1, EP93XX_TIMER1_CLEAR);
1587a373
HS		 126
127 /* Recover lost jiffies */
f869afab
LB		 128 while ((signed long)
129 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
e7736d47
LB		 130 >= TIMER4_TICKS_PER_JIFFY) {
131 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
0cd61b68 132 timer_tick();
e7736d47
LB		 133 }
134
e7736d47
LB		 135 return IRQ_HANDLED;
136}
137
138static struct irqaction ep93xx_timer_irq = {
139 .name = "ep93xx timer",
b30fabad 140 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
e7736d47
LB		 141 .handler = ep93xx_timer_interrupt,
142};
143
23c197b7
SW		 144static u32 ep93xx_gettimeoffset(void)
145{
146 int offset;
147
148 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
149
150 /*
151 * Timer 4 is based on a 983.04 kHz reference clock,
152 * so dividing by 983040 gives the fraction of a second,
153 * so dividing by 0.983040 converts to uS.
154 * Refactor the calculation to avoid overflow.
155 * Finally, multiply by 1000 to give nS.
156 */
157 return (offset + (53 * offset / 3072)) * 1000;
158}
159
6bb27d73 160void __init ep93xx_timer_init(void)
e7736d47 161{
1587a373
HS		 162 u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
163 EP93XX_TIMER123_CONTROL_CLKSEL;
164
23c197b7
SW		 165 arch_gettimeoffset = ep93xx_gettimeoffset;
166
e7736d47 167 /* Enable periodic HZ timer. */
1587a373
HS		 168 __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
169 __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
170 __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
171 EP93XX_TIMER1_CONTROL);
e7736d47
LB		 172
173 /* Enable lost jiffy timer. */
1587a373
HS		 174 __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
175 EP93XX_TIMER4_VALUE_HIGH);
e7736d47
LB		 176
177 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
178}
179
e7736d47
LB		 180
181/*************************************************************************
182 * EP93xx IRQ handling
183 *************************************************************************/
184void __init ep93xx_init_irq(void)
185{
5396730b
HS		 186 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
187 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
e7736d47
LB		 188}
189
190
02239f0a
HS		 191/*************************************************************************
192 * EP93xx System Controller Software Locked register handling
193 *************************************************************************/
194
195/*
196 * syscon_swlock prevents anything else from writing to the syscon
197 * block while a software locked register is being written.
198 */
199static DEFINE_SPINLOCK(syscon_swlock);
200
fbeeea53 201void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
02239f0a
HS		 202{
203 unsigned long flags;
204
205 spin_lock_irqsave(&syscon_swlock, flags);
206
207 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
208 __raw_writel(val, reg);
209
210 spin_unlock_irqrestore(&syscon_swlock, flags);
211}
02239f0a
HS		 212
213void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
214{
215 unsigned long flags;
216 unsigned int val;
217
218 spin_lock_irqsave(&syscon_swlock, flags);
219
220 val = __raw_readl(EP93XX_SYSCON_DEVCFG);
02239f0a 221 val &= ~clear_bits;
a0fb007b 222 val |= set_bits;
02239f0a
HS		 223 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
224 __raw_writel(val, EP93XX_SYSCON_DEVCFG);
225
226 spin_unlock_irqrestore(&syscon_swlock, flags);
227}
02239f0a 228
99e6a23a
MW		 229/**
230 * ep93xx_chip_revision() - returns the EP93xx chip revision
231 *
232 * See <mach/platform.h> for more information.
233 */
234unsigned int ep93xx_chip_revision(void)
235{
236 unsigned int v;
237
238 v = __raw_readl(EP93XX_SYSCON_SYSCFG);
239 v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
240 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
241 return v;
242}
02239f0a 243
1e4c8842
HS		 244/*************************************************************************
245 * EP93xx GPIO
246 *************************************************************************/
247static struct resource ep93xx_gpio_resource[] = {
ede55aaa 248 DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),
1e4c8842
HS		 249};
250
251static struct platform_device ep93xx_gpio_device = {
252 .name = "gpio-ep93xx",
253 .id = -1,
254 .num_resources = ARRAY_SIZE(ep93xx_gpio_resource),
255 .resource = ep93xx_gpio_resource,
256};
257
e7736d47
LB		 258/*************************************************************************
259 * EP93xx peripheral handling
260 *************************************************************************/
aee85fe8
LB		 261#define EP93XX_UART_MCR_OFFSET (0x0100)
262
263static void ep93xx_uart_set_mctrl(struct amba_device *dev,
264 void __iomem *base, unsigned int mctrl)
265{
266 unsigned int mcr;
267
268 mcr = 0;
186dcaa4 269 if (mctrl & TIOCM_RTS)
aee85fe8 270 mcr |= 2;
186dcaa4 271 if (mctrl & TIOCM_DTR)
aee85fe8
LB		 272 mcr |= 1;
273
274 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
275}
276
277static struct amba_pl010_data ep93xx_uart_data = {
278 .set_mctrl = ep93xx_uart_set_mctrl,
279};
280
0b26051b
RK		 281static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
282 { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
aee85fe8 283
0b26051b 284static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
cc3874fe 285 { IRQ_EP93XX_UART2 }, NULL);
aee85fe8 286
0b26051b
RK		 287static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
288 { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
41658132 289
38f7b009 290static struct resource ep93xx_rtc_resource[] = {
ede55aaa 291 DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),
38f7b009
HS		 292};
293
41658132 294static struct platform_device ep93xx_rtc_device = {
38f7b009
HS		 295 .name = "ep93xx-rtc",
296 .id = -1,
297 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
298 .resource = ep93xx_rtc_resource,
41658132
LB		 299};
300
e55f7cd2
HS		 301/*************************************************************************
302 * EP93xx OHCI USB Host
303 *************************************************************************/
304
305static struct clk *ep93xx_ohci_host_clock;
306
307static int ep93xx_ohci_power_on(struct platform_device *pdev)
308{
309 if (!ep93xx_ohci_host_clock) {
310 ep93xx_ohci_host_clock = devm_clk_get(&pdev->dev, NULL);
311 if (IS_ERR(ep93xx_ohci_host_clock))
312 return PTR_ERR(ep93xx_ohci_host_clock);
313 }
314
315 return clk_enable(ep93xx_ohci_host_clock);
316}
317
318static void ep93xx_ohci_power_off(struct platform_device *pdev)
319{
320 clk_disable(ep93xx_ohci_host_clock);
321}
322
323static struct usb_ohci_pdata ep93xx_ohci_pdata = {
324 .power_on = ep93xx_ohci_power_on,
325 .power_off = ep93xx_ohci_power_off,
326 .power_suspend = ep93xx_ohci_power_off,
327};
41658132 328
1f64eb37 329static struct resource ep93xx_ohci_resources[] = {
ede55aaa
HS		 330 DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),
331 DEFINE_RES_IRQ(IRQ_EP93XX_USB),
1f64eb37
LB		 332};
333
e55f7cd2 334static u64 ep93xx_ohci_dma_mask = DMA_BIT_MASK(32);
63890a0e 335
1f64eb37 336static struct platform_device ep93xx_ohci_device = {
e55f7cd2 337 .name = "ohci-platform",
1f64eb37 338 .id = -1,
e55f7cd2
HS		 339 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
340 .resource = ep93xx_ohci_resources,
1f64eb37 341 .dev = {
e55f7cd2 342 .dma_mask = &ep93xx_ohci_dma_mask,
63890a0e 343 .coherent_dma_mask = DMA_BIT_MASK(32),
e55f7cd2 344 .platform_data = &ep93xx_ohci_pdata,
1f64eb37 345 },
1f64eb37
LB		 346};
347
16bcf78f
HS		 348/*************************************************************************
349 * EP93xx physmap'ed flash
350 *************************************************************************/
351static struct physmap_flash_data ep93xx_flash_data;
352
353static struct resource ep93xx_flash_resource = {
354 .flags = IORESOURCE_MEM,
355};
356
357static struct platform_device ep93xx_flash = {
358 .name = "physmap-flash",
359 .id = 0,
360 .dev = {
361 .platform_data = &ep93xx_flash_data,
362 },
363 .num_resources = 1,
364 .resource = &ep93xx_flash_resource,
365};
366
367/**
368 * ep93xx_register_flash() - Register the external flash device.
369 * @width: bank width in octets
370 * @start: resource start address
371 * @size: resource size
372 */
373void __init ep93xx_register_flash(unsigned int width,
374 resource_size_t start, resource_size_t size)
375{
376 ep93xx_flash_data.width = width;
377
378 ep93xx_flash_resource.start = start;
379 ep93xx_flash_resource.end = start + size - 1;
380
381 platform_device_register(&ep93xx_flash);
382}
383
384
b370e082
HS		 385/*************************************************************************
386 * EP93xx ethernet peripheral handling
387 *************************************************************************/
a0a08fdc
HS		 388static struct ep93xx_eth_data ep93xx_eth_data;
389
390static struct resource ep93xx_eth_resource[] = {
ede55aaa 391 DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000),
011b2e84 392 DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET),
a0a08fdc
HS		 393};
394
fa70cf47
MW		 395static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
396
a0a08fdc
HS		 397static struct platform_device ep93xx_eth_device = {
398 .name = "ep93xx-eth",
399 .id = -1,
400 .dev = {
fa70cf47
MW		 401 .platform_data = &ep93xx_eth_data,
402 .coherent_dma_mask = DMA_BIT_MASK(32),
403 .dma_mask = &ep93xx_eth_dma_mask,
a0a08fdc
HS		 404 },
405 .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
406 .resource = ep93xx_eth_resource,
407};
408
b370e082
HS		 409/**
410 * ep93xx_register_eth - Register the built-in ethernet platform device.
411 * @data: platform specific ethernet configuration (__initdata)
412 * @copy_addr: flag indicating that the MAC address should be copied
413 * from the IndAd registers (as programmed by the bootloader)
414 */
a0a08fdc
HS		 415void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
416{
5b1c3c85
HS		 417 if (copy_addr)
418 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
a0a08fdc
HS		 419
420 ep93xx_eth_data = *data;
421 platform_device_register(&ep93xx_eth_device);
422}
423
6531a991
HS		 424
425/*************************************************************************
426 * EP93xx i2c peripheral handling
427 *************************************************************************/
428static struct i2c_gpio_platform_data ep93xx_i2c_data;
d52a26a9
HS		 429
430static struct platform_device ep93xx_i2c_device = {
b370e082
HS		 431 .name = "i2c-gpio",
432 .id = 0,
433 .dev = {
434 .platform_data = &ep93xx_i2c_data,
435 },
d52a26a9
HS		 436};
437
b370e082
HS		 438/**
439 * ep93xx_register_i2c - Register the i2c platform device.
440 * @data: platform specific i2c-gpio configuration (__initdata)
441 * @devices: platform specific i2c bus device information (__initdata)
442 * @num: the number of devices on the i2c bus
443 */
6531a991
HS		 444void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
445 struct i2c_board_info *devices, int num)
d52a26a9 446{
6531a991
HS		 447 /*
448 * Set the EEPROM interface pin drive type control.
449 * Defines the driver type for the EECLK and EEDAT pins as either
450 * open drain, which will require an external pull-up, or a normal
451 * CMOS driver.
452 */
453 if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
64d6882d 454 pr_warning("sda != EEDAT, open drain has no effect\n");
6531a991 455 if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
64d6882d 456 pr_warning("scl != EECLK, open drain has no effect\n");
6531a991
HS		 457
458 __raw_writel((data->sda_is_open_drain << 1) |
459 (data->scl_is_open_drain << 0),
460 EP93XX_GPIO_EEDRIVE);
461
462 ep93xx_i2c_data = *data;
d52a26a9
HS		 463 i2c_register_board_info(0, devices, num);
464 platform_device_register(&ep93xx_i2c_device);
465}
466
4fec9978
MW		 467/*************************************************************************
468 * EP93xx SPI peripheral handling
469 *************************************************************************/
470static struct ep93xx_spi_info ep93xx_spi_master_data;
471
472static struct resource ep93xx_spi_resources[] = {
ede55aaa
HS		 473 DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),
474 DEFINE_RES_IRQ(IRQ_EP93XX_SSP),
4fec9978
MW		 475};
476
626a96db
MW		 477static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
478
4fec9978
MW		 479static struct platform_device ep93xx_spi_device = {
480 .name = "ep93xx-spi",
481 .id = 0,
482 .dev = {
626a96db
MW		 483 .platform_data = &ep93xx_spi_master_data,
484 .coherent_dma_mask = DMA_BIT_MASK(32),
485 .dma_mask = &ep93xx_spi_dma_mask,
4fec9978
MW		 486 },
487 .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
488 .resource = ep93xx_spi_resources,
489};
490
491/**
492 * ep93xx_register_spi() - registers spi platform device
493 * @info: ep93xx board specific spi master info (__initdata)
494 * @devices: SPI devices to register (__initdata)
495 * @num: number of SPI devices to register
496 *
497 * This function registers platform device for the EP93xx SPI controller and
498 * also makes sure that SPI pins are muxed so that I2S is not using those pins.
499 */
500void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
501 struct spi_board_info *devices, int num)
502{
503 /*
504 * When SPI is used, we need to make sure that I2S is muxed off from
505 * SPI pins.
506 */
507 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
508
509 ep93xx_spi_master_data = *info;
510 spi_register_board_info(devices, num);
511 platform_device_register(&ep93xx_spi_device);
512}
3aa7a9a3
HS		 513
514/*************************************************************************
515 * EP93xx LEDs
516 *************************************************************************/
a1eacd79 517static const struct gpio_led ep93xx_led_pins[] __initconst = {
3aa7a9a3 518 {
b370e082
HS		 519 .name = "platform:grled",
520 .gpio = EP93XX_GPIO_LINE_GRLED,
3aa7a9a3 521 }, {
b370e082
HS		 522 .name = "platform:rdled",
523 .gpio = EP93XX_GPIO_LINE_RDLED,
3aa7a9a3
HS		 524 },
525};
526
a1eacd79 527static const struct gpio_led_platform_data ep93xx_led_data __initconst = {
3aa7a9a3
HS		 528 .num_leds = ARRAY_SIZE(ep93xx_led_pins),
529 .leds = ep93xx_led_pins,
530};
531
ef12379f
HS		 532/*************************************************************************
533 * EP93xx pwm peripheral handling
534 *************************************************************************/
535static struct resource ep93xx_pwm0_resource[] = {
ede55aaa 536 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),
ef12379f
HS		 537};
538
539static struct platform_device ep93xx_pwm0_device = {
540 .name = "ep93xx-pwm",
541 .id = 0,
542 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
543 .resource = ep93xx_pwm0_resource,
544};
545
546static struct resource ep93xx_pwm1_resource[] = {
ede55aaa 547 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10),
ef12379f
HS		 548};
549
550static struct platform_device ep93xx_pwm1_device = {
551 .name = "ep93xx-pwm",
552 .id = 1,
553 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
554 .resource = ep93xx_pwm1_resource,
555};
556
557void __init ep93xx_register_pwm(int pwm0, int pwm1)
558{
559 if (pwm0)
560 platform_device_register(&ep93xx_pwm0_device);
561
562 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
563 if (pwm1)
564 platform_device_register(&ep93xx_pwm1_device);
565}
566
567int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
568{
569 int err;
570
571 if (pdev->id == 0) {
572 err = 0;
573 } else if (pdev->id == 1) {
574 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
575 dev_name(&pdev->dev));
576 if (err)
577 return err;
578 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
579 if (err)
580 goto fail;
581
582 /* PWM 1 output on EGPIO[14] */
583 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
584 } else {
585 err = -ENODEV;
586 }
587
588 return err;
589
590fail:
591 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
592 return err;
593}
594EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
595
596void ep93xx_pwm_release_gpio(struct platform_device *pdev)
597{
598 if (pdev->id == 1) {
599 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
600 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
601
602 /* EGPIO[14] used for GPIO */
603 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
604 }
605}
606EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
607
608
c6012189
RM		 609/*************************************************************************
610 * EP93xx video peripheral handling
611 *************************************************************************/
612static struct ep93xxfb_mach_info ep93xxfb_data;
613
614static struct resource ep93xx_fb_resource[] = {
ede55aaa 615 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),
c6012189
RM		 616};
617
618static struct platform_device ep93xx_fb_device = {
619 .name = "ep93xx-fb",
620 .id = -1,
621 .dev = {
b370e082 622 .platform_data = &ep93xxfb_data,
c6012189
RM		 623 .coherent_dma_mask = DMA_BIT_MASK(32),
624 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
625 },
626 .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
627 .resource = ep93xx_fb_resource,
628};
629
0fd19580
RM		 630/* The backlight use a single register in the framebuffer's register space */
631#define EP93XX_RASTER_REG_BRIGHTNESS 0x20
632
633static struct resource ep93xx_bl_resources[] = {
634 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
635 EP93XX_RASTER_REG_BRIGHTNESS, 0x04),
636};
637
6ea4b741
HS		 638static struct platform_device ep93xx_bl_device = {
639 .name = "ep93xx-bl",
640 .id = -1,
0fd19580
RM		 641 .num_resources = ARRAY_SIZE(ep93xx_bl_resources),
642 .resource = ep93xx_bl_resources,
6ea4b741
HS		 643};
644
b370e082
HS		 645/**
646 * ep93xx_register_fb - Register the framebuffer platform device.
647 * @data: platform specific framebuffer configuration (__initdata)
648 */
c6012189
RM		 649void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
650{
651 ep93xxfb_data = *data;
652 platform_device_register(&ep93xx_fb_device);
6ea4b741 653 platform_device_register(&ep93xx_bl_device);
c6012189
RM		 654}
655
12f56c68
HS		 656
657/*************************************************************************
658 * EP93xx matrix keypad peripheral handling
659 *************************************************************************/
b370e082
HS		 660static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
661
12f56c68 662static struct resource ep93xx_keypad_resource[] = {
ede55aaa
HS		 663 DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c),
664 DEFINE_RES_IRQ(IRQ_EP93XX_KEY),
12f56c68
HS		 665};
666
667static struct platform_device ep93xx_keypad_device = {
b370e082
HS		 668 .name = "ep93xx-keypad",
669 .id = -1,
670 .dev = {
671 .platform_data = &ep93xx_keypad_data,
672 },
673 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
674 .resource = ep93xx_keypad_resource,
12f56c68
HS		 675};
676
b370e082
HS		 677/**
678 * ep93xx_register_keypad - Register the keypad platform device.
679 * @data: platform specific keypad configuration (__initdata)
680 */
12f56c68
HS		 681void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
682{
b370e082 683 ep93xx_keypad_data = *data;
12f56c68
HS		 684 platform_device_register(&ep93xx_keypad_device);
685}
686
687int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
688{
689 int err;
690 int i;
691
692 for (i = 0; i < 8; i++) {
693 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
694 if (err)
695 goto fail_gpio_c;
696 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
697 if (err)
698 goto fail_gpio_d;
699 }
700
701 /* Enable the keypad controller; GPIO ports C and D used for keypad */
702 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
703 EP93XX_SYSCON_DEVCFG_GONK);
704
705 return 0;
706
707fail_gpio_d:
708 gpio_free(EP93XX_GPIO_LINE_C(i));
709fail_gpio_c:
5528a846 710 for (--i; i >= 0; --i) {
12f56c68
HS		 711 gpio_free(EP93XX_GPIO_LINE_C(i));
712 gpio_free(EP93XX_GPIO_LINE_D(i));
713 }
714 return err;
715}
716EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
717
718void ep93xx_keypad_release_gpio(struct platform_device *pdev)
719{
720 int i;
721
722 for (i = 0; i < 8; i++) {
723 gpio_free(EP93XX_GPIO_LINE_C(i));
724 gpio_free(EP93XX_GPIO_LINE_D(i));
725 }
726
727 /* Disable the keypad controller; GPIO ports C and D used for GPIO */
728 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
729 EP93XX_SYSCON_DEVCFG_GONK);
730}
731EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
732
ed67ea82
RM		 733/*************************************************************************
734 * EP93xx I2S audio peripheral handling
735 *************************************************************************/
736static struct resource ep93xx_i2s_resource[] = {
ede55aaa 737 DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
ed67ea82
RM		 738};
739
740static struct platform_device ep93xx_i2s_device = {
741 .name = "ep93xx-i2s",
742 .id = -1,
743 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
744 .resource = ep93xx_i2s_resource,
745};
746
f0fba2ad
LG		 747static struct platform_device ep93xx_pcm_device = {
748 .name = "ep93xx-pcm-audio",
749 .id = -1,
750};
751
ed67ea82
RM		 752void __init ep93xx_register_i2s(void)
753{
754 platform_device_register(&ep93xx_i2s_device);
f0fba2ad 755 platform_device_register(&ep93xx_pcm_device);
ed67ea82
RM		 756}
757
758#define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
759 EP93XX_SYSCON_DEVCFG_I2SONAC97)
760
761#define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
762 EP93XX_SYSCON_I2SCLKDIV_SPOL)
763
f15855bf 764int ep93xx_i2s_acquire(void)
ed67ea82
RM		 765{
766 unsigned val;
767
f15855bf
RM		 768 ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
769 EP93XX_SYSCON_DEVCFG_I2S_MASK);
ed67ea82
RM		 770
771 /*
772 * This is potentially racy with the clock api for i2s_mclk, sclk and
773 * lrclk. Since the i2s driver is the only user of those clocks we
774 * rely on it to prevent parallel use of this function and the
775 * clock api for the i2s clocks.
776 */
777 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
778 val &= ~EP93XX_I2SCLKDIV_MASK;
f15855bf 779 val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
ed67ea82
RM		 780 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
781
782 return 0;
783}
784EXPORT_SYMBOL(ep93xx_i2s_acquire);
785
786void ep93xx_i2s_release(void)
787{
788 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
789}
790EXPORT_SYMBOL(ep93xx_i2s_release);
12f56c68 791
534bc7fa
MW		 792/*************************************************************************
793 * EP93xx AC97 audio peripheral handling
794 *************************************************************************/
795static struct resource ep93xx_ac97_resources[] = {
ede55aaa
HS		 796 DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac),
797 DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR),
534bc7fa
MW		 798};
799
800static struct platform_device ep93xx_ac97_device = {
801 .name = "ep93xx-ac97",
802 .id = -1,
803 .num_resources = ARRAY_SIZE(ep93xx_ac97_resources),
804 .resource = ep93xx_ac97_resources,
805};
806
807void __init ep93xx_register_ac97(void)
808{
809 /*
810 * Make sure that the AC97 pins are not used by I2S.
811 */
812 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
813
814 platform_device_register(&ep93xx_ac97_device);
815 platform_device_register(&ep93xx_pcm_device);
816}
817
73303d12
HS		 818/*************************************************************************
819 * EP93xx Watchdog
820 *************************************************************************/
821static struct resource ep93xx_wdt_resources[] = {
822 DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08),
823};
824
825static struct platform_device ep93xx_wdt_device = {
826 .name = "ep93xx-wdt",
827 .id = -1,
828 .num_resources = ARRAY_SIZE(ep93xx_wdt_resources),
829 .resource = ep93xx_wdt_resources,
830};
831
eb774a09
RP		 832/*************************************************************************
833 * EP93xx IDE
834 *************************************************************************/
835static struct resource ep93xx_ide_resources[] = {
836 DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38),
837 DEFINE_RES_IRQ(IRQ_EP93XX_EXT3),
838};
839
840static struct platform_device ep93xx_ide_device = {
841 .name = "ep93xx-ide",
842 .id = -1,
843 .dev = {
844 .dma_mask = &ep93xx_ide_device.dev.coherent_dma_mask,
845 .coherent_dma_mask = DMA_BIT_MASK(32),
846 },
847 .num_resources = ARRAY_SIZE(ep93xx_ide_resources),
848 .resource = ep93xx_ide_resources,
849};
850
851void __init ep93xx_register_ide(void)
852{
853 platform_device_register(&ep93xx_ide_device);
854}
855
856int ep93xx_ide_acquire_gpio(struct platform_device *pdev)
857{
858 int err;
859 int i;
860
861 err = gpio_request(EP93XX_GPIO_LINE_EGPIO2, dev_name(&pdev->dev));
862 if (err)
863 return err;
864 err = gpio_request(EP93XX_GPIO_LINE_EGPIO15, dev_name(&pdev->dev));
865 if (err)
866 goto fail_egpio15;
867 for (i = 2; i < 8; i++) {
868 err = gpio_request(EP93XX_GPIO_LINE_E(i), dev_name(&pdev->dev));
869 if (err)
870 goto fail_gpio_e;
871 }
872 for (i = 4; i < 8; i++) {
873 err = gpio_request(EP93XX_GPIO_LINE_G(i), dev_name(&pdev->dev));
874 if (err)
875 goto fail_gpio_g;
876 }
877 for (i = 0; i < 8; i++) {
878 err = gpio_request(EP93XX_GPIO_LINE_H(i), dev_name(&pdev->dev));
879 if (err)
880 goto fail_gpio_h;
881 }
882
883 /* GPIO ports E[7:2], G[7:4] and H used by IDE */
884 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
885 EP93XX_SYSCON_DEVCFG_GONIDE |
886 EP93XX_SYSCON_DEVCFG_HONIDE);
887 return 0;
888
889fail_gpio_h:
890 for (--i; i >= 0; --i)
891 gpio_free(EP93XX_GPIO_LINE_H(i));
892 i = 8;
893fail_gpio_g:
894 for (--i; i >= 4; --i)
895 gpio_free(EP93XX_GPIO_LINE_G(i));
896 i = 8;
897fail_gpio_e:
898 for (--i; i >= 2; --i)
899 gpio_free(EP93XX_GPIO_LINE_E(i));
900 gpio_free(EP93XX_GPIO_LINE_EGPIO15);
901fail_egpio15:
902 gpio_free(EP93XX_GPIO_LINE_EGPIO2);
903 return err;
904}
905EXPORT_SYMBOL(ep93xx_ide_acquire_gpio);
906
907void ep93xx_ide_release_gpio(struct platform_device *pdev)
908{
909 int i;
910
911 for (i = 2; i < 8; i++)
912 gpio_free(EP93XX_GPIO_LINE_E(i));
913 for (i = 4; i < 8; i++)
914 gpio_free(EP93XX_GPIO_LINE_G(i));
915 for (i = 0; i < 8; i++)
916 gpio_free(EP93XX_GPIO_LINE_H(i));
917 gpio_free(EP93XX_GPIO_LINE_EGPIO15);
918 gpio_free(EP93XX_GPIO_LINE_EGPIO2);
919
920
921 /* GPIO ports E[7:2], G[7:4] and H used by GPIO */
922 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
923 EP93XX_SYSCON_DEVCFG_GONIDE |
924 EP93XX_SYSCON_DEVCFG_HONIDE);
925}
926EXPORT_SYMBOL(ep93xx_ide_release_gpio);
927
e7736d47
LB		 928void __init ep93xx_init_devices(void)
929{
02239f0a
HS		 930 /* Disallow access to MaverickCrunch initially */
931 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
aee85fe8 932
08932d81
RM		 933 /* Default all ports to GPIO */
934 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
935 EP93XX_SYSCON_DEVCFG_GONK |
936 EP93XX_SYSCON_DEVCFG_EONIDE |
937 EP93XX_SYSCON_DEVCFG_GONIDE |
938 EP93XX_SYSCON_DEVCFG_HONIDE);
939
1e4c8842
HS		 940 /* Get the GPIO working early, other devices need it */
941 platform_device_register(&ep93xx_gpio_device);
b685004f 942
aee85fe8
LB		 943 amba_device_register(&uart1_device, &iomem_resource);
944 amba_device_register(&uart2_device, &iomem_resource);
945 amba_device_register(&uart3_device, &iomem_resource);
41658132
LB		 946
947 platform_device_register(&ep93xx_rtc_device);
1f64eb37 948 platform_device_register(&ep93xx_ohci_device);
73303d12 949 platform_device_register(&ep93xx_wdt_device);
a1eacd79
HS		 950
951 gpio_led_register_device(-1, &ep93xx_led_data);
e7736d47 952}
3275166e 953
7b6d864b 954void ep93xx_restart(enum reboot_mode mode, const char *cmd)
3275166e
RK		 955{
956 /*
957 * Set then clear the SWRST bit to initiate a software reset
958 */
959 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
960 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
961
962 while (1)
963 ;
964}
c914283f
SG		 965
966void __init ep93xx_init_late(void)
967{
968 crunch_init();
969}
Linux kernel - Deliverables
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