[deliverable/linux.git] / arch / arm / mach-exynos / common.h

/*
 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * Common Header for EXYNOS machines
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
#define __ARCH_ARM_MACH_EXYNOS_COMMON_H

#include <linux/platform_data/cpuidle-exynos.h>

#define EXYNOS3250_SOC_ID	0xE3472000
#define EXYNOS3_SOC_MASK	0xFFFFF000

#define EXYNOS4210_CPU_ID	0x43210000
#define EXYNOS4212_CPU_ID	0x43220000
#define EXYNOS4412_CPU_ID	0xE4412200
#define EXYNOS4_CPU_MASK	0xFFFE0000

#define EXYNOS5250_SOC_ID	0x43520000
#define EXYNOS5410_SOC_ID	0xE5410000
#define EXYNOS5420_SOC_ID	0xE5420000
#define EXYNOS5440_SOC_ID	0xE5440000
#define EXYNOS5800_SOC_ID	0xE5422000
#define EXYNOS5_SOC_MASK	0xFFFFF000

extern unsigned long samsung_cpu_id;

#define IS_SAMSUNG_CPU(name, id, mask)		\
static inline int is_samsung_##name(void)	\
{						\
	return ((samsung_cpu_id & mask) == (id & mask));	\
}

IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK)
IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK)
IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)

#if defined(CONFIG_SOC_EXYNOS3250)
# define soc_is_exynos3250()	is_samsung_exynos3250()
#else
# define soc_is_exynos3250()	0
#endif

#if defined(CONFIG_CPU_EXYNOS4210)
# define soc_is_exynos4210()	is_samsung_exynos4210()
#else
# define soc_is_exynos4210()	0
#endif

#if defined(CONFIG_SOC_EXYNOS4212)
# define soc_is_exynos4212()	is_samsung_exynos4212()
#else
# define soc_is_exynos4212()	0
#endif

#if defined(CONFIG_SOC_EXYNOS4412)
# define soc_is_exynos4412()	is_samsung_exynos4412()
#else
# define soc_is_exynos4412()	0
#endif

#define EXYNOS4210_REV_0	(0x0)
#define EXYNOS4210_REV_1_0	(0x10)
#define EXYNOS4210_REV_1_1	(0x11)

#if defined(CONFIG_SOC_EXYNOS5250)
# define soc_is_exynos5250()	is_samsung_exynos5250()
#else
# define soc_is_exynos5250()	0
#endif

#if defined(CONFIG_SOC_EXYNOS5410)
# define soc_is_exynos5410()	is_samsung_exynos5410()
#else
# define soc_is_exynos5410()	0
#endif

#if defined(CONFIG_SOC_EXYNOS5420)
# define soc_is_exynos5420()	is_samsung_exynos5420()
#else
# define soc_is_exynos5420()	0
#endif

#if defined(CONFIG_SOC_EXYNOS5440)
# define soc_is_exynos5440()	is_samsung_exynos5440()
#else
# define soc_is_exynos5440()	0
#endif

#if defined(CONFIG_SOC_EXYNOS5800)
# define soc_is_exynos5800()	is_samsung_exynos5800()
#else
# define soc_is_exynos5800()	0
#endif

#define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4212() || \
			  soc_is_exynos4412())
#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5410() || \
			  soc_is_exynos5420() || soc_is_exynos5800())

extern u32 cp15_save_diag;
extern u32 cp15_save_power;

extern void __iomem *sysram_ns_base_addr;
extern void __iomem *sysram_base_addr;
extern void __iomem *pmu_base_addr;
void exynos_sysram_init(void);

enum {
	FW_DO_IDLE_SLEEP,
	FW_DO_IDLE_AFTR,
};

void exynos_firmware_init(void);

/* CPU BOOT mode flag for Exynos3250 SoC bootloader */
#define C2_STATE	(1 << 3)
/*
 * Magic values for bootloader indicating chosen low power mode.
 * See also Documentation/arm/Samsung/Bootloader-interface.txt
 */
#define EXYNOS_SLEEP_MAGIC	0x00000bad
#define EXYNOS_AFTR_MAGIC	0xfcba0d10

void exynos_set_boot_flag(unsigned int cpu, unsigned int mode);
void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode);

extern u32 exynos_get_eint_wake_mask(void);

#ifdef CONFIG_PM_SLEEP
extern void __init exynos_pm_init(void);
#else
static inline void exynos_pm_init(void) {}
#endif

extern void exynos_cpu_resume(void);
extern void exynos_cpu_resume_ns(void);

extern const struct smp_operations exynos_smp_ops;

extern void exynos_cpu_power_down(int cpu);
extern void exynos_cpu_power_up(int cpu);
extern int  exynos_cpu_power_state(int cpu);
extern void exynos_cluster_power_down(int cluster);
extern void exynos_cluster_power_up(int cluster);
extern int  exynos_cluster_power_state(int cluster);
extern void exynos_cpu_save_register(void);
extern void exynos_cpu_restore_register(void);
extern void exynos_pm_central_suspend(void);
extern int exynos_pm_central_resume(void);
extern void exynos_enter_aftr(void);

extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;

extern void exynos_set_delayed_reset_assertion(bool enable);

extern unsigned int samsung_rev(void);
extern void exynos_core_restart(u32 core_id);
extern int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr);
extern int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr);

static inline void pmu_raw_writel(u32 val, u32 offset)
{
	writel_relaxed(val, pmu_base_addr + offset);
}

static inline u32 pmu_raw_readl(u32 offset)
{
	return readl_relaxed(pmu_base_addr + offset);
}

#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
Commit	Line	Data
cc511b8d KK	1	/*
	2	* Copyright (c) 2011 Samsung Electronics Co., Ltd.
	3	* http://www.samsung.com
	4	*
	5	* Common Header for EXYNOS machines
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11
	12	#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H
	13	#define __ARCH_ARM_MACH_EXYNOS_COMMON_H
	14
712eddf7	15	#include <linux/platform_data/cpuidle-exynos.h>
6e6aac75	16
940bc58d CC	17	#define EXYNOS3250_SOC_ID 0xE3472000
	18	#define EXYNOS3_SOC_MASK 0xFFFFF000
	19
7cb2ded1 SK	20	#define EXYNOS4210_CPU_ID 0x43210000
	21	#define EXYNOS4212_CPU_ID 0x43220000
	22	#define EXYNOS4412_CPU_ID 0xE4412200
	23	#define EXYNOS4_CPU_MASK 0xFFFE0000
	24
	25	#define EXYNOS5250_SOC_ID 0x43520000
723c9c7e	26	#define EXYNOS5410_SOC_ID 0xE5410000
7cb2ded1 SK	27	#define EXYNOS5420_SOC_ID 0xE5420000
7cb2ded1 SK	28	#define EXYNOS5440_SOC_ID 0xE5440000
86c6f148	29	#define EXYNOS5800_SOC_ID 0xE5422000
7cb2ded1 SK	30	#define EXYNOS5_SOC_MASK 0xFFFFF000
	31
	32	extern unsigned long samsung_cpu_id;
	33
	34	#define IS_SAMSUNG_CPU(name, id, mask) \
	35	static inline int is_samsung_##name(void) \
	36	{ \
	37	return ((samsung_cpu_id & mask) == (id & mask)); \
	38	}
	39
940bc58d	40	IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK)
7cb2ded1 SK	41	IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
	42	IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
	43	IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
	44	IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
723c9c7e	45	IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK)
7cb2ded1 SK	46	IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
7cb2ded1 SK	47	IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
86c6f148	48	IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)
7cb2ded1	49
940bc58d CC	50	#if defined(CONFIG_SOC_EXYNOS3250)
	51	# define soc_is_exynos3250() is_samsung_exynos3250()
	52	#else
	53	# define soc_is_exynos3250() 0
	54	#endif
	55
7cb2ded1 SK	56	#if defined(CONFIG_CPU_EXYNOS4210)
	57	# define soc_is_exynos4210() is_samsung_exynos4210()
	58	#else
	59	# define soc_is_exynos4210() 0
	60	#endif
	61
	62	#if defined(CONFIG_SOC_EXYNOS4212)
	63	# define soc_is_exynos4212() is_samsung_exynos4212()
	64	#else
	65	# define soc_is_exynos4212() 0
	66	#endif
	67
	68	#if defined(CONFIG_SOC_EXYNOS4412)
	69	# define soc_is_exynos4412() is_samsung_exynos4412()
	70	#else
	71	# define soc_is_exynos4412() 0
	72	#endif
	73
	74	#define EXYNOS4210_REV_0 (0x0)
	75	#define EXYNOS4210_REV_1_0 (0x10)
	76	#define EXYNOS4210_REV_1_1 (0x11)
	77
	78	#if defined(CONFIG_SOC_EXYNOS5250)
	79	# define soc_is_exynos5250() is_samsung_exynos5250()
	80	#else
	81	# define soc_is_exynos5250() 0
	82	#endif
	83
723c9c7e TD	84	#if defined(CONFIG_SOC_EXYNOS5410)
	85	# define soc_is_exynos5410() is_samsung_exynos5410()
	86	#else
	87	# define soc_is_exynos5410() 0
	88	#endif
	89
7cb2ded1 SK	90	#if defined(CONFIG_SOC_EXYNOS5420)
	91	# define soc_is_exynos5420() is_samsung_exynos5420()
	92	#else
	93	# define soc_is_exynos5420() 0
	94	#endif
	95
	96	#if defined(CONFIG_SOC_EXYNOS5440)
	97	# define soc_is_exynos5440() is_samsung_exynos5440()
	98	#else
	99	# define soc_is_exynos5440() 0
	100	#endif
	101
86c6f148 AK	102	#if defined(CONFIG_SOC_EXYNOS5800)
	103	# define soc_is_exynos5800() is_samsung_exynos5800()
	104	#else
	105	# define soc_is_exynos5800() 0
	106	#endif
	107
7cb2ded1 SK	108	#define soc_is_exynos4() (soc_is_exynos4210() \|\| soc_is_exynos4212() \|\| \
7cb2ded1 SK	109	soc_is_exynos4412())
723c9c7e TD	110	#define soc_is_exynos5() (soc_is_exynos5250() \|\| soc_is_exynos5410() \|\| \
723c9c7e TD	111	soc_is_exynos5420() \|\| soc_is_exynos5800())
7cb2ded1	112
2b9d9c32 TF	113	extern u32 cp15_save_diag;
	114	extern u32 cp15_save_power;
	115
b3205dea	116	extern void __iomem *sysram_ns_base_addr;
cd245f59	117	extern void __iomem *sysram_base_addr;
fce9e5bb	118	extern void __iomem *pmu_base_addr;
1754c42e	119	void exynos_sysram_init(void);
bb13fabc	120
0b7778a8 BZ	121	enum {
	122	FW_DO_IDLE_SLEEP,
	123	FW_DO_IDLE_AFTR,
	124	};
	125
bca28f8f TF	126	void exynos_firmware_init(void);
bca28f8f TF	127
dc1b9448 BZ	128	/* CPU BOOT mode flag for Exynos3250 SoC bootloader */
dc1b9448 BZ	129	#define C2_STATE (1 << 3)
054e6aa1 KK	130	/*
	131	* Magic values for bootloader indicating chosen low power mode.
	132	* See also Documentation/arm/Samsung/Bootloader-interface.txt
	133	*/
	134	#define EXYNOS_SLEEP_MAGIC 0x00000bad
	135	#define EXYNOS_AFTR_MAGIC 0xfcba0d10
dc1b9448 BZ	136
	137	void exynos_set_boot_flag(unsigned int cpu, unsigned int mode);
	138	void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode);
	139
d710aa31	140	extern u32 exynos_get_eint_wake_mask(void);
d710aa31	141
559ba237 TF	142	#ifdef CONFIG_PM_SLEEP
	143	extern void __init exynos_pm_init(void);
	144	#else
	145	static inline void exynos_pm_init(void) {}
	146	#endif
	147
d710aa31	148	extern void exynos_cpu_resume(void);
2b9d9c32	149	extern void exynos_cpu_resume_ns(void);
d710aa31	150
75305275	151	extern const struct smp_operations exynos_smp_ops;
06853ae4	152
d3af6976 LKA	153	extern void exynos_cpu_power_down(int cpu);
	154	extern void exynos_cpu_power_up(int cpu);
	155	extern int exynos_cpu_power_state(int cpu);
096d21c6 AK	156	extern void exynos_cluster_power_down(int cluster);
	157	extern void exynos_cluster_power_up(int cluster);
	158	extern int exynos_cluster_power_state(int cluster);
0d713cf1 BZ	159	extern void exynos_cpu_save_register(void);
	160	extern void exynos_cpu_restore_register(void);
	161	extern void exynos_pm_central_suspend(void);
	162	extern int exynos_pm_central_resume(void);
3681bafe	163	extern void exynos_enter_aftr(void);
ccd458c1	164
712eddf7 BZ	165	extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;
712eddf7 BZ	166
6f024978 KK	167	extern void exynos_set_delayed_reset_assertion(bool enable);
6f024978 KK	168
7cb2ded1	169	extern unsigned int samsung_rev(void);
af997114 BZ	170	extern void exynos_core_restart(u32 core_id);
	171	extern int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr);
	172	extern int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr);
7cb2ded1	173
2e94ac42 PD	174	static inline void pmu_raw_writel(u32 val, u32 offset)
2e94ac42 PD	175	{
d0ceee0b	176	writel_relaxed(val, pmu_base_addr + offset);
2e94ac42 PD	177	}
	178
	179	static inline u32 pmu_raw_readl(u32 offset)
	180	{
d0ceee0b	181	return readl_relaxed(pmu_base_addr + offset);
2e94ac42 PD	182	}
2e94ac42 PD	183
cc511b8d	184	#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */