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ARM: EXYNOS: Use generic pwm driver in Origen board
[deliverable/linux.git] / arch / arm / mach-exynos / mach-origen.c
CommitLineData
699efdd2
JK		 1/* linux/arch/arm/mach-exynos4/mach-origen.c
2 *
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
29e7d587 12#include <linux/leds.h>
699efdd2
JK		 13#include <linux/gpio.h>
14#include <linux/mmc/host.h>
15#include <linux/platform_device.h>
16#include <linux/io.h>
17#include <linux/input.h>
4d8cc596 18#include <linux/pwm.h>
9edff0f7 19#include <linux/pwm_backlight.h>
c86cfdd0 20#include <linux/gpio_keys.h>
6e01280f
IS		 21#include <linux/i2c.h>
22#include <linux/regulator/machine.h>
23#include <linux/mfd/max8997.h>
9421a76d 24#include <linux/lcd.h>
62d30f86 25#include <linux/rfkill-gpio.h>
9c278d52 26#include <linux/platform_data/s3c-hsotg.h>
699efdd2
JK		 27
28#include <asm/mach/arch.h>
4e44d2cb 29#include <asm/hardware/gic.h>
699efdd2
JK		 30#include <asm/mach-types.h>
31
9421a76d
TB		 32#include <video/platform_lcd.h>
33
699efdd2 34#include <plat/regs-serial.h>
9421a76d 35#include <plat/regs-fb-v4.h>
699efdd2
JK		 36#include <plat/cpu.h>
37#include <plat/devs.h>
38#include <plat/sdhci.h>
39#include <plat/iic.h>
24f9e1f3
SK		 40#include <plat/ehci.h>
41#include <plat/clock.h>
9edff0f7
GM		 42#include <plat/gpio-cfg.h>
43#include <plat/backlight.h>
9421a76d 44#include <plat/fb.h>
df74a28c 45#include <plat/mfc.h>
699efdd2 46
95de77d4 47#include <mach/ohci.h>
699efdd2
JK		 48#include <mach/map.h>
49
84e6aef0 50#include <drm/exynos_drm.h>
cc511b8d
KK		 51#include "common.h"
52
699efdd2
JK		 53/* Following are default values for UCON, ULCON and UFCON UART registers */
54#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
55 S3C2410_UCON_RXILEVEL | \
56 S3C2410_UCON_TXIRQMODE | \
57 S3C2410_UCON_RXIRQMODE | \
58 S3C2410_UCON_RXFIFO_TOI | \
59 S3C2443_UCON_RXERR_IRQEN)
60
61#define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
62
63#define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
64 S5PV210_UFCON_TXTRIG4 | \
65 S5PV210_UFCON_RXTRIG4)
66
67static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
68 [0] = {
69 .hwport = 0,
70 .flags = 0,
71 .ucon = ORIGEN_UCON_DEFAULT,
72 .ulcon = ORIGEN_ULCON_DEFAULT,
73 .ufcon = ORIGEN_UFCON_DEFAULT,
74 },
75 [1] = {
76 .hwport = 1,
77 .flags = 0,
78 .ucon = ORIGEN_UCON_DEFAULT,
79 .ulcon = ORIGEN_ULCON_DEFAULT,
80 .ufcon = ORIGEN_UFCON_DEFAULT,
81 },
82 [2] = {
83 .hwport = 2,
84 .flags = 0,
85 .ucon = ORIGEN_UCON_DEFAULT,
86 .ulcon = ORIGEN_ULCON_DEFAULT,
87 .ufcon = ORIGEN_UFCON_DEFAULT,
88 },
89 [3] = {
90 .hwport = 3,
91 .flags = 0,
92 .ucon = ORIGEN_UCON_DEFAULT,
93 .ulcon = ORIGEN_ULCON_DEFAULT,
94 .ufcon = ORIGEN_UFCON_DEFAULT,
95 },
96};
97
6e01280f
IS		 98static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
99 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
5dfb1aa5
SK		 100 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
101 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
6e01280f
IS		 102};
103static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
104 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
105};
106static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
107 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
108};
109static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
110 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
5dfb1aa5 111 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
6e01280f
IS		 112};
113static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
114 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
115};
116static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
117 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
118};
119static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
120 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
121};
122static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
123 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
124};
125static struct regulator_consumer_supply __initdata buck1_consumer[] = {
126 REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
127};
128static struct regulator_consumer_supply __initdata buck2_consumer[] = {
129 REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
130};
131static struct regulator_consumer_supply __initdata buck3_consumer[] = {
132 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
133};
134static struct regulator_consumer_supply __initdata buck7_consumer[] = {
135 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
136};
137
138static struct regulator_init_data __initdata max8997_ldo1_data = {
139 .constraints = {
140 .name = "VDD_ABB_3.3V",
141 .min_uV = 3300000,
142 .max_uV = 3300000,
143 .apply_uV = 1,
144 .state_mem = {
145 .disabled = 1,
146 },
147 },
148};
149
150static struct regulator_init_data __initdata max8997_ldo2_data = {
151 .constraints = {
152 .name = "VDD_ALIVE_1.1V",
153 .min_uV = 1100000,
154 .max_uV = 1100000,
155 .apply_uV = 1,
156 .always_on = 1,
157 .state_mem = {
158 .enabled = 1,
159 },
160 },
161};
162
163static struct regulator_init_data __initdata max8997_ldo3_data = {
164 .constraints = {
165 .name = "VMIPI_1.1V",
166 .min_uV = 1100000,
167 .max_uV = 1100000,
168 .apply_uV = 1,
169 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
170 .state_mem = {
171 .disabled = 1,
172 },
173 },
174 .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
175 .consumer_supplies = ldo3_consumer,
176};
177
178static struct regulator_init_data __initdata max8997_ldo4_data = {
179 .constraints = {
180 .name = "VDD_RTC_1.8V",
181 .min_uV = 1800000,
182 .max_uV = 1800000,
183 .apply_uV = 1,
184 .always_on = 1,
185 .state_mem = {
186 .disabled = 1,
187 },
188 },
189};
190
191static struct regulator_init_data __initdata max8997_ldo6_data = {
192 .constraints = {
193 .name = "VMIPI_1.8V",
194 .min_uV = 1800000,
195 .max_uV = 1800000,
196 .apply_uV = 1,
197 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
198 .state_mem = {
199 .disabled = 1,
200 },
201 },
202 .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
203 .consumer_supplies = ldo6_consumer,
204};
205
206static struct regulator_init_data __initdata max8997_ldo7_data = {
207 .constraints = {
208 .name = "VDD_AUD_1.8V",
209 .min_uV = 1800000,
210 .max_uV = 1800000,
211 .apply_uV = 1,
212 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
213 .state_mem = {
214 .disabled = 1,
215 },
216 },
217 .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
218 .consumer_supplies = ldo7_consumer,
219};
220
221static struct regulator_init_data __initdata max8997_ldo8_data = {
222 .constraints = {
223 .name = "VADC_3.3V",
224 .min_uV = 3300000,
225 .max_uV = 3300000,
226 .apply_uV = 1,
227 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
228 .state_mem = {
229 .disabled = 1,
230 },
231 },
232 .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
233 .consumer_supplies = ldo8_consumer,
234};
235
236static struct regulator_init_data __initdata max8997_ldo9_data = {
237 .constraints = {
238 .name = "DVDD_SWB_2.8V",
239 .min_uV = 2800000,
240 .max_uV = 2800000,
241 .apply_uV = 1,
62d30f86 242 .always_on = 1,
6e01280f
IS		 243 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
244 .state_mem = {
245 .disabled = 1,
246 },
247 },
248 .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
249 .consumer_supplies = ldo9_consumer,
250};
251
252static struct regulator_init_data __initdata max8997_ldo10_data = {
253 .constraints = {
254 .name = "VDD_PLL_1.1V",
255 .min_uV = 1100000,
256 .max_uV = 1100000,
257 .apply_uV = 1,
258 .always_on = 1,
259 .state_mem = {
260 .disabled = 1,
261 },
262 },
263};
264
265static struct regulator_init_data __initdata max8997_ldo11_data = {
266 .constraints = {
267 .name = "VDD_AUD_3V",
268 .min_uV = 3000000,
269 .max_uV = 3000000,
270 .apply_uV = 1,
271 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
272 .state_mem = {
273 .disabled = 1,
274 },
275 },
276 .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
277 .consumer_supplies = ldo11_consumer,
278};
279
280static struct regulator_init_data __initdata max8997_ldo14_data = {
281 .constraints = {
282 .name = "AVDD18_SWB_1.8V",
283 .min_uV = 1800000,
284 .max_uV = 1800000,
285 .apply_uV = 1,
62d30f86 286 .always_on = 1,
6e01280f
IS		 287 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
288 .state_mem = {
289 .disabled = 1,
290 },
291 },
292 .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
293 .consumer_supplies = ldo14_consumer,
294};
295
296static struct regulator_init_data __initdata max8997_ldo17_data = {
297 .constraints = {
298 .name = "VDD_SWB_3.3V",
299 .min_uV = 3300000,
300 .max_uV = 3300000,
301 .apply_uV = 1,
62d30f86 302 .always_on = 1,
6e01280f
IS		 303 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
304 .state_mem = {
305 .disabled = 1,
306 },
307 },
308 .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
309 .consumer_supplies = ldo17_consumer,
310};
311
312static struct regulator_init_data __initdata max8997_ldo21_data = {
313 .constraints = {
314 .name = "VDD_MIF_1.2V",
315 .min_uV = 1200000,
316 .max_uV = 1200000,
317 .apply_uV = 1,
318 .always_on = 1,
319 .state_mem = {
320 .disabled = 1,
321 },
322 },
323};
324
325static struct regulator_init_data __initdata max8997_buck1_data = {
326 .constraints = {
327 .name = "VDD_ARM_1.2V",
328 .min_uV = 950000,
329 .max_uV = 1350000,
330 .always_on = 1,
331 .boot_on = 1,
332 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
333 .state_mem = {
334 .disabled = 1,
335 },
336 },
337 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
338 .consumer_supplies = buck1_consumer,
339};
340
341static struct regulator_init_data __initdata max8997_buck2_data = {
342 .constraints = {
343 .name = "VDD_INT_1.1V",
344 .min_uV = 900000,
345 .max_uV = 1100000,
346 .always_on = 1,
347 .boot_on = 1,
348 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
349 .state_mem = {
350 .disabled = 1,
351 },
352 },
353 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
354 .consumer_supplies = buck2_consumer,
355};
356
357static struct regulator_init_data __initdata max8997_buck3_data = {
358 .constraints = {
359 .name = "VDD_G3D_1.1V",
360 .min_uV = 900000,
361 .max_uV = 1100000,
362 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
363 REGULATOR_CHANGE_STATUS,
364 .state_mem = {
365 .disabled = 1,
366 },
367 },
368 .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
369 .consumer_supplies = buck3_consumer,
370};
371
372static struct regulator_init_data __initdata max8997_buck5_data = {
373 .constraints = {
374 .name = "VDDQ_M1M2_1.2V",
375 .min_uV = 1200000,
376 .max_uV = 1200000,
377 .apply_uV = 1,
378 .always_on = 1,
379 .state_mem = {
380 .disabled = 1,
381 },
382 },
383};
384
385static struct regulator_init_data __initdata max8997_buck7_data = {
386 .constraints = {
387 .name = "VDD_LCD_3.3V",
388 .min_uV = 3300000,
389 .max_uV = 3300000,
390 .boot_on = 1,
391 .apply_uV = 1,
392 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
393 .state_mem = {
394 .disabled = 1
395 },
396 },
397 .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
398 .consumer_supplies = buck7_consumer,
399};
400
401static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
402 { MAX8997_LDO1, &max8997_ldo1_data },
403 { MAX8997_LDO2, &max8997_ldo2_data },
404 { MAX8997_LDO3, &max8997_ldo3_data },
405 { MAX8997_LDO4, &max8997_ldo4_data },
406 { MAX8997_LDO6, &max8997_ldo6_data },
407 { MAX8997_LDO7, &max8997_ldo7_data },
408 { MAX8997_LDO8, &max8997_ldo8_data },
409 { MAX8997_LDO9, &max8997_ldo9_data },
410 { MAX8997_LDO10, &max8997_ldo10_data },
411 { MAX8997_LDO11, &max8997_ldo11_data },
412 { MAX8997_LDO14, &max8997_ldo14_data },
413 { MAX8997_LDO17, &max8997_ldo17_data },
414 { MAX8997_LDO21, &max8997_ldo21_data },
415 { MAX8997_BUCK1, &max8997_buck1_data },
416 { MAX8997_BUCK2, &max8997_buck2_data },
417 { MAX8997_BUCK3, &max8997_buck3_data },
418 { MAX8997_BUCK5, &max8997_buck5_data },
419 { MAX8997_BUCK7, &max8997_buck7_data },
420};
421
e745e06f 422static struct max8997_platform_data __initdata origen_max8997_pdata = {
6e01280f
IS		 423 .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
424 .regulators = origen_max8997_regulators,
425
426 .wakeup = true,
427 .buck1_gpiodvs = false,
428 .buck2_gpiodvs = false,
429 .buck5_gpiodvs = false,
6e01280f
IS		 430
431 .ignore_gpiodvs_side_effect = true,
432 .buck125_default_idx = 0x0,
433
434 .buck125_gpios[0] = EXYNOS4_GPX0(0),
435 .buck125_gpios[1] = EXYNOS4_GPX0(1),
436 .buck125_gpios[2] = EXYNOS4_GPX0(2),
437
438 .buck1_voltage[0] = 1350000,
439 .buck1_voltage[1] = 1300000,
440 .buck1_voltage[2] = 1250000,
441 .buck1_voltage[3] = 1200000,
442 .buck1_voltage[4] = 1150000,
443 .buck1_voltage[5] = 1100000,
444 .buck1_voltage[6] = 1000000,
445 .buck1_voltage[7] = 950000,
446
447 .buck2_voltage[0] = 1100000,
448 .buck2_voltage[1] = 1100000,
449 .buck2_voltage[2] = 1100000,
450 .buck2_voltage[3] = 1100000,
451 .buck2_voltage[4] = 1000000,
452 .buck2_voltage[5] = 1000000,
453 .buck2_voltage[6] = 1000000,
454 .buck2_voltage[7] = 1000000,
455
456 .buck5_voltage[0] = 1200000,
457 .buck5_voltage[1] = 1200000,
458 .buck5_voltage[2] = 1200000,
459 .buck5_voltage[3] = 1200000,
460 .buck5_voltage[4] = 1200000,
461 .buck5_voltage[5] = 1200000,
462 .buck5_voltage[6] = 1200000,
463 .buck5_voltage[7] = 1200000,
464};
465
466/* I2C0 */
467static struct i2c_board_info i2c0_devs[] __initdata = {
468 {
469 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
470 .platform_data = &origen_max8997_pdata,
471 .irq = IRQ_EINT(4),
472 },
473};
474
cf1dad9d
TB		 475static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
476 .cd_type = S3C_SDHCI_CD_INTERNAL,
cf1dad9d
TB		 477};
478
699efdd2 479static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
92e41efd 480 .cd_type = S3C_SDHCI_CD_INTERNAL,
699efdd2
JK		 481};
482
24f9e1f3
SK		 483/* USB EHCI */
484static struct s5p_ehci_platdata origen_ehci_pdata;
485
486static void __init origen_ehci_init(void)
487{
488 struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
489
490 s5p_ehci_set_platdata(pdata);
491}
492
95de77d4
TB		 493/* USB OHCI */
494static struct exynos4_ohci_platdata origen_ohci_pdata;
495
496static void __init origen_ohci_init(void)
497{
498 struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
499
500 exynos4_ohci_set_platdata(pdata);
501}
502
9c278d52
SK		 503/* USB OTG */
504static struct s3c_hsotg_plat origen_hsotg_pdata;
505
29e7d587
RSA		 506static struct gpio_led origen_gpio_leds[] = {
507 {
508 .name = "origen::status1",
509 .default_trigger = "heartbeat",
510 .gpio = EXYNOS4_GPX1(3),
511 .active_low = 1,
512 },
513 {
514 .name = "origen::status2",
515 .default_trigger = "mmc0",
516 .gpio = EXYNOS4_GPX1(4),
517 .active_low = 1,
518 },
519};
520
521static struct gpio_led_platform_data origen_gpio_led_info = {
522 .leds = origen_gpio_leds,
523 .num_leds = ARRAY_SIZE(origen_gpio_leds),
524};
525
526static struct platform_device origen_leds_gpio = {
527 .name = "leds-gpio",
528 .id = -1,
529 .dev = {
530 .platform_data = &origen_gpio_led_info,
531 },
532};
533
c86cfdd0
SK		 534static struct gpio_keys_button origen_gpio_keys_table[] = {
535 {
536 .code = KEY_MENU,
537 .gpio = EXYNOS4_GPX1(5),
538 .desc = "gpio-keys: KEY_MENU",
539 .type = EV_KEY,
540 .active_low = 1,
541 .wakeup = 1,
542 .debounce_interval = 1,
543 }, {
544 .code = KEY_HOME,
545 .gpio = EXYNOS4_GPX1(6),
546 .desc = "gpio-keys: KEY_HOME",
547 .type = EV_KEY,
548 .active_low = 1,
549 .wakeup = 1,
550 .debounce_interval = 1,
551 }, {
552 .code = KEY_BACK,
553 .gpio = EXYNOS4_GPX1(7),
554 .desc = "gpio-keys: KEY_BACK",
555 .type = EV_KEY,
556 .active_low = 1,
557 .wakeup = 1,
558 .debounce_interval = 1,
559 }, {
560 .code = KEY_UP,
561 .gpio = EXYNOS4_GPX2(0),
562 .desc = "gpio-keys: KEY_UP",
563 .type = EV_KEY,
564 .active_low = 1,
565 .wakeup = 1,
566 .debounce_interval = 1,
567 }, {
568 .code = KEY_DOWN,
569 .gpio = EXYNOS4_GPX2(1),
570 .desc = "gpio-keys: KEY_DOWN",
571 .type = EV_KEY,
572 .active_low = 1,
573 .wakeup = 1,
574 .debounce_interval = 1,
575 },
576};
577
578static struct gpio_keys_platform_data origen_gpio_keys_data = {
579 .buttons = origen_gpio_keys_table,
580 .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
581};
582
583static struct platform_device origen_device_gpiokeys = {
584 .name = "gpio-keys",
585 .dev = {
586 .platform_data = &origen_gpio_keys_data,
587 },
588};
589
9421a76d
TB		 590static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power)
591{
592 int ret;
593
594 if (power)
595 ret = gpio_request_one(EXYNOS4_GPE3(4),
596 GPIOF_OUT_INIT_HIGH, "GPE3_4");
597 else
598 ret = gpio_request_one(EXYNOS4_GPE3(4),
599 GPIOF_OUT_INIT_LOW, "GPE3_4");
600
601 gpio_free(EXYNOS4_GPE3(4));
602
603 if (ret)
604 pr_err("failed to request gpio for LCD power: %d\n", ret);
605}
606
607static struct plat_lcd_data origen_lcd_hv070wsa_data = {
608 .set_power = lcd_hv070wsa_set_power,
609};
610
611static struct platform_device origen_lcd_hv070wsa = {
612 .name = "platform-lcd",
613 .dev.parent = &s5p_device_fimd0.dev,
614 .dev.platform_data = &origen_lcd_hv070wsa_data,
615};
616
4d8cc596
TB		 617static struct pwm_lookup origen_pwm_lookup[] = {
618 PWM_LOOKUP("s3c24xx-pwm.0", 0, "pwm-backlight.0", NULL),
619};
620
84e6aef0
SK		 621#ifdef CONFIG_DRM_EXYNOS
622static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
623 .panel = {
624 .timing = {
625 .left_margin = 64,
626 .right_margin = 16,
627 .upper_margin = 64,
628 .lower_margin = 16,
629 .hsync_len = 48,
630 .vsync_len = 3,
631 .xres = 1024,
632 .yres = 600,
633 },
634 },
635 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
636 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
637 VIDCON1_INV_VCLK,
638 .default_win = 0,
639 .bpp = 32,
640};
641#else
9421a76d 642static struct s3c_fb_pd_win origen_fb_win0 = {
79d3c41a
TA		 643 .xres = 1024,
644 .yres = 600,
9421a76d
TB		 645 .max_bpp = 32,
646 .default_bpp = 24,
384b1049
TB		 647 .virtual_x = 1024,
648 .virtual_y = 2 * 600,
9421a76d
TB		 649};
650
79d3c41a
TA		 651static struct fb_videomode origen_lcd_timing = {
652 .left_margin = 64,
653 .right_margin = 16,
654 .upper_margin = 64,
655 .lower_margin = 16,
656 .hsync_len = 48,
657 .vsync_len = 3,
658 .xres = 1024,
659 .yres = 600,
660};
661
9421a76d
TB		 662static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
663 .win[0] = &origen_fb_win0,
79d3c41a 664 .vtiming = &origen_lcd_timing,
9421a76d 665 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
815ed6fc
TB		 666 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
667 VIDCON1_INV_VCLK,
9421a76d
TB		 668 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
669};
84e6aef0 670#endif
9421a76d 671
62d30f86 672/* Bluetooth rfkill gpio platform data */
023c9ff6 673static struct rfkill_gpio_platform_data origen_bt_pdata = {
62d30f86
SL		 674 .reset_gpio = EXYNOS4_GPX2(2),
675 .shutdown_gpio = -1,
676 .type = RFKILL_TYPE_BLUETOOTH,
677 .name = "origen-bt",
678};
679
680/* Bluetooth Platform device */
681static struct platform_device origen_device_bluetooth = {
682 .name = "rfkill_gpio",
683 .id = -1,
684 .dev = {
685 .platform_data = &origen_bt_pdata,
686 },
687};
688
699efdd2
JK		 689static struct platform_device *origen_devices[] __initdata = {
690 &s3c_device_hsmmc2,
cf1dad9d 691 &s3c_device_hsmmc0,
9421a76d 692 &s3c_device_i2c0,
699efdd2 693 &s3c_device_rtc,
9c278d52 694 &s3c_device_usb_hsotg,
699efdd2 695 &s3c_device_wdt,
24f9e1f3 696 &s5p_device_ehci,
6f8eb324
SK		 697 &s5p_device_fimc0,
698 &s5p_device_fimc1,
699 &s5p_device_fimc2,
700 &s5p_device_fimc3,
26e14514 701 &s5p_device_fimc_md,
9421a76d 702 &s5p_device_fimd0,
84207d83 703 &s5p_device_g2d,
6ca3f8bd
SK		 704 &s5p_device_hdmi,
705 &s5p_device_i2c_hdmiphy,
965a330d 706 &s5p_device_jpeg,
df74a28c
SK		 707 &s5p_device_mfc,
708 &s5p_device_mfc_l,
709 &s5p_device_mfc_r,
6ca3f8bd 710 &s5p_device_mixer,
84e6aef0
SK		 711#ifdef CONFIG_DRM_EXYNOS
712 &exynos_device_drm,
713#endif
95de77d4 714 &exynos4_device_ohci,
c86cfdd0 715 &origen_device_gpiokeys,
9421a76d 716 &origen_lcd_hv070wsa,
29e7d587 717 &origen_leds_gpio,
62d30f86 718 &origen_device_bluetooth,
699efdd2
JK		 719};
720
9edff0f7
GM		 721/* LCD Backlight data */
722static struct samsung_bl_gpio_info origen_bl_gpio_info = {
6e01280f
IS		 723 .no = EXYNOS4_GPD0(0),
724 .func = S3C_GPIO_SFN(2),
9edff0f7
GM		 725};
726
727static struct platform_pwm_backlight_data origen_bl_data = {
6e01280f
IS		 728 .pwm_id = 0,
729 .pwm_period_ns = 1000,
9edff0f7
GM		 730};
731
62d30f86
SL		 732static void __init origen_bt_setup(void)
733{
734 gpio_request(EXYNOS4_GPA0(0), "GPIO BT_UART");
735 /* 4 UART Pins configuration */
736 s3c_gpio_cfgrange_nopull(EXYNOS4_GPA0(0), 4, S3C_GPIO_SFN(2));
737 /* Setup BT Reset, this gpio will be requesed by rfkill-gpio */
738 s3c_gpio_cfgpin(EXYNOS4_GPX2(2), S3C_GPIO_OUTPUT);
739 s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
740}
741
3c766699
SK		 742static void s5p_tv_setup(void)
743{
744 /* Direct HPD to HDMI chip */
745 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
746 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
747 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
748}
749
699efdd2
JK		 750static void __init origen_map_io(void)
751{
cc511b8d 752 exynos_init_io(NULL, 0);
2e27437a 753 s3c24xx_init_clocks(clk_xusbxti.rate);
699efdd2
JK		 754 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
755}
756
6e01280f
IS		 757static void __init origen_power_init(void)
758{
759 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
760 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
761 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
762}
763
df74a28c
SK		 764static void __init origen_reserve(void)
765{
766 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
767}
768
699efdd2
JK		 769static void __init origen_machine_init(void)
770{
6e01280f
IS		 771 origen_power_init();
772
773 s3c_i2c0_set_platdata(NULL);
774 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
775
cf1dad9d
TB		 776 /*
777 * Since sdhci instance 2 can contain a bootable media,
778 * sdhci instance 0 is registered after instance 2.
779 */
699efdd2 780 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
cf1dad9d 781 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
24f9e1f3
SK		 782
783 origen_ehci_init();
95de77d4 784 origen_ohci_init();
9c278d52 785 s3c_hsotg_set_platdata(&origen_hsotg_pdata);
24f9e1f3 786
3c766699 787 s5p_tv_setup();
6ca3f8bd
SK		 788 s5p_i2c_hdmiphy_set_platdata(NULL);
789
84e6aef0
SK		 790#ifdef CONFIG_DRM_EXYNOS
791 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
792 exynos4_fimd0_gpio_setup_24bpp();
793#else
9421a76d 794 s5p_fimd0_set_platdata(&origen_lcd_pdata);
84e6aef0 795#endif
9421a76d 796
699efdd2 797 platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
df74a28c 798
4d8cc596 799 pwm_add_table(origen_pwm_lookup, ARRAY_SIZE(origen_pwm_lookup));
9edff0f7 800 samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
62d30f86
SL		 801
802 origen_bt_setup();
699efdd2
JK		 803}
804
805MACHINE_START(ORIGEN, "ORIGEN")
806 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
1abd328e 807 .atag_offset = 0x100,
699efdd2
JK		 808 .init_irq = exynos4_init_irq,
809 .map_io = origen_map_io,
4e44d2cb 810 .handle_irq = gic_handle_irq,
699efdd2 811 .init_machine = origen_machine_init,
bb13fabc 812 .init_late = exynos_init_late,
699efdd2 813 .timer = &exynos4_timer,
df74a28c 814 .reserve = &origen_reserve,
9eb48595 815 .restart = exynos4_restart,
699efdd2 816MACHINE_END
Linux kernel - Deliverables
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