projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 699efdd2 JK |
1 | /* linux/arch/arm/mach-exynos4/mach-origen.c |
| 2 | * | |
| 3 | * Copyright (c) 2011 Insignal Co., Ltd. | |
| 4 | * http://www.insignal.co.kr/ | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify | |
| 7 | * it under the terms of the GNU General Public License version 2 as | |
| 8 | * published by the Free Software Foundation. | |
| 9 | */ | |
| 10 | ||
| 11 | #include <linux/serial_core.h> | |
| 12 | #include <linux/gpio.h> | |
| 13 | #include <linux/mmc/host.h> | |
| 14 | #include <linux/platform_device.h> | |
| 15 | #include <linux/io.h> | |
| 16 | #include <linux/input.h> | |
| 9edff0f7 | 17 | #include <linux/pwm_backlight.h> |
| 699efdd2 JK |
18 | |
| 19 | #include <asm/mach/arch.h> | |
| 20 | #include <asm/mach-types.h> | |
| 21 | ||
| 22 | #include <plat/regs-serial.h> | |
| 23 | #include <plat/exynos4.h> | |
| 24 | #include <plat/cpu.h> | |
| 25 | #include <plat/devs.h> | |
| 26 | #include <plat/sdhci.h> | |
| 27 | #include <plat/iic.h> | |
| 24f9e1f3 SK |
28 | #include <plat/ehci.h> |
| 29 | #include <plat/clock.h> | |
| 9edff0f7 GM |
30 | #include <plat/gpio-cfg.h> |
| 31 | #include <plat/backlight.h> | |
| 699efdd2 JK |
32 | |
| 33 | #include <mach/map.h> | |
| 34 | ||
| 35 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | |
| 36 | #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | |
| 37 | S3C2410_UCON_RXILEVEL | \ | |
| 38 | S3C2410_UCON_TXIRQMODE | \ | |
| 39 | S3C2410_UCON_RXIRQMODE | \ | |
| 40 | S3C2410_UCON_RXFIFO_TOI | \ | |
| 41 | S3C2443_UCON_RXERR_IRQEN) | |
| 42 | ||
| 43 | #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8 | |
| 44 | ||
| 45 | #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | |
| 46 | S5PV210_UFCON_TXTRIG4 | \ | |
| 47 | S5PV210_UFCON_RXTRIG4) | |
| 48 | ||
| 49 | static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = { | |
| 50 | [0] = { | |
| 51 | .hwport = 0, | |
| 52 | .flags = 0, | |
| 53 | .ucon = ORIGEN_UCON_DEFAULT, | |
| 54 | .ulcon = ORIGEN_ULCON_DEFAULT, | |
| 55 | .ufcon = ORIGEN_UFCON_DEFAULT, | |
| 56 | }, | |
| 57 | [1] = { | |
| 58 | .hwport = 1, | |
| 59 | .flags = 0, | |
| 60 | .ucon = ORIGEN_UCON_DEFAULT, | |
| 61 | .ulcon = ORIGEN_ULCON_DEFAULT, | |
| 62 | .ufcon = ORIGEN_UFCON_DEFAULT, | |
| 63 | }, | |
| 64 | [2] = { | |
| 65 | .hwport = 2, | |
| 66 | .flags = 0, | |
| 67 | .ucon = ORIGEN_UCON_DEFAULT, | |
| 68 | .ulcon = ORIGEN_ULCON_DEFAULT, | |
| 69 | .ufcon = ORIGEN_UFCON_DEFAULT, | |
| 70 | }, | |
| 71 | [3] = { | |
| 72 | .hwport = 3, | |
| 73 | .flags = 0, | |
| 74 | .ucon = ORIGEN_UCON_DEFAULT, | |
| 75 | .ulcon = ORIGEN_ULCON_DEFAULT, | |
| 76 | .ufcon = ORIGEN_UFCON_DEFAULT, | |
| 77 | }, | |
| 78 | }; | |
| 79 | ||
| 80 | static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = { | |
| 81 | .cd_type = S3C_SDHCI_CD_GPIO, | |
| 82 | .ext_cd_gpio = EXYNOS4_GPK2(2), | |
| 83 | .ext_cd_gpio_invert = 1, | |
| 84 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | |
| 85 | }; | |
| 86 | ||
| 24f9e1f3 SK |
87 | /* USB EHCI */ |
| 88 | static struct s5p_ehci_platdata origen_ehci_pdata; | |
| 89 | ||
| 90 | static void __init origen_ehci_init(void) | |
| 91 | { | |
| 92 | struct s5p_ehci_platdata *pdata = &origen_ehci_pdata; | |
| 93 | ||
| 94 | s5p_ehci_set_platdata(pdata); | |
| 95 | } | |
| 96 | ||
| 699efdd2 JK |
97 | static struct platform_device *origen_devices[] __initdata = { |
| 98 | &s3c_device_hsmmc2, | |
| 99 | &s3c_device_rtc, | |
| 100 | &s3c_device_wdt, | |
| 24f9e1f3 | 101 | &s5p_device_ehci, |
| 6f8eb324 SK |
102 | &s5p_device_fimc0, |
| 103 | &s5p_device_fimc1, | |
| 104 | &s5p_device_fimc2, | |
| 105 | &s5p_device_fimc3, | |
| 699efdd2 JK |
106 | }; |
| 107 | ||
| 9edff0f7 GM |
108 | /* LCD Backlight data */ |
| 109 | static struct samsung_bl_gpio_info origen_bl_gpio_info = { | |
| 110 | .no = EXYNOS4_GPD0(0), | |
| 111 | .func = S3C_GPIO_SFN(2), | |
| 112 | }; | |
| 113 | ||
| 114 | static struct platform_pwm_backlight_data origen_bl_data = { | |
| 115 | .pwm_id = 0, | |
| 116 | .pwm_period_ns = 1000, | |
| 117 | }; | |
| 118 | ||
| 699efdd2 JK |
119 | static void __init origen_map_io(void) |
| 120 | { | |
| 121 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | |
| 122 | s3c24xx_init_clocks(24000000); | |
| 123 | s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs)); | |
| 124 | } | |
| 125 | ||
| 126 | static void __init origen_machine_init(void) | |
| 127 | { | |
| 128 | s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata); | |
| 24f9e1f3 SK |
129 | |
| 130 | origen_ehci_init(); | |
| 131 | clk_xusbxti.rate = 24000000; | |
| 132 | ||
| 699efdd2 | 133 | platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices)); |
| 9edff0f7 GM |
134 | |
| 135 | samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data); | |
| 699efdd2 JK |
136 | } |
| 137 | ||
| 138 | MACHINE_START(ORIGEN, "ORIGEN") | |
| 139 | /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */ | |
| 140 | .boot_params = S5P_PA_SDRAM + 0x100, | |
| 141 | .init_irq = exynos4_init_irq, | |
| 142 | .map_io = origen_map_io, | |
| 143 | .init_machine = origen_machine_init, | |
| 144 | .timer = &exynos4_timer, | |
| 145 | MACHINE_END |