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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-footbridge/common.c | |
3 | * | |
4 | * Copyright (C) 1998-2000 Russell King, Dave Gilbert. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
1da177e4 LT |
10 | #include <linux/module.h> |
11 | #include <linux/types.h> | |
12 | #include <linux/mm.h> | |
13 | #include <linux/ioport.h> | |
14 | #include <linux/list.h> | |
15 | #include <linux/init.h> | |
16 | ||
17 | #include <asm/pgtable.h> | |
18 | #include <asm/page.h> | |
19 | #include <asm/irq.h> | |
20 | #include <asm/io.h> | |
21 | #include <asm/mach-types.h> | |
22 | #include <asm/setup.h> | |
23 | #include <asm/hardware/dec21285.h> | |
24 | ||
25 | #include <asm/mach/irq.h> | |
26 | #include <asm/mach/map.h> | |
27 | ||
28 | #include "common.h" | |
29 | ||
30 | extern void __init isa_init_irq(unsigned int irq); | |
31 | ||
32 | unsigned int mem_fclk_21285 = 50000000; | |
33 | ||
34 | EXPORT_SYMBOL(mem_fclk_21285); | |
35 | ||
36 | static int __init parse_tag_memclk(const struct tag *tag) | |
37 | { | |
38 | mem_fclk_21285 = tag->u.memclk.fmemclk; | |
39 | return 0; | |
40 | } | |
41 | ||
42 | __tagtable(ATAG_MEMCLK, parse_tag_memclk); | |
43 | ||
44 | /* | |
45 | * Footbridge IRQ translation table | |
46 | * Converts from our IRQ numbers into FootBridge masks | |
47 | */ | |
48 | static const int fb_irq_mask[] = { | |
49 | IRQ_MASK_UART_RX, /* 0 */ | |
50 | IRQ_MASK_UART_TX, /* 1 */ | |
51 | IRQ_MASK_TIMER1, /* 2 */ | |
52 | IRQ_MASK_TIMER2, /* 3 */ | |
53 | IRQ_MASK_TIMER3, /* 4 */ | |
54 | IRQ_MASK_IN0, /* 5 */ | |
55 | IRQ_MASK_IN1, /* 6 */ | |
56 | IRQ_MASK_IN2, /* 7 */ | |
57 | IRQ_MASK_IN3, /* 8 */ | |
58 | IRQ_MASK_DOORBELLHOST, /* 9 */ | |
59 | IRQ_MASK_DMA1, /* 10 */ | |
60 | IRQ_MASK_DMA2, /* 11 */ | |
61 | IRQ_MASK_PCI, /* 12 */ | |
62 | IRQ_MASK_SDRAMPARITY, /* 13 */ | |
63 | IRQ_MASK_I2OINPOST, /* 14 */ | |
64 | IRQ_MASK_PCI_ABORT, /* 15 */ | |
65 | IRQ_MASK_PCI_SERR, /* 16 */ | |
66 | IRQ_MASK_DISCARD_TIMER, /* 17 */ | |
67 | IRQ_MASK_PCI_DPERR, /* 18 */ | |
68 | IRQ_MASK_PCI_PERR, /* 19 */ | |
69 | }; | |
70 | ||
71 | static void fb_mask_irq(unsigned int irq) | |
72 | { | |
73 | *CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(irq)]; | |
74 | } | |
75 | ||
76 | static void fb_unmask_irq(unsigned int irq) | |
77 | { | |
78 | *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)]; | |
79 | } | |
80 | ||
10dd5ce2 | 81 | static struct irq_chip fb_chip = { |
1da177e4 LT |
82 | .ack = fb_mask_irq, |
83 | .mask = fb_mask_irq, | |
84 | .unmask = fb_unmask_irq, | |
85 | }; | |
86 | ||
87 | static void __init __fb_init_irq(void) | |
88 | { | |
89 | unsigned int irq; | |
90 | ||
91 | /* | |
92 | * setup DC21285 IRQs | |
93 | */ | |
94 | *CSR_IRQ_DISABLE = -1; | |
95 | *CSR_FIQ_DISABLE = -1; | |
96 | ||
97 | for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) { | |
98 | set_irq_chip(irq, &fb_chip); | |
10dd5ce2 | 99 | set_irq_handler(irq, handle_level_irq); |
1da177e4 LT |
100 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
101 | } | |
102 | } | |
103 | ||
104 | void __init footbridge_init_irq(void) | |
105 | { | |
106 | __fb_init_irq(); | |
107 | ||
108 | if (!footbridge_cfn_mode()) | |
109 | return; | |
110 | ||
111 | if (machine_is_ebsa285()) | |
112 | /* The following is dependent on which slot | |
113 | * you plug the Southbridge card into. We | |
114 | * currently assume that you plug it into | |
115 | * the right-hand most slot. | |
116 | */ | |
117 | isa_init_irq(IRQ_PCI); | |
118 | ||
119 | if (machine_is_cats()) | |
120 | isa_init_irq(IRQ_IN2); | |
121 | ||
122 | if (machine_is_netwinder()) | |
123 | isa_init_irq(IRQ_IN3); | |
124 | } | |
125 | ||
126 | /* | |
127 | * Common mapping for all systems. Note that the outbound write flush is | |
128 | * commented out since there is a "No Fix" problem with it. Not mapping | |
129 | * it means that we have extra bullet protection on our feet. | |
130 | */ | |
131 | static struct map_desc fb_common_io_desc[] __initdata = { | |
a427ceef DS |
132 | { |
133 | .virtual = ARMCSR_BASE, | |
865052fd | 134 | .pfn = __phys_to_pfn(DC21285_ARMCSR_BASE), |
a427ceef | 135 | .length = ARMCSR_SIZE, |
6460177f | 136 | .type = MT_DEVICE, |
a427ceef DS |
137 | }, { |
138 | .virtual = XBUS_BASE, | |
139 | .pfn = __phys_to_pfn(0x40000000), | |
140 | .length = XBUS_SIZE, | |
6460177f | 141 | .type = MT_DEVICE, |
a427ceef | 142 | } |
1da177e4 LT |
143 | }; |
144 | ||
145 | /* | |
146 | * The mapping when the footbridge is in host mode. We don't map any of | |
147 | * this when we are in add-in mode. | |
148 | */ | |
149 | static struct map_desc ebsa285_host_io_desc[] __initdata = { | |
150 | #if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST) | |
a427ceef DS |
151 | { |
152 | .virtual = PCIMEM_BASE, | |
153 | .pfn = __phys_to_pfn(DC21285_PCI_MEM), | |
154 | .length = PCIMEM_SIZE, | |
6460177f | 155 | .type = MT_DEVICE, |
a427ceef DS |
156 | }, { |
157 | .virtual = PCICFG0_BASE, | |
158 | .pfn = __phys_to_pfn(DC21285_PCI_TYPE_0_CONFIG), | |
159 | .length = PCICFG0_SIZE, | |
6460177f | 160 | .type = MT_DEVICE, |
a427ceef DS |
161 | }, { |
162 | .virtual = PCICFG1_BASE, | |
163 | .pfn = __phys_to_pfn(DC21285_PCI_TYPE_1_CONFIG), | |
164 | .length = PCICFG1_SIZE, | |
6460177f | 165 | .type = MT_DEVICE, |
a427ceef DS |
166 | }, { |
167 | .virtual = PCIIACK_BASE, | |
168 | .pfn = __phys_to_pfn(DC21285_PCI_IACK), | |
169 | .length = PCIIACK_SIZE, | |
6460177f | 170 | .type = MT_DEVICE, |
a427ceef DS |
171 | }, { |
172 | .virtual = PCIO_BASE, | |
173 | .pfn = __phys_to_pfn(DC21285_PCI_IO), | |
174 | .length = PCIO_SIZE, | |
6460177f RK |
175 | .type = MT_DEVICE, |
176 | }, | |
1da177e4 LT |
177 | #endif |
178 | }; | |
179 | ||
1da177e4 LT |
180 | void __init footbridge_map_io(void) |
181 | { | |
182 | /* | |
183 | * Set up the common mapping first; we need this to | |
184 | * determine whether we're in host mode or not. | |
185 | */ | |
186 | iotable_init(fb_common_io_desc, ARRAY_SIZE(fb_common_io_desc)); | |
187 | ||
188 | /* | |
189 | * Now, work out what we've got to map in addition on this | |
190 | * platform. | |
191 | */ | |
1da177e4 LT |
192 | if (footbridge_cfn_mode()) |
193 | iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc)); | |
194 | } | |
195 | ||
196 | #ifdef CONFIG_FOOTBRIDGE_ADDIN | |
197 | ||
198 | /* | |
199 | * These two functions convert virtual addresses to PCI addresses and PCI | |
200 | * addresses to virtual addresses. Note that it is only legal to use these | |
201 | * on memory obtained via get_zeroed_page or kmalloc. | |
202 | */ | |
203 | unsigned long __virt_to_bus(unsigned long res) | |
204 | { | |
205 | WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory); | |
206 | ||
207 | return (res - PAGE_OFFSET) + (*CSR_PCISDRAMBASE & 0xfffffff0); | |
208 | } | |
209 | EXPORT_SYMBOL(__virt_to_bus); | |
210 | ||
211 | unsigned long __bus_to_virt(unsigned long res) | |
212 | { | |
213 | res -= (*CSR_PCISDRAMBASE & 0xfffffff0); | |
214 | res += PAGE_OFFSET; | |
215 | ||
216 | WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory); | |
217 | ||
218 | return res; | |
219 | } | |
220 | EXPORT_SYMBOL(__bus_to_virt); | |
221 | ||
222 | #endif |