Merge branch 'timers/urgent' of ssh://master.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / arch / arm / mach-footbridge / dc21285-timer.c
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1da177e4
LT
1/*
2 * linux/arch/arm/mach-footbridge/dc21285-timer.c
3 *
4 * Copyright (C) 1998 Russell King.
5 * Copyright (C) 1998 Phil Blundell
6 */
7#include <linux/init.h>
8#include <linux/interrupt.h>
55e86989 9#include <linux/irq.h>
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10
11#include <asm/irq.h>
12
13#include <asm/hardware/dec21285.h>
14#include <asm/mach/time.h>
15
16#include "common.h"
17
18/*
19 * Footbridge timer 1 support.
20 */
21static unsigned long timer1_latch;
22
23static unsigned long timer1_gettimeoffset (void)
24{
25 unsigned long value = timer1_latch - *CSR_TIMER1_VALUE;
26
27 return ((tick_nsec / 1000) * value) / timer1_latch;
28}
29
30static irqreturn_t
0cd61b68 31timer1_interrupt(int irq, void *dev_id)
1da177e4 32{
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33 *CSR_TIMER1_CLR = 0;
34
0cd61b68 35 timer_tick();
1da177e4 36
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37 return IRQ_HANDLED;
38}
39
40static struct irqaction footbridge_timer_irq = {
41 .name = "Timer1 timer tick",
42 .handler = timer1_interrupt,
b30fabad 43 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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44};
45
46/*
47 * Set up timer interrupt.
48 */
49static void __init footbridge_timer_init(void)
50{
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51 timer1_latch = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
52
53 *CSR_TIMER1_CLR = 0;
54 *CSR_TIMER1_LOAD = timer1_latch;
55 *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16;
56
57 setup_irq(IRQ_TIMER1, &footbridge_timer_irq);
336eb02b
RK
58
59 isa_rtc_init();
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60}
61
62struct sys_timer footbridge_timer = {
63 .init = footbridge_timer_init,
64 .offset = timer1_gettimeoffset,
65};
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