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1da177e4 LT |
1 | /* |
2 | * linux/arch/arm/mach-footbridge/irq.c | |
3 | * | |
4 | * Copyright (C) 1996-2000 Russell King | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * Changelog: | |
11 | * 22-Aug-1998 RMK Restructured IRQ routines | |
12 | * 03-Sep-1998 PJB Merged CATS support | |
13 | * 20-Jan-1998 RMK Started merge of EBSA286, CATS and NetWinder | |
14 | * 26-Jan-1999 PJB Don't use IACK on CATS | |
15 | * 16-Mar-1999 RMK Added autodetect of ISA PICs | |
16 | */ | |
17 | #include <linux/ioport.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/list.h> | |
20 | #include <linux/init.h> | |
fced80c7 | 21 | #include <linux/io.h> |
70d13e08 | 22 | #include <linux/spinlock.h> |
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23 | |
24 | #include <asm/mach/irq.h> | |
25 | ||
a09e64fb | 26 | #include <mach/hardware.h> |
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27 | #include <asm/hardware/dec21285.h> |
28 | #include <asm/irq.h> | |
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29 | #include <asm/mach-types.h> |
30 | ||
31 | static void isa_mask_pic_lo_irq(unsigned int irq) | |
32 | { | |
33 | unsigned int mask = 1 << (irq & 7); | |
34 | ||
35 | outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); | |
36 | } | |
37 | ||
38 | static void isa_ack_pic_lo_irq(unsigned int irq) | |
39 | { | |
40 | unsigned int mask = 1 << (irq & 7); | |
41 | ||
42 | outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); | |
43 | outb(0x20, PIC_LO); | |
44 | } | |
45 | ||
46 | static void isa_unmask_pic_lo_irq(unsigned int irq) | |
47 | { | |
48 | unsigned int mask = 1 << (irq & 7); | |
49 | ||
50 | outb(inb(PIC_MASK_LO) & ~mask, PIC_MASK_LO); | |
51 | } | |
52 | ||
10dd5ce2 | 53 | static struct irq_chip isa_lo_chip = { |
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54 | .ack = isa_ack_pic_lo_irq, |
55 | .mask = isa_mask_pic_lo_irq, | |
56 | .unmask = isa_unmask_pic_lo_irq, | |
57 | }; | |
58 | ||
59 | static void isa_mask_pic_hi_irq(unsigned int irq) | |
60 | { | |
61 | unsigned int mask = 1 << (irq & 7); | |
62 | ||
63 | outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); | |
64 | } | |
65 | ||
66 | static void isa_ack_pic_hi_irq(unsigned int irq) | |
67 | { | |
68 | unsigned int mask = 1 << (irq & 7); | |
69 | ||
70 | outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); | |
71 | outb(0x62, PIC_LO); | |
72 | outb(0x20, PIC_HI); | |
73 | } | |
74 | ||
75 | static void isa_unmask_pic_hi_irq(unsigned int irq) | |
76 | { | |
77 | unsigned int mask = 1 << (irq & 7); | |
78 | ||
79 | outb(inb(PIC_MASK_HI) & ~mask, PIC_MASK_HI); | |
80 | } | |
81 | ||
10dd5ce2 | 82 | static struct irq_chip isa_hi_chip = { |
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83 | .ack = isa_ack_pic_hi_irq, |
84 | .mask = isa_mask_pic_hi_irq, | |
85 | .unmask = isa_unmask_pic_hi_irq, | |
86 | }; | |
87 | ||
88 | static void | |
10dd5ce2 | 89 | isa_irq_handler(unsigned int irq, struct irq_desc *desc) |
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90 | { |
91 | unsigned int isa_irq = *(unsigned char *)PCIIACK_BASE; | |
92 | ||
93 | if (isa_irq < _ISA_IRQ(0) || isa_irq >= _ISA_IRQ(16)) { | |
0cd61b68 | 94 | do_bad_IRQ(isa_irq, desc); |
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95 | return; |
96 | } | |
97 | ||
d8aa0251 | 98 | generic_handle_irq(isa_irq); |
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99 | } |
100 | ||
020732ad RK |
101 | static struct irqaction irq_cascade = { |
102 | .handler = no_action, | |
103 | .name = "cascade", | |
104 | }; | |
105 | ||
106 | static struct resource pic1_resource = { | |
107 | .name = "pic1", | |
108 | .start = 0x20, | |
109 | .end = 0x3f, | |
110 | }; | |
111 | ||
112 | static struct resource pic2_resource = { | |
113 | .name = "pic2", | |
114 | .start = 0xa0, | |
115 | .end = 0xbf, | |
116 | }; | |
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117 | |
118 | void __init isa_init_irq(unsigned int host_irq) | |
119 | { | |
120 | unsigned int irq; | |
121 | ||
122 | /* | |
123 | * Setup, and then probe for an ISA PIC | |
124 | * If the PIC is not there, then we | |
125 | * ignore the PIC. | |
126 | */ | |
127 | outb(0x11, PIC_LO); | |
128 | outb(_ISA_IRQ(0), PIC_MASK_LO); /* IRQ number */ | |
129 | outb(0x04, PIC_MASK_LO); /* Slave on Ch2 */ | |
130 | outb(0x01, PIC_MASK_LO); /* x86 */ | |
131 | outb(0xf5, PIC_MASK_LO); /* pattern: 11110101 */ | |
132 | ||
133 | outb(0x11, PIC_HI); | |
134 | outb(_ISA_IRQ(8), PIC_MASK_HI); /* IRQ number */ | |
135 | outb(0x02, PIC_MASK_HI); /* Slave on Ch1 */ | |
136 | outb(0x01, PIC_MASK_HI); /* x86 */ | |
137 | outb(0xfa, PIC_MASK_HI); /* pattern: 11111010 */ | |
138 | ||
139 | outb(0x0b, PIC_LO); | |
140 | outb(0x0b, PIC_HI); | |
141 | ||
142 | if (inb(PIC_MASK_LO) == 0xf5 && inb(PIC_MASK_HI) == 0xfa) { | |
143 | outb(0xff, PIC_MASK_LO);/* mask all IRQs */ | |
144 | outb(0xff, PIC_MASK_HI);/* mask all IRQs */ | |
145 | } else { | |
146 | printk(KERN_INFO "IRQ: ISA PIC not found\n"); | |
147 | host_irq = (unsigned int)-1; | |
148 | } | |
149 | ||
150 | if (host_irq != (unsigned int)-1) { | |
151 | for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) { | |
152 | set_irq_chip(irq, &isa_lo_chip); | |
10dd5ce2 | 153 | set_irq_handler(irq, handle_level_irq); |
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154 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
155 | } | |
156 | ||
157 | for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) { | |
158 | set_irq_chip(irq, &isa_hi_chip); | |
10dd5ce2 | 159 | set_irq_handler(irq, handle_level_irq); |
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160 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); |
161 | } | |
162 | ||
163 | request_resource(&ioport_resource, &pic1_resource); | |
164 | request_resource(&ioport_resource, &pic2_resource); | |
165 | setup_irq(IRQ_ISA_CASCADE, &irq_cascade); | |
166 | ||
167 | set_irq_chained_handler(host_irq, isa_irq_handler); | |
168 | ||
169 | /* | |
170 | * On the NetWinder, don't automatically | |
171 | * enable ISA IRQ11 when it is requested. | |
172 | * There appears to be a missing pull-up | |
173 | * resistor on this line. | |
174 | */ | |
175 | if (machine_is_netwinder()) | |
176 | set_irq_flags(_ISA_IRQ(11), IRQF_VALID | | |
177 | IRQF_PROBE | IRQF_NOAUTOEN); | |
178 | } | |
179 | } | |
180 | ||
181 |