Commit | Line | Data |
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59d3a193 PZ |
1 | /* |
2 | * Interrupt routines for Gemini | |
3 | * | |
4 | * Copyright (C) 2001-2006 Storlink, Corp. | |
5 | * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | */ | |
12 | #include <linux/init.h> | |
13 | #include <linux/io.h> | |
14 | #include <linux/ioport.h> | |
15 | #include <linux/stddef.h> | |
16 | #include <linux/list.h> | |
17 | #include <linux/sched.h> | |
18 | #include <asm/irq.h> | |
19 | #include <asm/mach/irq.h> | |
20 | #include <mach/hardware.h> | |
21 | ||
22 | #define IRQ_SOURCE(base_addr) (base_addr + 0x00) | |
23 | #define IRQ_MASK(base_addr) (base_addr + 0x04) | |
24 | #define IRQ_CLEAR(base_addr) (base_addr + 0x08) | |
25 | #define IRQ_TMODE(base_addr) (base_addr + 0x0C) | |
26 | #define IRQ_TLEVEL(base_addr) (base_addr + 0x10) | |
27 | #define IRQ_STATUS(base_addr) (base_addr + 0x14) | |
28 | #define FIQ_SOURCE(base_addr) (base_addr + 0x20) | |
29 | #define FIQ_MASK(base_addr) (base_addr + 0x24) | |
30 | #define FIQ_CLEAR(base_addr) (base_addr + 0x28) | |
31 | #define FIQ_TMODE(base_addr) (base_addr + 0x2C) | |
32 | #define FIQ_LEVEL(base_addr) (base_addr + 0x30) | |
33 | #define FIQ_STATUS(base_addr) (base_addr + 0x34) | |
34 | ||
413802b6 | 35 | static void gemini_ack_irq(struct irq_data *d) |
59d3a193 | 36 | { |
413802b6 | 37 | __raw_writel(1 << d->irq, IRQ_CLEAR(IO_ADDRESS(GEMINI_INTERRUPT_BASE))); |
59d3a193 PZ |
38 | } |
39 | ||
413802b6 | 40 | static void gemini_mask_irq(struct irq_data *d) |
59d3a193 PZ |
41 | { |
42 | unsigned int mask; | |
43 | ||
44 | mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE))); | |
413802b6 | 45 | mask &= ~(1 << d->irq); |
59d3a193 PZ |
46 | __raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE))); |
47 | } | |
48 | ||
413802b6 | 49 | static void gemini_unmask_irq(struct irq_data *d) |
59d3a193 PZ |
50 | { |
51 | unsigned int mask; | |
52 | ||
53 | mask = __raw_readl(IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE))); | |
413802b6 | 54 | mask |= (1 << d->irq); |
59d3a193 PZ |
55 | __raw_writel(mask, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE))); |
56 | } | |
57 | ||
58 | static struct irq_chip gemini_irq_chip = { | |
413802b6 LB |
59 | .name = "INTC", |
60 | .irq_ack = gemini_ack_irq, | |
61 | .irq_mask = gemini_mask_irq, | |
62 | .irq_unmask = gemini_unmask_irq, | |
59d3a193 PZ |
63 | }; |
64 | ||
65 | static struct resource irq_resource = { | |
66 | .name = "irq_handler", | |
67 | .start = IO_ADDRESS(GEMINI_INTERRUPT_BASE), | |
68 | .end = IO_ADDRESS(FIQ_STATUS(GEMINI_INTERRUPT_BASE)) + 4, | |
69 | }; | |
70 | ||
71 | void __init gemini_init_irq(void) | |
72 | { | |
73 | unsigned int i, mode = 0, level = 0; | |
74 | ||
75 | /* | |
8925b0f8 NP |
76 | * Disable the idle handler by default since it is buggy |
77 | * For more info see arch/arm/mach-gemini/idle.c | |
59d3a193 PZ |
78 | */ |
79 | disable_hlt(); | |
80 | ||
81 | request_resource(&iomem_resource, &irq_resource); | |
82 | ||
83 | for (i = 0; i < NR_IRQS; i++) { | |
6845664a | 84 | irq_set_chip(i, &gemini_irq_chip); |
59d3a193 | 85 | if((i >= IRQ_TIMER1 && i <= IRQ_TIMER3) || (i >= IRQ_SERIRQ0 && i <= IRQ_SERIRQ1)) { |
6845664a | 86 | irq_set_handler(i, handle_edge_irq); |
59d3a193 PZ |
87 | mode |= 1 << i; |
88 | level |= 1 << i; | |
89 | } else { | |
6845664a | 90 | irq_set_handler(i, handle_level_irq); |
59d3a193 PZ |
91 | } |
92 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); | |
93 | } | |
94 | ||
95 | /* Disable all interrupts */ | |
96 | __raw_writel(0, IRQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE))); | |
97 | __raw_writel(0, FIQ_MASK(IO_ADDRESS(GEMINI_INTERRUPT_BASE))); | |
98 | ||
99 | /* Set interrupt mode */ | |
100 | __raw_writel(mode, IRQ_TMODE(IO_ADDRESS(GEMINI_INTERRUPT_BASE))); | |
101 | __raw_writel(level, IRQ_TLEVEL(IO_ADDRESS(GEMINI_INTERRUPT_BASE))); | |
102 | } |