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220e6cf7 RH |
1 | /* |
2 | * Copyright 2010-2011 Calxeda, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License along with | |
14 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | */ | |
16 | #include <linux/clk.h> | |
17 | #include <linux/clkdev.h> | |
0583fe47 | 18 | #include <linux/clocksource.h> |
1dc737c4 | 19 | #include <linux/dma-mapping.h> |
220e6cf7 | 20 | #include <linux/io.h> |
0529e315 | 21 | #include <linux/irqchip.h> |
220e6cf7 RH |
22 | #include <linux/of.h> |
23 | #include <linux/of_irq.h> | |
24 | #include <linux/of_platform.h> | |
25 | #include <linux/of_address.h> | |
1dc737c4 | 26 | #include <linux/amba/bus.h> |
60a66e37 | 27 | #include <linux/platform_device.h> |
220e6cf7 | 28 | |
dd68eb02 | 29 | #include <asm/psci.h> |
220e6cf7 RH |
30 | #include <asm/hardware/cache-l2x0.h> |
31 | #include <asm/mach/arch.h> | |
52530343 | 32 | #include <asm/mach/map.h> |
220e6cf7 RH |
33 | |
34 | #include "core.h" | |
35 | #include "sysregs.h" | |
36 | ||
37 | void __iomem *sregs_base; | |
7a2848d3 | 38 | void __iomem *scu_base_addr; |
220e6cf7 RH |
39 | |
40 | static void __init highbank_scu_map_io(void) | |
41 | { | |
42 | unsigned long base; | |
43 | ||
44 | /* Get SCU base */ | |
45 | asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); | |
46 | ||
7a2848d3 | 47 | scu_base_addr = ioremap(base, SZ_4K); |
220e6cf7 RH |
48 | } |
49 | ||
220e6cf7 | 50 | |
8e56130d RH |
51 | static void highbank_l2x0_disable(void) |
52 | { | |
53 | /* Disable PL310 L2 Cache controller */ | |
54 | highbank_smc1(0x102, 0x0); | |
55 | } | |
8e56130d | 56 | |
220e6cf7 RH |
57 | static void __init highbank_init_irq(void) |
58 | { | |
0529e315 | 59 | irqchip_init(); |
8e56130d | 60 | |
7a2848d3 RH |
61 | if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) |
62 | highbank_scu_map_io(); | |
63 | ||
8e56130d | 64 | /* Enable PL310 L2 Cache controller */ |
a56a5cf1 RH |
65 | if (IS_ENABLED(CONFIG_CACHE_L2X0) && |
66 | of_find_compatible_node(NULL, NULL, "arm,pl310-cache")) { | |
67 | highbank_smc1(0x102, 0x1); | |
68 | l2x0_of_init(0, ~0UL); | |
69 | outer_cache.disable = highbank_l2x0_disable; | |
70 | } | |
220e6cf7 RH |
71 | } |
72 | ||
220e6cf7 RH |
73 | static void highbank_power_off(void) |
74 | { | |
c05ee88f | 75 | highbank_set_pwr_shutdown(); |
220e6cf7 RH |
76 | |
77 | while (1) | |
78 | cpu_do_idle(); | |
79 | } | |
80 | ||
1dc737c4 RH |
81 | static int highbank_platform_notifier(struct notifier_block *nb, |
82 | unsigned long event, void *__dev) | |
83 | { | |
84 | struct resource *res; | |
85 | int reg = -1; | |
e64bf95e | 86 | u32 val; |
1dc737c4 RH |
87 | struct device *dev = __dev; |
88 | ||
89 | if (event != BUS_NOTIFY_ADD_DEVICE) | |
90 | return NOTIFY_DONE; | |
91 | ||
92 | if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci")) | |
93 | reg = 0xc; | |
94 | else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci")) | |
95 | reg = 0x18; | |
96 | else if (of_device_is_compatible(dev->of_node, "arm,pl330")) | |
97 | reg = 0x20; | |
98 | else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) { | |
99 | res = platform_get_resource(to_platform_device(dev), | |
100 | IORESOURCE_MEM, 0); | |
101 | if (res) { | |
102 | if (res->start == 0xfff50000) | |
103 | reg = 0; | |
104 | else if (res->start == 0xfff51000) | |
105 | reg = 4; | |
106 | } | |
107 | } | |
108 | ||
109 | if (reg < 0) | |
110 | return NOTIFY_DONE; | |
111 | ||
112 | if (of_property_read_bool(dev->of_node, "dma-coherent")) { | |
e64bf95e RH |
113 | val = readl(sregs_base + reg); |
114 | writel(val | 0xff01, sregs_base + reg); | |
1dc737c4 | 115 | set_dma_ops(dev, &arm_coherent_dma_ops); |
e64bf95e | 116 | } |
1dc737c4 RH |
117 | |
118 | return NOTIFY_OK; | |
119 | } | |
120 | ||
121 | static struct notifier_block highbank_amba_nb = { | |
122 | .notifier_call = highbank_platform_notifier, | |
123 | }; | |
124 | ||
125 | static struct notifier_block highbank_platform_nb = { | |
126 | .notifier_call = highbank_platform_notifier, | |
127 | }; | |
128 | ||
60a66e37 DL |
129 | static struct platform_device highbank_cpuidle_device = { |
130 | .name = "cpuidle-calxeda", | |
131 | }; | |
132 | ||
220e6cf7 RH |
133 | static void __init highbank_init(void) |
134 | { | |
26cae166 SH |
135 | struct device_node *np; |
136 | ||
137 | /* Map system registers */ | |
138 | np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs"); | |
139 | sregs_base = of_iomap(np, 0); | |
140 | WARN_ON(!sregs_base); | |
141 | ||
220e6cf7 | 142 | pm_power_off = highbank_power_off; |
a283580c | 143 | highbank_pm_init(); |
220e6cf7 | 144 | |
1dc737c4 RH |
145 | bus_register_notifier(&platform_bus_type, &highbank_platform_nb); |
146 | bus_register_notifier(&amba_bustype, &highbank_amba_nb); | |
147 | ||
220e6cf7 | 148 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); |
60a66e37 | 149 | |
a410146c | 150 | if (psci_ops.cpu_suspend) |
60a66e37 | 151 | platform_device_register(&highbank_cpuidle_device); |
220e6cf7 RH |
152 | } |
153 | ||
154 | static const char *highbank_match[] __initconst = { | |
155 | "calxeda,highbank", | |
e095c0d1 | 156 | "calxeda,ecx-2000", |
220e6cf7 RH |
157 | NULL, |
158 | }; | |
159 | ||
160 | DT_MACHINE_START(HIGHBANK, "Highbank") | |
a6a39834 RH |
161 | #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) |
162 | .dma_zone_size = (4ULL * SZ_1G), | |
163 | #endif | |
220e6cf7 | 164 | .init_irq = highbank_init_irq, |
220e6cf7 RH |
165 | .init_machine = highbank_init, |
166 | .dt_compat = highbank_match, | |
00e9967e | 167 | .restart = highbank_restart, |
220e6cf7 | 168 | MACHINE_END |