Merge git://git.kernel.org/pub/scm/linux/kernel/git/steve/gfs2-3.0-fixes
[deliverable/linux.git] / arch / arm / mach-highbank / highbank.c
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1/*
2 * Copyright 2010-2011 Calxeda, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#include <linux/clk.h>
17#include <linux/clkdev.h>
0583fe47 18#include <linux/clocksource.h>
1dc737c4 19#include <linux/dma-mapping.h>
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20#include <linux/io.h>
21#include <linux/irq.h>
0529e315 22#include <linux/irqchip.h>
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23#include <linux/irqdomain.h>
24#include <linux/of.h>
25#include <linux/of_irq.h>
26#include <linux/of_platform.h>
27#include <linux/of_address.h>
bf14fc54 28#include <linux/smp.h>
1dc737c4 29#include <linux/amba/bus.h>
d34bcdeb 30#include <linux/clk-provider.h>
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31
32#include <asm/cacheflush.h>
63fc1370 33#include <asm/cputype.h>
eb50439b 34#include <asm/smp_plat.h>
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35#include <asm/hardware/cache-l2x0.h>
36#include <asm/mach/arch.h>
52530343 37#include <asm/mach/map.h>
220e6cf7 38#include <asm/mach/time.h>
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39
40#include "core.h"
41#include "sysregs.h"
42
43void __iomem *sregs_base;
7a2848d3 44void __iomem *scu_base_addr;
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45
46static void __init highbank_scu_map_io(void)
47{
48 unsigned long base;
49
50 /* Get SCU base */
51 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
52
7a2848d3 53 scu_base_addr = ioremap(base, SZ_4K);
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54}
55
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56#define HB_JUMP_TABLE_PHYS(cpu) (0x40 + (0x10 * (cpu)))
57#define HB_JUMP_TABLE_VIRT(cpu) phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
58
59void highbank_set_cpu_jump(int cpu, void *jump_addr)
60{
63fc1370 61 cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(cpu), 0);
adf55f7f 62 writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
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63 __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
64 outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
65 HB_JUMP_TABLE_PHYS(cpu) + 15);
66}
67
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68#ifdef CONFIG_CACHE_L2X0
69static void highbank_l2x0_disable(void)
70{
71 /* Disable PL310 L2 Cache controller */
72 highbank_smc1(0x102, 0x0);
73}
74#endif
75
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76static void __init highbank_init_irq(void)
77{
0529e315 78 irqchip_init();
8e56130d 79
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80 if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
81 highbank_scu_map_io();
82
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83#ifdef CONFIG_CACHE_L2X0
84 /* Enable PL310 L2 Cache controller */
85 highbank_smc1(0x102, 0x1);
220e6cf7 86 l2x0_of_init(0, ~0UL);
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87 outer_cache.disable = highbank_l2x0_disable;
88#endif
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89}
90
91static void __init highbank_timer_init(void)
92{
220e6cf7 93 struct device_node *np;
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94
95 /* Map system registers */
96 np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
97 sregs_base = of_iomap(np, 0);
98 WARN_ON(!sregs_base);
99
d34bcdeb 100 of_clk_init(NULL);
7ac9b9eb 101
da4a686a 102 clocksource_of_init();
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103}
104
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105static void highbank_power_off(void)
106{
c05ee88f 107 highbank_set_pwr_shutdown();
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108
109 while (1)
110 cpu_do_idle();
111}
112
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113static int highbank_platform_notifier(struct notifier_block *nb,
114 unsigned long event, void *__dev)
115{
116 struct resource *res;
117 int reg = -1;
e64bf95e 118 u32 val;
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119 struct device *dev = __dev;
120
121 if (event != BUS_NOTIFY_ADD_DEVICE)
122 return NOTIFY_DONE;
123
124 if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci"))
125 reg = 0xc;
126 else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci"))
127 reg = 0x18;
128 else if (of_device_is_compatible(dev->of_node, "arm,pl330"))
129 reg = 0x20;
130 else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) {
131 res = platform_get_resource(to_platform_device(dev),
132 IORESOURCE_MEM, 0);
133 if (res) {
134 if (res->start == 0xfff50000)
135 reg = 0;
136 else if (res->start == 0xfff51000)
137 reg = 4;
138 }
139 }
140
141 if (reg < 0)
142 return NOTIFY_DONE;
143
144 if (of_property_read_bool(dev->of_node, "dma-coherent")) {
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145 val = readl(sregs_base + reg);
146 writel(val | 0xff01, sregs_base + reg);
1dc737c4 147 set_dma_ops(dev, &arm_coherent_dma_ops);
e64bf95e 148 }
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149
150 return NOTIFY_OK;
151}
152
153static struct notifier_block highbank_amba_nb = {
154 .notifier_call = highbank_platform_notifier,
155};
156
157static struct notifier_block highbank_platform_nb = {
158 .notifier_call = highbank_platform_notifier,
159};
160
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161static void __init highbank_init(void)
162{
163 pm_power_off = highbank_power_off;
a283580c 164 highbank_pm_init();
220e6cf7 165
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166 bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
167 bus_register_notifier(&amba_bustype, &highbank_amba_nb);
168
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169 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
170}
171
172static const char *highbank_match[] __initconst = {
173 "calxeda,highbank",
e095c0d1 174 "calxeda,ecx-2000",
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175 NULL,
176};
177
178DT_MACHINE_START(HIGHBANK, "Highbank")
7ad71b61 179 .smp = smp_ops(highbank_smp_ops),
220e6cf7 180 .init_irq = highbank_init_irq,
6bb27d73 181 .init_time = highbank_timer_init,
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182 .init_machine = highbank_init,
183 .dt_compat = highbank_match,
00e9967e 184 .restart = highbank_restart,
220e6cf7 185MACHINE_END
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