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de41fddd SH |
1 | /* |
2 | * Copyright 2009 Sascha Hauer, <kernel@pengutronix.de> | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License | |
6 | * as published by the Free Software Foundation; either version 2 | |
7 | * of the License, or (at your option) any later version. | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License | |
14 | * along with this program; if not, write to the Free Software | |
15 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, | |
16 | * Boston, MA 02110-1301, USA. | |
17 | */ | |
18 | ||
c10ea4d6 UKK |
19 | /* |
20 | * This machine is known as: | |
21 | * - i.MX25 3-Stack Development System | |
22 | * - i.MX25 Platform Development Kit (i.MX25 PDK) | |
23 | */ | |
24 | ||
635baf6b SH |
25 | #include <linux/types.h> |
26 | #include <linux/init.h> | |
e71fbaf7 | 27 | #include <linux/delay.h> |
635baf6b SH |
28 | #include <linux/clk.h> |
29 | #include <linux/irq.h> | |
30 | #include <linux/gpio.h> | |
635baf6b | 31 | #include <linux/platform_device.h> |
460d30a3 | 32 | #include <linux/usb/otg.h> |
635baf6b | 33 | |
635baf6b SH |
34 | #include <asm/mach-types.h> |
35 | #include <asm/mach/arch.h> | |
36 | #include <asm/mach/time.h> | |
37 | #include <asm/memory.h> | |
38 | #include <asm/mach/map.h> | |
635baf6b | 39 | |
e3372474 | 40 | #include "common.h" |
b0c4845c | 41 | #include "devices-imx25.h" |
50f2de61 | 42 | #include "hardware.h" |
267dd34c | 43 | #include "iomux-mx25.h" |
50f2de61 | 44 | #include "mx25.h" |
b0c4845c | 45 | |
91dcc7f4 FE |
46 | #define MX25PDK_CAN_PWDN IMX_GPIO_NR(4, 6) |
47 | ||
7cc3c846 | 48 | static const struct imxuart_platform_data uart_pdata __initconst = { |
635baf6b SH |
49 | .flags = IMXUART_HAVE_RTSCTS, |
50 | }; | |
51 | ||
8f5260c8 | 52 | static iomux_v3_cfg_t mx25pdk_pads[] = { |
e71fbaf7 BS |
53 | MX25_PAD_FEC_MDC__FEC_MDC, |
54 | MX25_PAD_FEC_MDIO__FEC_MDIO, | |
55 | MX25_PAD_FEC_TDATA0__FEC_TDATA0, | |
56 | MX25_PAD_FEC_TDATA1__FEC_TDATA1, | |
57 | MX25_PAD_FEC_TX_EN__FEC_TX_EN, | |
58 | MX25_PAD_FEC_RDATA0__FEC_RDATA0, | |
59 | MX25_PAD_FEC_RDATA1__FEC_RDATA1, | |
60 | MX25_PAD_FEC_RX_DV__FEC_RX_DV, | |
61 | MX25_PAD_FEC_TX_CLK__FEC_TX_CLK, | |
62 | MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */ | |
63 | MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */ | |
0f547dc1 BS |
64 | |
65 | /* LCD */ | |
66 | MX25_PAD_LD0__LD0, | |
67 | MX25_PAD_LD1__LD1, | |
68 | MX25_PAD_LD2__LD2, | |
69 | MX25_PAD_LD3__LD3, | |
70 | MX25_PAD_LD4__LD4, | |
71 | MX25_PAD_LD5__LD5, | |
72 | MX25_PAD_LD6__LD6, | |
73 | MX25_PAD_LD7__LD7, | |
74 | MX25_PAD_LD8__LD8, | |
75 | MX25_PAD_LD9__LD9, | |
76 | MX25_PAD_LD10__LD10, | |
77 | MX25_PAD_LD11__LD11, | |
78 | MX25_PAD_LD12__LD12, | |
79 | MX25_PAD_LD13__LD13, | |
80 | MX25_PAD_LD14__LD14, | |
81 | MX25_PAD_LD15__LD15, | |
82 | MX25_PAD_GPIO_E__LD16, | |
83 | MX25_PAD_GPIO_F__LD17, | |
84 | MX25_PAD_HSYNC__HSYNC, | |
85 | MX25_PAD_VSYNC__VSYNC, | |
86 | MX25_PAD_LSCLK__LSCLK, | |
87 | MX25_PAD_OE_ACD__OE_ACD, | |
88 | MX25_PAD_CONTRAST__CONTRAST, | |
c45dd814 BS |
89 | |
90 | /* Keypad */ | |
91 | MX25_PAD_KPP_ROW0__KPP_ROW0, | |
92 | MX25_PAD_KPP_ROW1__KPP_ROW1, | |
93 | MX25_PAD_KPP_ROW2__KPP_ROW2, | |
94 | MX25_PAD_KPP_ROW3__KPP_ROW3, | |
95 | MX25_PAD_KPP_COL0__KPP_COL0, | |
96 | MX25_PAD_KPP_COL1__KPP_COL1, | |
97 | MX25_PAD_KPP_COL2__KPP_COL2, | |
98 | MX25_PAD_KPP_COL3__KPP_COL3, | |
71e2889d SG |
99 | |
100 | /* SD1 */ | |
101 | MX25_PAD_SD1_CMD__SD1_CMD, | |
102 | MX25_PAD_SD1_CLK__SD1_CLK, | |
103 | MX25_PAD_SD1_DATA0__SD1_DATA0, | |
104 | MX25_PAD_SD1_DATA1__SD1_DATA1, | |
105 | MX25_PAD_SD1_DATA2__SD1_DATA2, | |
106 | MX25_PAD_SD1_DATA3__SD1_DATA3, | |
9c97f662 SG |
107 | MX25_PAD_A14__GPIO_2_0, /* WriteProtect */ |
108 | MX25_PAD_A15__GPIO_2_1, /* CardDetect */ | |
ff864521 FE |
109 | |
110 | /* I2C1 */ | |
111 | MX25_PAD_I2C1_CLK__I2C1_CLK, | |
112 | MX25_PAD_I2C1_DAT__I2C1_DAT, | |
91dcc7f4 FE |
113 | |
114 | /* CAN1 */ | |
115 | MX25_PAD_GPIO_A__CAN1_TX, | |
116 | MX25_PAD_GPIO_B__CAN1_RX, | |
117 | MX25_PAD_D14__GPIO_4_6, /* CAN_PWDN */ | |
e71fbaf7 BS |
118 | }; |
119 | ||
6bd96f3c | 120 | static const struct fec_platform_data mx25_fec_pdata __initconst = { |
e48ab1c1 | 121 | .phy = PHY_INTERFACE_MODE_RMII, |
e71fbaf7 BS |
122 | }; |
123 | ||
ddb95fdd FE |
124 | #define FEC_ENABLE_GPIO IMX_GPIO_NR(2, 3) |
125 | #define FEC_RESET_B_GPIO IMX_GPIO_NR(4, 8) | |
e71fbaf7 BS |
126 | |
127 | static void __init mx25pdk_fec_reset(void) | |
128 | { | |
129 | gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable"); | |
130 | gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset"); | |
131 | ||
132 | gpio_direction_output(FEC_ENABLE_GPIO, 0); /* drop PHY power */ | |
133 | gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */ | |
134 | udelay(2); | |
135 | ||
136 | /* turn on PHY power and lift reset */ | |
137 | gpio_set_value(FEC_ENABLE_GPIO, 1); | |
138 | gpio_set_value(FEC_RESET_B_GPIO, 1); | |
139 | } | |
140 | ||
b0c4845c UKK |
141 | static const struct mxc_nand_platform_data |
142 | mx25pdk_nand_board_info __initconst = { | |
b97235df BS |
143 | .width = 1, |
144 | .hw_ecc = 1, | |
145 | .flash_bbt = 1, | |
146 | }; | |
147 | ||
0f547dc1 BS |
148 | static struct imx_fb_videomode mx25pdk_modes[] = { |
149 | { | |
150 | .mode = { | |
151 | .name = "CRT-VGA", | |
152 | .refresh = 60, | |
153 | .xres = 640, | |
154 | .yres = 480, | |
155 | .pixclock = 39683, | |
156 | .left_margin = 45, | |
157 | .right_margin = 114, | |
158 | .upper_margin = 33, | |
159 | .lower_margin = 11, | |
160 | .hsync_len = 1, | |
161 | .vsync_len = 1, | |
162 | }, | |
163 | .bpp = 16, | |
164 | .pcr = 0xFA208B80, | |
165 | }, | |
166 | }; | |
167 | ||
194ee8e8 | 168 | static const struct imx_fb_platform_data mx25pdk_fb_pdata __initconst = { |
0f547dc1 BS |
169 | .mode = mx25pdk_modes, |
170 | .num_modes = ARRAY_SIZE(mx25pdk_modes), | |
171 | .pwmr = 0x00A903FF, | |
172 | .lscr1 = 0x00120300, | |
173 | .dmacr = 0x00020010, | |
174 | }; | |
175 | ||
c45dd814 BS |
176 | static const uint32_t mx25pdk_keymap[] = { |
177 | KEY(0, 0, KEY_UP), | |
178 | KEY(0, 1, KEY_DOWN), | |
179 | KEY(0, 2, KEY_VOLUMEDOWN), | |
180 | KEY(0, 3, KEY_HOME), | |
181 | KEY(1, 0, KEY_RIGHT), | |
182 | KEY(1, 1, KEY_LEFT), | |
183 | KEY(1, 2, KEY_ENTER), | |
184 | KEY(1, 3, KEY_VOLUMEUP), | |
185 | KEY(2, 0, KEY_F6), | |
186 | KEY(2, 1, KEY_F8), | |
187 | KEY(2, 2, KEY_F9), | |
188 | KEY(2, 3, KEY_F10), | |
189 | KEY(3, 0, KEY_F1), | |
190 | KEY(3, 1, KEY_F2), | |
191 | KEY(3, 2, KEY_F3), | |
192 | KEY(3, 3, KEY_POWER), | |
193 | }; | |
194 | ||
5f804df3 | 195 | static const struct matrix_keymap_data mx25pdk_keymap_data __initconst = { |
c45dd814 BS |
196 | .keymap = mx25pdk_keymap, |
197 | .keymap_size = ARRAY_SIZE(mx25pdk_keymap), | |
198 | }; | |
199 | ||
4bd597b6 SH |
200 | static int mx25pdk_usbh2_init(struct platform_device *pdev) |
201 | { | |
202 | return mx25_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY); | |
203 | } | |
204 | ||
460d30a3 | 205 | static const struct mxc_usbh_platform_data usbh2_pdata __initconst = { |
4bd597b6 | 206 | .init = mx25pdk_usbh2_init, |
460d30a3 | 207 | .portsc = MXC_EHCI_MODE_SERIAL, |
460d30a3 FE |
208 | }; |
209 | ||
210 | static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { | |
211 | .operating_mode = FSL_USB2_DR_DEVICE, | |
212 | .phy_mode = FSL_USB2_PHY_UTMI, | |
213 | }; | |
214 | ||
ff864521 FE |
215 | static const struct imxi2c_platform_data mx25_3ds_i2c0_data __initconst = { |
216 | .bitrate = 100000, | |
217 | }; | |
218 | ||
9c97f662 SG |
219 | #define SD1_GPIO_WP IMX_GPIO_NR(2, 0) |
220 | #define SD1_GPIO_CD IMX_GPIO_NR(2, 1) | |
221 | ||
222 | static const struct esdhc_platform_data mx25pdk_esdhc_pdata __initconst = { | |
223 | .wp_gpio = SD1_GPIO_WP, | |
224 | .cd_gpio = SD1_GPIO_CD, | |
913413c3 SG |
225 | .wp_type = ESDHC_WP_GPIO, |
226 | .cd_type = ESDHC_CD_GPIO, | |
9c97f662 SG |
227 | }; |
228 | ||
635baf6b SH |
229 | static void __init mx25pdk_init(void) |
230 | { | |
b78d8e59 SG |
231 | imx25_soc_init(); |
232 | ||
e71fbaf7 BS |
233 | mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads, |
234 | ARRAY_SIZE(mx25pdk_pads)); | |
235 | ||
7cc3c846 | 236 | imx25_add_imx_uart0(&uart_pdata); |
460d30a3 FE |
237 | imx25_add_fsl_usb2_udc(&otg_device_pdata); |
238 | imx25_add_mxc_ehci_hs(&usbh2_pdata); | |
b0c4845c | 239 | imx25_add_mxc_nand(&mx25pdk_nand_board_info); |
bec31a85 | 240 | imx25_add_imxdi_rtc(); |
194ee8e8 | 241 | imx25_add_imx_fb(&mx25pdk_fb_pdata); |
bec31a85 | 242 | imx25_add_imx2_wdt(); |
e71fbaf7 BS |
243 | |
244 | mx25pdk_fec_reset(); | |
6bd96f3c | 245 | imx25_add_fec(&mx25_fec_pdata); |
ab9cee4b | 246 | imx25_add_imx_keypad(&mx25pdk_keymap_data); |
71e2889d | 247 | |
9c97f662 | 248 | imx25_add_sdhci_esdhc_imx(0, &mx25pdk_esdhc_pdata); |
ff864521 | 249 | imx25_add_imx_i2c0(&mx25_3ds_i2c0_data); |
91dcc7f4 FE |
250 | |
251 | gpio_request_one(MX25PDK_CAN_PWDN, GPIOF_OUT_INIT_LOW, "can-pwdn"); | |
252 | imx25_add_flexcan0(NULL); | |
635baf6b SH |
253 | } |
254 | ||
635baf6b SH |
255 | static void __init mx25pdk_timer_init(void) |
256 | { | |
fadc0956 | 257 | mx25_clocks_init(); |
635baf6b SH |
258 | } |
259 | ||
260 | static struct sys_timer mx25pdk_timer = { | |
261 | .init = mx25pdk_timer_init, | |
262 | }; | |
263 | ||
264 | MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)") | |
265 | /* Maintainer: Freescale Semiconductor, Inc. */ | |
dc8f1907 | 266 | .atag_offset = 0x100, |
3dac2196 UKK |
267 | .map_io = mx25_map_io, |
268 | .init_early = imx25_init_early, | |
269 | .init_irq = mx25_init_irq, | |
ffa2ea3f | 270 | .handle_irq = imx25_handle_irq, |
3dac2196 UKK |
271 | .timer = &mx25pdk_timer, |
272 | .init_machine = mx25pdk_init, | |
65ea7884 | 273 | .restart = mxc_restart, |
635baf6b | 274 | MACHINE_END |