Commit | Line | Data |
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988d2d49 VL |
1 | /* |
2 | * Copyright (C) 2008 Valentin Longchamp, EPFL Mobots group | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
988d2d49 VL |
13 | */ |
14 | ||
b23f1534 | 15 | #include <linux/delay.h> |
04ea3c80 | 16 | #include <linux/dma-mapping.h> |
5a0e3ad6 | 17 | #include <linux/gfp.h> |
45b131a7 | 18 | #include <linux/gpio.h> |
988d2d49 | 19 | #include <linux/init.h> |
45b131a7 | 20 | #include <linux/interrupt.h> |
9e907416 | 21 | #include <linux/moduleparam.h> |
77aa561d | 22 | #include <linux/leds.h> |
220bbcea | 23 | #include <linux/memory.h> |
988d2d49 VL |
24 | #include <linux/mtd/physmap.h> |
25 | #include <linux/mtd/partitions.h> | |
220bbcea | 26 | #include <linux/platform_device.h> |
65da9791 VL |
27 | #include <linux/regulator/machine.h> |
28 | #include <linux/mfd/mc13783.h> | |
29 | #include <linux/spi/spi.h> | |
220bbcea | 30 | #include <linux/types.h> |
031e9127 | 31 | #include <linux/memblock.h> |
40d97b89 PR |
32 | #include <linux/clk.h> |
33 | #include <linux/io.h> | |
34 | #include <linux/err.h> | |
1f08c112 | 35 | #include <linux/input.h> |
988d2d49 | 36 | |
d67d1075 VL |
37 | #include <linux/usb/otg.h> |
38 | #include <linux/usb/ulpi.h> | |
39 | ||
988d2d49 VL |
40 | #include <asm/mach-types.h> |
41 | #include <asm/mach/arch.h> | |
42 | #include <asm/mach/time.h> | |
43 | #include <asm/mach/map.h> | |
716a3dc2 | 44 | #include <asm/memblock.h> |
82906b13 | 45 | #include <linux/platform_data/asoc-imx-ssi.h> |
988d2d49 | 46 | |
3ed0bcb4 | 47 | #include "board-mx31moboard.h" |
e3372474 | 48 | #include "common.h" |
4a9b8b0b | 49 | #include "devices-imx31.h" |
50f2de61 | 50 | #include "hardware.h" |
267dd34c | 51 | #include "iomux-mx3.h" |
39ef6340 | 52 | #include "ulpi.h" |
988d2d49 | 53 | |
220bbcea VL |
54 | static unsigned int moboard_pins[] = { |
55 | /* UART0 */ | |
220bbcea | 56 | MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1, |
421bf82e | 57 | MX31_PIN_CTS1__GPIO2_7, |
220bbcea VL |
58 | /* UART4 */ |
59 | MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5, | |
60 | MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5, | |
56c7a45b VL |
61 | /* I2C0 */ |
62 | MX31_PIN_I2C_DAT__I2C1_SDA, MX31_PIN_I2C_CLK__I2C1_SCL, | |
63 | /* I2C1 */ | |
64 | MX31_PIN_DCD_DTE1__I2C2_SDA, MX31_PIN_RI_DTE1__I2C2_SCL, | |
65 | /* SDHC1 */ | |
66 | MX31_PIN_SD1_DATA3__SD1_DATA3, MX31_PIN_SD1_DATA2__SD1_DATA2, | |
67 | MX31_PIN_SD1_DATA1__SD1_DATA1, MX31_PIN_SD1_DATA0__SD1_DATA0, | |
68 | MX31_PIN_SD1_CLK__SD1_CLK, MX31_PIN_SD1_CMD__SD1_CMD, | |
69 | MX31_PIN_ATA_CS0__GPIO3_26, MX31_PIN_ATA_CS1__GPIO3_27, | |
b23f1534 VL |
70 | /* USB reset */ |
71 | MX31_PIN_GPIO1_0__GPIO1_0, | |
88b05647 VL |
72 | /* USB OTG */ |
73 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | |
74 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | |
75 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | |
76 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | |
77 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | |
78 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | |
79 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | |
80 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | |
81 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, MX31_PIN_USBOTG_DIR__USBOTG_DIR, | |
82 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, MX31_PIN_USBOTG_STP__USBOTG_STP, | |
83 | MX31_PIN_USB_OC__GPIO1_30, | |
d67d1075 VL |
84 | /* USB H2 */ |
85 | MX31_PIN_USBH2_DATA0__USBH2_DATA0, | |
86 | MX31_PIN_USBH2_DATA1__USBH2_DATA1, | |
87 | MX31_PIN_STXD3__USBH2_DATA2, MX31_PIN_SRXD3__USBH2_DATA3, | |
88 | MX31_PIN_SCK3__USBH2_DATA4, MX31_PIN_SFS3__USBH2_DATA5, | |
89 | MX31_PIN_STXD6__USBH2_DATA6, MX31_PIN_SRXD6__USBH2_DATA7, | |
90 | MX31_PIN_USBH2_CLK__USBH2_CLK, MX31_PIN_USBH2_DIR__USBH2_DIR, | |
91 | MX31_PIN_USBH2_NXT__USBH2_NXT, MX31_PIN_USBH2_STP__USBH2_STP, | |
92 | MX31_PIN_SCK6__GPIO1_25, | |
77aa561d VL |
93 | /* LEDs */ |
94 | MX31_PIN_SVEN0__GPIO2_0, MX31_PIN_STX0__GPIO2_1, | |
95 | MX31_PIN_SRX0__GPIO2_2, MX31_PIN_SIMPD0__GPIO2_3, | |
65da9791 VL |
96 | /* SPI1 */ |
97 | MX31_PIN_CSPI2_MOSI__MOSI, MX31_PIN_CSPI2_MISO__MISO, | |
98 | MX31_PIN_CSPI2_SCLK__SCLK, MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, | |
99 | MX31_PIN_CSPI2_SS0__SS0, MX31_PIN_CSPI2_SS2__SS2, | |
100 | /* Atlas IRQ */ | |
101 | MX31_PIN_GPIO1_3__GPIO1_3, | |
102 | /* SPI2 */ | |
103 | MX31_PIN_CSPI3_MOSI__MOSI, MX31_PIN_CSPI3_MISO__MISO, | |
104 | MX31_PIN_CSPI3_SCLK__SCLK, MX31_PIN_CSPI3_SPI_RDY__SPI_RDY, | |
105 | MX31_PIN_CSPI2_SS1__CSPI3_SS1, | |
2f7b9451 PR |
106 | /* SSI */ |
107 | MX31_PIN_STXD4__STXD4, MX31_PIN_SRXD4__SRXD4, | |
108 | MX31_PIN_SCK4__SCK4, MX31_PIN_SFS4__SFS4, | |
220bbcea VL |
109 | }; |
110 | ||
988d2d49 | 111 | static struct physmap_flash_data mx31moboard_flash_data = { |
27ad4bf7 | 112 | .width = 2, |
988d2d49 VL |
113 | }; |
114 | ||
115 | static struct resource mx31moboard_flash_resource = { | |
116 | .start = 0xa0000000, | |
117 | .end = 0xa1ffffff, | |
118 | .flags = IORESOURCE_MEM, | |
119 | }; | |
120 | ||
121 | static struct platform_device mx31moboard_flash = { | |
122 | .name = "physmap-flash", | |
123 | .id = 0, | |
124 | .dev = { | |
125 | .platform_data = &mx31moboard_flash_data, | |
126 | }, | |
127 | .resource = &mx31moboard_flash_resource, | |
128 | .num_resources = 1, | |
129 | }; | |
130 | ||
421bf82e VL |
131 | static int moboard_uart0_init(struct platform_device *pdev) |
132 | { | |
5109a459 UKK |
133 | int ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CTS1), "uart0-cts-hack"); |
134 | if (ret) | |
135 | return ret; | |
136 | ||
137 | ret = gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CTS1), 0); | |
138 | if (ret) | |
139 | gpio_free(IOMUX_TO_GPIO(MX31_PIN_CTS1)); | |
140 | ||
141 | return ret; | |
142 | } | |
143 | ||
144 | static void moboard_uart0_exit(struct platform_device *pdev) | |
145 | { | |
146 | gpio_free(IOMUX_TO_GPIO(MX31_PIN_CTS1)); | |
421bf82e VL |
147 | } |
148 | ||
16cf5c41 | 149 | static const struct imxuart_platform_data uart0_pdata __initconst = { |
421bf82e | 150 | .init = moboard_uart0_init, |
5109a459 | 151 | .exit = moboard_uart0_exit, |
421bf82e VL |
152 | }; |
153 | ||
16cf5c41 | 154 | static const struct imxuart_platform_data uart4_pdata __initconst = { |
988d2d49 VL |
155 | .flags = IMXUART_HAVE_RTSCTS, |
156 | }; | |
157 | ||
4a9b8b0b | 158 | static const struct imxi2c_platform_data moboard_i2c0_data __initconst = { |
4ec6ecc7 VL |
159 | .bitrate = 400000, |
160 | }; | |
161 | ||
4a9b8b0b | 162 | static const struct imxi2c_platform_data moboard_i2c1_data __initconst = { |
4ec6ecc7 VL |
163 | .bitrate = 100000, |
164 | }; | |
165 | ||
65da9791 VL |
166 | static int moboard_spi1_cs[] = { |
167 | MXC_SPI_CS(0), | |
168 | MXC_SPI_CS(2), | |
169 | }; | |
170 | ||
06606ff1 | 171 | static const struct spi_imx_master moboard_spi1_pdata __initconst = { |
65da9791 VL |
172 | .chipselect = moboard_spi1_cs, |
173 | .num_chipselect = ARRAY_SIZE(moboard_spi1_cs), | |
174 | }; | |
175 | ||
176 | static struct regulator_consumer_supply sdhc_consumers[] = { | |
177 | { | |
7f917a8d | 178 | .dev_name = "imx31-mmc.0", |
65da9791 VL |
179 | .supply = "sdhc0_vcc", |
180 | }, | |
181 | { | |
7f917a8d | 182 | .dev_name = "imx31-mmc.1", |
65da9791 VL |
183 | .supply = "sdhc1_vcc", |
184 | }, | |
185 | }; | |
186 | ||
187 | static struct regulator_init_data sdhc_vreg_data = { | |
188 | .constraints = { | |
189 | .min_uV = 2700000, | |
190 | .max_uV = 3000000, | |
191 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
192 | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | |
193 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
194 | REGULATOR_MODE_FAST, | |
195 | .always_on = 0, | |
196 | .boot_on = 1, | |
197 | }, | |
198 | .num_consumer_supplies = ARRAY_SIZE(sdhc_consumers), | |
199 | .consumer_supplies = sdhc_consumers, | |
200 | }; | |
201 | ||
202 | static struct regulator_consumer_supply cam_consumers[] = { | |
203 | { | |
afa77ef3 UKK |
204 | .dev_name = "mx3_camera.0", |
205 | .supply = "cam_vcc", | |
65da9791 VL |
206 | }, |
207 | }; | |
208 | ||
209 | static struct regulator_init_data cam_vreg_data = { | |
210 | .constraints = { | |
211 | .min_uV = 2700000, | |
212 | .max_uV = 3000000, | |
213 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | | |
214 | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | |
215 | .valid_modes_mask = REGULATOR_MODE_NORMAL | | |
216 | REGULATOR_MODE_FAST, | |
217 | .always_on = 0, | |
218 | .boot_on = 1, | |
219 | }, | |
220 | .num_consumer_supplies = ARRAY_SIZE(cam_consumers), | |
221 | .consumer_supplies = cam_consumers, | |
222 | }; | |
223 | ||
5836372e | 224 | static struct mc13xxx_regulator_init_data moboard_regulators[] = { |
65da9791 | 225 | { |
57c78e35 | 226 | .id = MC13783_REG_VMMC1, |
65da9791 VL |
227 | .init_data = &sdhc_vreg_data, |
228 | }, | |
229 | { | |
57c78e35 | 230 | .id = MC13783_REG_VCAM, |
65da9791 VL |
231 | .init_data = &cam_vreg_data, |
232 | }, | |
233 | }; | |
234 | ||
d3efa4ed | 235 | static struct mc13xxx_led_platform_data moboard_led[] = { |
a7cca8ae PR |
236 | { |
237 | .id = MC13783_LED_R1, | |
238 | .name = "coreboard-led-4:red", | |
239 | .max_current = 2, | |
240 | }, | |
241 | { | |
242 | .id = MC13783_LED_G1, | |
243 | .name = "coreboard-led-4:green", | |
244 | .max_current = 2, | |
245 | }, | |
246 | { | |
247 | .id = MC13783_LED_B1, | |
248 | .name = "coreboard-led-4:blue", | |
249 | .max_current = 2, | |
250 | }, | |
251 | { | |
252 | .id = MC13783_LED_R2, | |
253 | .name = "coreboard-led-5:red", | |
254 | .max_current = 3, | |
255 | }, | |
256 | { | |
257 | .id = MC13783_LED_G2, | |
258 | .name = "coreboard-led-5:green", | |
259 | .max_current = 3, | |
260 | }, | |
261 | { | |
262 | .id = MC13783_LED_B2, | |
263 | .name = "coreboard-led-5:blue", | |
264 | .max_current = 3, | |
265 | }, | |
266 | }; | |
267 | ||
d3efa4ed | 268 | static struct mc13xxx_leds_platform_data moboard_leds = { |
a7cca8ae PR |
269 | .num_leds = ARRAY_SIZE(moboard_led), |
270 | .led = moboard_led, | |
271 | .flags = MC13783_LED_SLEWLIMTC, | |
272 | .abmode = MC13783_LED_AB_DISABLED, | |
273 | .tc1_period = MC13783_LED_PERIOD_10MS, | |
274 | .tc2_period = MC13783_LED_PERIOD_10MS, | |
275 | }; | |
276 | ||
d3efa4ed | 277 | static struct mc13xxx_buttons_platform_data moboard_buttons = { |
1f08c112 PR |
278 | .b1on_flags = MC13783_BUTTON_DBNC_750MS | MC13783_BUTTON_ENABLE | |
279 | MC13783_BUTTON_POL_INVERT, | |
280 | .b1on_key = KEY_POWER, | |
281 | }; | |
282 | ||
2f7b9451 PR |
283 | static struct mc13xxx_codec_platform_data moboard_codec = { |
284 | .dac_ssi_port = MC13783_SSI1_PORT, | |
285 | .adc_ssi_port = MC13783_SSI1_PORT, | |
286 | }; | |
287 | ||
5836372e | 288 | static struct mc13xxx_platform_data moboard_pmic = { |
4ec1b54c AS |
289 | .regulators = { |
290 | .regulators = moboard_regulators, | |
291 | .num_regulators = ARRAY_SIZE(moboard_regulators), | |
292 | }, | |
a7cca8ae | 293 | .leds = &moboard_leds, |
1f08c112 | 294 | .buttons = &moboard_buttons, |
2f7b9451 PR |
295 | .codec = &moboard_codec, |
296 | .flags = MC13XXX_USE_RTC | MC13XXX_USE_ADC | MC13XXX_USE_CODEC, | |
297 | }; | |
298 | ||
299 | static struct imx_ssi_platform_data moboard_ssi_pdata = { | |
300 | .flags = IMX_SSI_DMA | IMX_SSI_NET, | |
65da9791 VL |
301 | }; |
302 | ||
303 | static struct spi_board_info moboard_spi_board_info[] __initdata = { | |
304 | { | |
305 | .modalias = "mc13783", | |
ed175343 | 306 | /* irq number is run-time assigned */ |
65da9791 VL |
307 | .max_speed_hz = 300000, |
308 | .bus_num = 1, | |
309 | .chip_select = 0, | |
310 | .platform_data = &moboard_pmic, | |
311 | .mode = SPI_CS_HIGH, | |
312 | }, | |
65da9791 VL |
313 | }; |
314 | ||
315 | static int moboard_spi2_cs[] = { | |
316 | MXC_SPI_CS(1), | |
317 | }; | |
318 | ||
06606ff1 | 319 | static const struct spi_imx_master moboard_spi2_pdata __initconst = { |
65da9791 VL |
320 | .chipselect = moboard_spi2_cs, |
321 | .num_chipselect = ARRAY_SIZE(moboard_spi2_cs), | |
322 | }; | |
323 | ||
45b131a7 VL |
324 | #define SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_ATA_CS0) |
325 | #define SDHC1_WP IOMUX_TO_GPIO(MX31_PIN_ATA_CS1) | |
326 | ||
327 | static int moboard_sdhc1_get_ro(struct device *dev) | |
328 | { | |
563abb4b | 329 | return !gpio_get_value(SDHC1_WP); |
45b131a7 VL |
330 | } |
331 | ||
332 | static int moboard_sdhc1_init(struct device *dev, irq_handler_t detect_irq, | |
333 | void *data) | |
334 | { | |
4f163eb8 SH |
335 | int ret; |
336 | ||
337 | ret = gpio_request(SDHC1_CD, "sdhc-detect"); | |
338 | if (ret) | |
339 | return ret; | |
340 | ||
341 | gpio_direction_input(SDHC1_CD); | |
342 | ||
343 | ret = gpio_request(SDHC1_WP, "sdhc-wp"); | |
344 | if (ret) | |
345 | goto err_gpio_free; | |
346 | gpio_direction_input(SDHC1_WP); | |
347 | ||
348 | ret = request_irq(gpio_to_irq(SDHC1_CD), detect_irq, | |
45b131a7 VL |
349 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
350 | "sdhc1-card-detect", data); | |
4f163eb8 SH |
351 | if (ret) |
352 | goto err_gpio_free_2; | |
353 | ||
354 | return 0; | |
355 | ||
356 | err_gpio_free_2: | |
357 | gpio_free(SDHC1_WP); | |
358 | err_gpio_free: | |
359 | gpio_free(SDHC1_CD); | |
360 | ||
361 | return ret; | |
45b131a7 VL |
362 | } |
363 | ||
364 | static void moboard_sdhc1_exit(struct device *dev, void *data) | |
365 | { | |
366 | free_irq(gpio_to_irq(SDHC1_CD), data); | |
4f163eb8 SH |
367 | gpio_free(SDHC1_WP); |
368 | gpio_free(SDHC1_CD); | |
45b131a7 VL |
369 | } |
370 | ||
6a697e3d | 371 | static const struct imxmmc_platform_data sdhc1_pdata __initconst = { |
45b131a7 VL |
372 | .get_ro = moboard_sdhc1_get_ro, |
373 | .init = moboard_sdhc1_init, | |
374 | .exit = moboard_sdhc1_exit, | |
375 | }; | |
376 | ||
b23f1534 VL |
377 | /* |
378 | * this pin is dedicated for all mx31moboard systems, so we do it here | |
379 | */ | |
380 | #define USB_RESET_B IOMUX_TO_GPIO(MX31_PIN_GPIO1_0) | |
88b05647 | 381 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ |
25783602 | 382 | PAD_CTL_ODE_CMOS) |
88b05647 VL |
383 | |
384 | #define OTG_EN_B IOMUX_TO_GPIO(MX31_PIN_USB_OC) | |
25783602 | 385 | #define USBH2_EN_B IOMUX_TO_GPIO(MX31_PIN_SCK6) |
88b05647 | 386 | |
25783602 | 387 | static void usb_xcvr_reset(void) |
88b05647 | 388 | { |
25783602 PR |
389 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD); |
390 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD); | |
391 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG | PAD_CTL_100K_PD); | |
392 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG | PAD_CTL_100K_PD); | |
393 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG | PAD_CTL_100K_PD); | |
394 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG | PAD_CTL_100K_PD); | |
395 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG | PAD_CTL_100K_PD); | |
396 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG | PAD_CTL_100K_PD); | |
397 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG | PAD_CTL_100K_PU); | |
398 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG | PAD_CTL_100K_PU); | |
399 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG | PAD_CTL_100K_PU); | |
400 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG | PAD_CTL_100K_PU); | |
401 | ||
402 | mxc_iomux_set_gpr(MUX_PGP_UH2, true); | |
403 | mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG | PAD_CTL_100K_PU); | |
404 | mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG | PAD_CTL_100K_PU); | |
405 | mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG | PAD_CTL_100K_PU); | |
406 | mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG | PAD_CTL_100K_PU); | |
407 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG | PAD_CTL_100K_PD); | |
408 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG | PAD_CTL_100K_PD); | |
409 | mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG | PAD_CTL_100K_PD); | |
410 | mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG | PAD_CTL_100K_PD); | |
411 | mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG | PAD_CTL_100K_PD); | |
412 | mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG | PAD_CTL_100K_PD); | |
413 | mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG | PAD_CTL_100K_PD); | |
414 | mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG | PAD_CTL_100K_PD); | |
88b05647 VL |
415 | |
416 | gpio_request(OTG_EN_B, "usb-udc-en"); | |
417 | gpio_direction_output(OTG_EN_B, 0); | |
25783602 PR |
418 | gpio_request(USBH2_EN_B, "usbh2-en"); |
419 | gpio_direction_output(USBH2_EN_B, 0); | |
420 | ||
421 | gpio_request(USB_RESET_B, "usb-reset"); | |
422 | gpio_direction_output(USB_RESET_B, 0); | |
423 | mdelay(1); | |
424 | gpio_set_value(USB_RESET_B, 1); | |
425 | mdelay(1); | |
88b05647 VL |
426 | } |
427 | ||
4bd597b6 SH |
428 | static int moboard_usbh2_init_hw(struct platform_device *pdev) |
429 | { | |
430 | return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED); | |
431 | } | |
f9ffaa9c | 432 | |
2d58de28 | 433 | static struct mxc_usbh_platform_data usbh2_pdata __initdata = { |
4bd597b6 | 434 | .init = moboard_usbh2_init_hw, |
d67d1075 | 435 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, |
d67d1075 VL |
436 | }; |
437 | ||
438 | static int __init moboard_usbh2_init(void) | |
439 | { | |
2d58de28 UKK |
440 | struct platform_device *pdev; |
441 | ||
48f6b099 SH |
442 | usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | |
443 | ULPI_OTG_DRVVBUS_EXT); | |
444 | if (!usbh2_pdata.otg) | |
445 | return -ENODEV; | |
d67d1075 | 446 | |
2d58de28 UKK |
447 | pdev = imx31_add_mxc_ehci_hs(2, &usbh2_pdata); |
448 | if (IS_ERR(pdev)) | |
449 | return PTR_ERR(pdev); | |
450 | ||
451 | return 0; | |
d67d1075 | 452 | } |
d67d1075 | 453 | |
47e837b5 | 454 | static const struct gpio_led mx31moboard_leds[] __initconst = { |
77aa561d | 455 | { |
27ad4bf7 | 456 | .name = "coreboard-led-0:red:running", |
77aa561d | 457 | .default_trigger = "heartbeat", |
27ad4bf7 | 458 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SVEN0), |
77aa561d VL |
459 | }, { |
460 | .name = "coreboard-led-1:red", | |
461 | .gpio = IOMUX_TO_GPIO(MX31_PIN_STX0), | |
462 | }, { | |
463 | .name = "coreboard-led-2:red", | |
464 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SRX0), | |
465 | }, { | |
466 | .name = "coreboard-led-3:red", | |
467 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SIMPD0), | |
468 | }, | |
469 | }; | |
470 | ||
47e837b5 | 471 | static const struct gpio_led_platform_data mx31moboard_led_pdata __initconst = { |
27ad4bf7 | 472 | .num_leds = ARRAY_SIZE(mx31moboard_leds), |
77aa561d VL |
473 | .leds = mx31moboard_leds, |
474 | }; | |
475 | ||
988d2d49 VL |
476 | static struct platform_device *devices[] __initdata = { |
477 | &mx31moboard_flash, | |
478 | }; | |
479 | ||
afa77ef3 | 480 | static struct mx3_camera_pdata camera_pdata __initdata = { |
04ea3c80 VL |
481 | .flags = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10, |
482 | .mclk_10khz = 4800, | |
483 | }; | |
484 | ||
031e9127 UKK |
485 | static phys_addr_t mx3_camera_base __initdata; |
486 | #define MX3_CAMERA_BUF_SIZE SZ_4M | |
04ea3c80 | 487 | |
afa77ef3 | 488 | static int __init mx31moboard_init_cam(void) |
04ea3c80 | 489 | { |
afa77ef3 UKK |
490 | int dma, ret = -ENOMEM; |
491 | struct platform_device *pdev; | |
492 | ||
88289c80 | 493 | imx31_add_ipu_core(); |
04ea3c80 | 494 | |
afa77ef3 UKK |
495 | pdev = imx31_alloc_mx3_camera(&camera_pdata); |
496 | if (IS_ERR(pdev)) | |
497 | return PTR_ERR(pdev); | |
04ea3c80 | 498 | |
afa77ef3 | 499 | dma = dma_declare_coherent_memory(&pdev->dev, |
031e9127 UKK |
500 | mx3_camera_base, mx3_camera_base, |
501 | MX3_CAMERA_BUF_SIZE, | |
04ea3c80 | 502 | DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE); |
afa77ef3 UKK |
503 | if (!(dma & DMA_MEMORY_MAP)) |
504 | goto err; | |
505 | ||
506 | ret = platform_device_add(pdev); | |
507 | if (ret) | |
508 | err: | |
509 | platform_device_put(pdev); | |
510 | ||
511 | return ret; | |
04ea3c80 | 512 | |
04ea3c80 VL |
513 | } |
514 | ||
40d97b89 PR |
515 | static void mx31moboard_poweroff(void) |
516 | { | |
517 | struct clk *clk = clk_get_sys("imx2-wdt.0", NULL); | |
518 | ||
519 | if (!IS_ERR(clk)) | |
8186064c | 520 | clk_prepare_enable(clk); |
40d97b89 PR |
521 | |
522 | mxc_iomux_mode(MX31_PIN_WATCHDOG_RST__WATCHDOG_RST); | |
523 | ||
524 | __raw_writew(1 << 6 | 1 << 2, MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); | |
525 | } | |
526 | ||
e00f0b4a VL |
527 | static int mx31moboard_baseboard; |
528 | core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); | |
529 | ||
988d2d49 VL |
530 | /* |
531 | * Board specific initialization. | |
532 | */ | |
e134fb2b | 533 | static void __init mx31moboard_init(void) |
988d2d49 | 534 | { |
b78d8e59 SG |
535 | imx31_soc_init(); |
536 | ||
220bbcea VL |
537 | mxc_iomux_setup_multiple_pins(moboard_pins, ARRAY_SIZE(moboard_pins), |
538 | "moboard"); | |
539 | ||
988d2d49 | 540 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
47e837b5 | 541 | gpio_led_register_device(-1, &mx31moboard_led_pdata); |
988d2d49 | 542 | |
bec31a85 | 543 | imx31_add_imx2_wdt(); |
31776fbc | 544 | |
16cf5c41 UKK |
545 | imx31_add_imx_uart0(&uart0_pdata); |
546 | imx31_add_imx_uart4(&uart4_pdata); | |
e00f0b4a | 547 | |
4a9b8b0b UKK |
548 | imx31_add_imx_i2c0(&moboard_i2c0_data); |
549 | imx31_add_imx_i2c1(&moboard_i2c1_data); | |
4ec6ecc7 | 550 | |
06606ff1 UKK |
551 | imx31_add_spi_imx1(&moboard_spi1_pdata); |
552 | imx31_add_spi_imx2(&moboard_spi2_pdata); | |
65da9791 VL |
553 | |
554 | gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3), "pmic-irq"); | |
555 | gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); | |
ed175343 SG |
556 | moboard_spi_board_info[0].irq = |
557 | gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)); | |
65da9791 VL |
558 | spi_register_board_info(moboard_spi_board_info, |
559 | ARRAY_SIZE(moboard_spi_board_info)); | |
560 | ||
6a697e3d | 561 | imx31_add_mxc_mmc(0, &sdhc1_pdata); |
45b131a7 | 562 | |
afa77ef3 | 563 | mx31moboard_init_cam(); |
4dd71293 | 564 | |
b23f1534 VL |
565 | usb_xcvr_reset(); |
566 | ||
d67d1075 | 567 | moboard_usbh2_init(); |
88b05647 | 568 | |
2f7b9451 PR |
569 | imx31_add_imx_ssi(0, &moboard_ssi_pdata); |
570 | ||
571 | imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0); | |
572 | ||
40d97b89 PR |
573 | pm_power_off = mx31moboard_poweroff; |
574 | ||
e00f0b4a VL |
575 | switch (mx31moboard_baseboard) { |
576 | case MX31NOBOARD: | |
577 | break; | |
578 | case MX31DEVBOARD: | |
579 | mx31moboard_devboard_init(); | |
580 | break; | |
581 | case MX31MARXBOT: | |
582 | mx31moboard_marxbot_init(); | |
583 | break; | |
e335c75c | 584 | case MX31SMARTBOT: |
3a47b1a4 PR |
585 | case MX31EYEBOT: |
586 | mx31moboard_smartbot_init(mx31moboard_baseboard); | |
e335c75c | 587 | break; |
e00f0b4a | 588 | default: |
220bbcea VL |
589 | printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", |
590 | mx31moboard_baseboard); | |
e00f0b4a | 591 | } |
988d2d49 VL |
592 | } |
593 | ||
988d2d49 VL |
594 | static void __init mx31moboard_timer_init(void) |
595 | { | |
30c730f8 | 596 | mx31_clocks_init(26000000); |
988d2d49 VL |
597 | } |
598 | ||
031e9127 UKK |
599 | static void __init mx31moboard_reserve(void) |
600 | { | |
601 | /* reserve 4 MiB for mx3-camera */ | |
716a3dc2 | 602 | mx3_camera_base = arm_memblock_steal(MX3_CAMERA_BUF_SIZE, |
031e9127 | 603 | MX3_CAMERA_BUF_SIZE); |
031e9127 UKK |
604 | } |
605 | ||
988d2d49 | 606 | MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") |
0fbe6b07 | 607 | /* Maintainer: Philippe Retornaz, EPFL Mobots group */ |
dc8f1907 | 608 | .atag_offset = 0x100, |
031e9127 | 609 | .reserve = mx31moboard_reserve, |
97976e22 UKK |
610 | .map_io = mx31_map_io, |
611 | .init_early = imx31_init_early, | |
612 | .init_irq = mx31_init_irq, | |
ffa2ea3f | 613 | .handle_irq = imx31_handle_irq, |
6bb27d73 | 614 | .init_time = mx31moboard_timer_init, |
e134fb2b | 615 | .init_machine = mx31moboard_init, |
65ea7884 | 616 | .restart = mxc_restart, |
988d2d49 | 617 | MACHINE_END |