[deliverable/linux.git] / arch / arm / mach-imx / mach-mx35_3ds.c

/*
 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
 * Copyright (C) 2009 Marc Kleine-Budde, Pengutronix
 *
 * Author: Fabio Estevam <fabio.estevam@freescale.com>
 *
 * Copyright (C) 2011 Meprolight, Ltd.
 * Alex Gershgorin <alexg@meprolight.com>
 *
 * Modified from i.MX31 3-Stack Development System
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

/*
 * This machine is known as:
 *  - i.MX35 3-Stack Development System
 *  - i.MX35 Platform Development Kit (i.MX35 PDK)
 */

#include <linux/types.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/memory.h>
#include <linux/gpio.h>
#include <linux/usb/otg.h>

#include <linux/mtd/physmap.h>
#include <linux/mfd/mc13892.h>
#include <linux/regulator/machine.h>

#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <asm/memblock.h>

#include <video/platform_lcd.h>

#include <media/soc_camera.h>

#include "3ds_debugboard.h"
#include "common.h"
#include "devices-imx35.h"
#include "hardware.h"
#include "iomux-mx35.h"

#define GPIO_MC9S08DZ60_GPS_ENABLE 0
#define GPIO_MC9S08DZ60_HDD_ENABLE 4
#define GPIO_MC9S08DZ60_WIFI_ENABLE 5
#define GPIO_MC9S08DZ60_LCD_ENABLE 6
#define GPIO_MC9S08DZ60_SPEAKER_ENABLE 8

static const struct fb_videomode fb_modedb[] = {
	{
		 /* 800x480 @ 55 Hz */
		.name = "Ceramate-CLAA070VC01",
		.refresh = 55,
		.xres = 800,
		.yres = 480,
		.pixclock = 40000,
		.left_margin = 40,
		.right_margin = 40,
		.upper_margin = 5,
		.lower_margin = 5,
		.hsync_len = 20,
		.vsync_len = 10,
		.sync = FB_SYNC_OE_ACT_HIGH,
		.vmode = FB_VMODE_NONINTERLACED,
		.flag = 0,
	 },
};

static struct mx3fb_platform_data mx3fb_pdata __initdata = {
	.name = "Ceramate-CLAA070VC01",
	.mode = fb_modedb,
	.num_modes = ARRAY_SIZE(fb_modedb),
};

static struct i2c_board_info __initdata i2c_devices_3ds[] = {
	{
		I2C_BOARD_INFO("mc9s08dz60", 0x69),
	},
};

static int lcd_power_gpio = -ENXIO;

static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip, void *data)
{
	return !strcmp(chip->label, data);
}

static void mx35_3ds_lcd_set_power(
				struct plat_lcd_data *pd, unsigned int power)
{
	struct gpio_chip *chip;

	if (!gpio_is_valid(lcd_power_gpio)) {
		chip = gpiochip_find(
				"mc9s08dz60", mc9s08dz60_gpiochip_match);
		if (chip) {
			lcd_power_gpio =
				chip->base + GPIO_MC9S08DZ60_LCD_ENABLE;
			if (gpio_request(lcd_power_gpio, "lcd_power") < 0) {
				pr_err("error: gpio already requested!\n");
				lcd_power_gpio = -ENXIO;
			}
		} else {
			pr_err("error: didn't find mc9s08dz60 gpio chip\n");
		}
	}

	if (gpio_is_valid(lcd_power_gpio))
		gpio_set_value_cansleep(lcd_power_gpio, power);
}

static struct plat_lcd_data mx35_3ds_lcd_data = {
	.set_power = mx35_3ds_lcd_set_power,
};

static struct platform_device mx35_3ds_lcd = {
	.name = "platform-lcd",
	.dev.platform_data = &mx35_3ds_lcd_data,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

static struct physmap_flash_data mx35pdk_flash_data = {
	.width  = 2,
};

static struct resource mx35pdk_flash_resource = {
	.start	= MX35_CS0_BASE_ADDR,
	.end	= MX35_CS0_BASE_ADDR + SZ_64M - 1,
	.flags	= IORESOURCE_MEM,
};

static struct platform_device mx35pdk_flash = {
	.name	= "physmap-flash",
	.id	= 0,
	.dev	= {
		.platform_data  = &mx35pdk_flash_data,
	},
	.resource = &mx35pdk_flash_resource,
	.num_resources = 1,
};

static const struct mxc_nand_platform_data mx35pdk_nand_board_info __initconst = {
	.width = 1,
	.hw_ecc = 1,
	.flash_bbt = 1,
};

static struct platform_device *devices[] __initdata = {
	&mx35pdk_flash,
};

static iomux_v3_cfg_t mx35pdk_pads[] = {
	/* UART1 */
	MX35_PAD_CTS1__UART1_CTS,
	MX35_PAD_RTS1__UART1_RTS,
	MX35_PAD_TXD1__UART1_TXD_MUX,
	MX35_PAD_RXD1__UART1_RXD_MUX,
	/* FEC */
	MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
	MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
	MX35_PAD_FEC_RX_DV__FEC_RX_DV,
	MX35_PAD_FEC_COL__FEC_COL,
	MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
	MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
	MX35_PAD_FEC_TX_EN__FEC_TX_EN,
	MX35_PAD_FEC_MDC__FEC_MDC,
	MX35_PAD_FEC_MDIO__FEC_MDIO,
	MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
	MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
	MX35_PAD_FEC_CRS__FEC_CRS,
	MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
	MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
	MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
	MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
	MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
	MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
	/* USBOTG */
	MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR,
	MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC,
	/* USBH1 */
	MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
	MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
	/* SDCARD */
	MX35_PAD_SD1_CMD__ESDHC1_CMD,
	MX35_PAD_SD1_CLK__ESDHC1_CLK,
	MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
	MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
	MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
	MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
	/* I2C1 */
	MX35_PAD_I2C1_CLK__I2C1_SCL,
	MX35_PAD_I2C1_DAT__I2C1_SDA,
	/* Display */
	MX35_PAD_LD0__IPU_DISPB_DAT_0,
	MX35_PAD_LD1__IPU_DISPB_DAT_1,
	MX35_PAD_LD2__IPU_DISPB_DAT_2,
	MX35_PAD_LD3__IPU_DISPB_DAT_3,
	MX35_PAD_LD4__IPU_DISPB_DAT_4,
	MX35_PAD_LD5__IPU_DISPB_DAT_5,
	MX35_PAD_LD6__IPU_DISPB_DAT_6,
	MX35_PAD_LD7__IPU_DISPB_DAT_7,
	MX35_PAD_LD8__IPU_DISPB_DAT_8,
	MX35_PAD_LD9__IPU_DISPB_DAT_9,
	MX35_PAD_LD10__IPU_DISPB_DAT_10,
	MX35_PAD_LD11__IPU_DISPB_DAT_11,
	MX35_PAD_LD12__IPU_DISPB_DAT_12,
	MX35_PAD_LD13__IPU_DISPB_DAT_13,
	MX35_PAD_LD14__IPU_DISPB_DAT_14,
	MX35_PAD_LD15__IPU_DISPB_DAT_15,
	MX35_PAD_LD16__IPU_DISPB_DAT_16,
	MX35_PAD_LD17__IPU_DISPB_DAT_17,
	MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
	MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
	MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
	MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
	MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
	MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
	MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
	/* CSI */
	MX35_PAD_TX1__IPU_CSI_D_6,
	MX35_PAD_TX0__IPU_CSI_D_7,
	MX35_PAD_CSI_D8__IPU_CSI_D_8,
	MX35_PAD_CSI_D9__IPU_CSI_D_9,
	MX35_PAD_CSI_D10__IPU_CSI_D_10,
	MX35_PAD_CSI_D11__IPU_CSI_D_11,
	MX35_PAD_CSI_D12__IPU_CSI_D_12,
	MX35_PAD_CSI_D13__IPU_CSI_D_13,
	MX35_PAD_CSI_D14__IPU_CSI_D_14,
	MX35_PAD_CSI_D15__IPU_CSI_D_15,
	MX35_PAD_CSI_HSYNC__IPU_CSI_HSYNC,
	MX35_PAD_CSI_MCLK__IPU_CSI_MCLK,
	MX35_PAD_CSI_PIXCLK__IPU_CSI_PIXCLK,
	MX35_PAD_CSI_VSYNC__IPU_CSI_VSYNC,
	/*PMIC IRQ*/
	MX35_PAD_GPIO2_0__GPIO2_0,
};

/*
 * Camera support
*/
static phys_addr_t mx3_camera_base __initdata;
#define MX35_3DS_CAMERA_BUF_SIZE SZ_8M

static const struct mx3_camera_pdata mx35_3ds_camera_pdata __initconst = {
	.flags = MX3_CAMERA_DATAWIDTH_8,
	.mclk_10khz = 2000,
};

static int __init imx35_3ds_init_camera(void)
{
	int dma, ret = -ENOMEM;
	struct platform_device *pdev =
		imx35_alloc_mx3_camera(&mx35_3ds_camera_pdata);

	if (IS_ERR(pdev))
		return PTR_ERR(pdev);

	if (!mx3_camera_base)
		goto err;

	dma = dma_declare_coherent_memory(&pdev->dev,
					mx3_camera_base, mx3_camera_base,
					MX35_3DS_CAMERA_BUF_SIZE,
					DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);

	if (!(dma & DMA_MEMORY_MAP))
		goto err;

	ret = platform_device_add(pdev);
	if (ret)
err:
		platform_device_put(pdev);

	return ret;
}

static struct i2c_board_info mx35_3ds_i2c_camera = {
	I2C_BOARD_INFO("ov2640", 0x30),
};

static struct soc_camera_link iclink_ov2640 = {
	.bus_id		= 0,
	.board_info	= &mx35_3ds_i2c_camera,
	.i2c_adapter_id	= 0,
	.power		= NULL,
};

static struct platform_device mx35_3ds_ov2640 = {
	.name	= "soc-camera-pdrv",
	.id	= 0,
	.dev	= {
		.platform_data = &iclink_ov2640,
	},
};

static struct regulator_consumer_supply sw1_consumers[] = {
	{
		.supply = "cpu_vcc",
	}
};

static struct regulator_consumer_supply vcam_consumers[] = {
	/* sgtl5000 */
	REGULATOR_SUPPLY("VDDA", "0-000a"),
};

static struct regulator_consumer_supply vaudio_consumers[] = {
	REGULATOR_SUPPLY("cmos_vio", "soc-camera-pdrv.0"),
};

static struct regulator_init_data sw1_init = {
	.constraints = {
		.name = "SW1",
		.min_uV = 600000,
		.max_uV = 1375000,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
		.valid_modes_mask = 0,
		.always_on = 1,
		.boot_on = 1,
	},
	.num_consumer_supplies = ARRAY_SIZE(sw1_consumers),
	.consumer_supplies = sw1_consumers,
};

static struct regulator_init_data sw2_init = {
	.constraints = {
		.name = "SW2",
		.always_on = 1,
		.boot_on = 1,
	}
};

static struct regulator_init_data sw3_init = {
	.constraints = {
		.name = "SW3",
		.always_on = 1,
		.boot_on = 1,
	}
};

static struct regulator_init_data sw4_init = {
	.constraints = {
		.name = "SW4",
		.always_on = 1,
		.boot_on = 1,
	}
};

static struct regulator_init_data viohi_init = {
	.constraints = {
		.name = "VIOHI",
		.boot_on = 1,
	}
};

static struct regulator_init_data vusb_init = {
	.constraints = {
		.name = "VUSB",
		.boot_on = 1,
	}
};

static struct regulator_init_data vdig_init = {
	.constraints = {
		.name = "VDIG",
		.boot_on = 1,
	}
};

static struct regulator_init_data vpll_init = {
	.constraints = {
		.name = "VPLL",
		.boot_on = 1,
	}
};

static struct regulator_init_data vusb2_init = {
	.constraints = {
		.name = "VUSB2",
		.boot_on = 1,
	}
};

static struct regulator_init_data vvideo_init = {
	.constraints = {
		.name = "VVIDEO",
		.boot_on = 1
	}
};

static struct regulator_init_data vaudio_init = {
	.constraints = {
		.name = "VAUDIO",
		.min_uV = 2300000,
		.max_uV = 3000000,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
		.boot_on = 1
	},
	.num_consumer_supplies = ARRAY_SIZE(vaudio_consumers),
	.consumer_supplies = vaudio_consumers,
};

static struct regulator_init_data vcam_init = {
	.constraints = {
		.name = "VCAM",
		.min_uV = 2500000,
		.max_uV = 3000000,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
					REGULATOR_CHANGE_MODE,
		.valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL,
		.boot_on = 1
	},
	.num_consumer_supplies = ARRAY_SIZE(vcam_consumers),
	.consumer_supplies = vcam_consumers,
};

static struct regulator_init_data vgen1_init = {
	.constraints = {
		.name = "VGEN1",
	}
};

static struct regulator_init_data vgen2_init = {
	.constraints = {
		.name = "VGEN2",
		.boot_on = 1,
	}
};

static struct regulator_init_data vgen3_init = {
	.constraints = {
		.name = "VGEN3",
	}
};

static struct mc13xxx_regulator_init_data mx35_3ds_regulators[] = {
	{ .id = MC13892_SW1, .init_data = &sw1_init },
	{ .id = MC13892_SW2, .init_data = &sw2_init },
	{ .id = MC13892_SW3, .init_data = &sw3_init },
	{ .id = MC13892_SW4, .init_data = &sw4_init },
	{ .id = MC13892_VIOHI, .init_data = &viohi_init },
	{ .id = MC13892_VPLL, .init_data = &vpll_init },
	{ .id = MC13892_VDIG, .init_data = &vdig_init },
	{ .id = MC13892_VUSB2, .init_data = &vusb2_init },
	{ .id = MC13892_VVIDEO, .init_data = &vvideo_init },
	{ .id = MC13892_VAUDIO, .init_data = &vaudio_init },
	{ .id = MC13892_VCAM, .init_data = &vcam_init },
	{ .id = MC13892_VGEN1, .init_data = &vgen1_init },
	{ .id = MC13892_VGEN2, .init_data = &vgen2_init },
	{ .id = MC13892_VGEN3, .init_data = &vgen3_init },
	{ .id = MC13892_VUSB, .init_data = &vusb_init },
};

static struct mc13xxx_platform_data mx35_3ds_mc13892_data = {
	.flags = MC13XXX_USE_RTC | MC13XXX_USE_TOUCHSCREEN,
	.regulators = {
		.num_regulators = ARRAY_SIZE(mx35_3ds_regulators),
		.regulators = mx35_3ds_regulators,
	},
};

#define GPIO_PMIC_INT IMX_GPIO_NR(2, 0)

static struct i2c_board_info mx35_3ds_i2c_mc13892 = {

	I2C_BOARD_INFO("mc13892", 0x08),
	.platform_data = &mx35_3ds_mc13892_data,
	/* irq number is run-time assigned */
};

static void __init imx35_3ds_init_mc13892(void)
{
	int ret = gpio_request_one(GPIO_PMIC_INT, GPIOF_DIR_IN, "pmic irq");

	if (ret) {
		pr_err("failed to get pmic irq: %d\n", ret);
		return;
	}

	mx35_3ds_i2c_mc13892.irq = gpio_to_irq(GPIO_PMIC_INT);
	i2c_register_board_info(0, &mx35_3ds_i2c_mc13892, 1);
}

static int mx35_3ds_otg_init(struct platform_device *pdev)
{
	return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
}

/* OTG config */
static const struct fsl_usb2_platform_data usb_otg_pdata __initconst = {
	.operating_mode	= FSL_USB2_DR_DEVICE,
	.phy_mode	= FSL_USB2_PHY_UTMI_WIDE,
	.workaround	= FLS_USB2_WORKAROUND_ENGCM09152,
/*
 * ENGCM09152 also requires a hardware change.
 * Please check the MX35 Chip Errata document for details.
 */
};

static struct mxc_usbh_platform_data otg_pdata __initdata = {
	.init	= mx35_3ds_otg_init,
	.portsc	= MXC_EHCI_MODE_UTMI,
};

static int mx35_3ds_usbh_init(struct platform_device *pdev)
{
	return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_SINGLE_UNI |
			  MXC_EHCI_INTERNAL_PHY);
}

/* USB HOST config */
static const struct mxc_usbh_platform_data usb_host_pdata __initconst = {
	.init		= mx35_3ds_usbh_init,
	.portsc		= MXC_EHCI_MODE_SERIAL,
};

static bool otg_mode_host __initdata;

static int __init mx35_3ds_otg_mode(char *options)
{
	if (!strcmp(options, "host"))
		otg_mode_host = true;
	else if (!strcmp(options, "device"))
		otg_mode_host = false;
	else
		pr_info("otg_mode neither \"host\" nor \"device\". "
			"Defaulting to device\n");
	return 1;
}
__setup("otg_mode=", mx35_3ds_otg_mode);

static const struct imxi2c_platform_data mx35_3ds_i2c0_data __initconst = {
	.bitrate = 100000,
};

/*
 * Board specific initialization.
 */
static void __init mx35_3ds_init(void)
{
	struct platform_device *imx35_fb_pdev;

	imx35_soc_init();

	mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads));

	imx35_add_fec(NULL);
	imx35_add_imx2_wdt();
	imx35_add_mxc_rtc();
	platform_add_devices(devices, ARRAY_SIZE(devices));

	imx35_add_imx_uart0(&uart_pdata);

	if (otg_mode_host)
		imx35_add_mxc_ehci_otg(&otg_pdata);

	imx35_add_mxc_ehci_hs(&usb_host_pdata);

	if (!otg_mode_host)
		imx35_add_fsl_usb2_udc(&usb_otg_pdata);

	imx35_add_mxc_nand(&mx35pdk_nand_board_info);
	imx35_add_sdhci_esdhc_imx(0, NULL);

	if (mxc_expio_init(MX35_CS5_BASE_ADDR, IMX_GPIO_NR(1, 1)))
		pr_warn("Init of the debugboard failed, all "
				"devices on the debugboard are unusable.\n");
	imx35_add_imx_i2c0(&mx35_3ds_i2c0_data);

	i2c_register_board_info(
		0, i2c_devices_3ds, ARRAY_SIZE(i2c_devices_3ds));

	imx35_add_ipu_core();
	platform_device_register(&mx35_3ds_ov2640);
	imx35_3ds_init_camera();

	imx35_fb_pdev = imx35_add_mx3_sdc_fb(&mx3fb_pdata);
	mx35_3ds_lcd.dev.parent = &imx35_fb_pdev->dev;
	platform_device_register(&mx35_3ds_lcd);

	imx35_3ds_init_mc13892();
}

static void __init mx35pdk_timer_init(void)
{
	mx35_clocks_init();
}

static struct sys_timer mx35pdk_timer = {
	.init	= mx35pdk_timer_init,
};

static void __init mx35_3ds_reserve(void)
{
	/* reserve MX35_3DS_CAMERA_BUF_SIZE bytes for mx3-camera */
	mx3_camera_base = arm_memblock_steal(MX35_3DS_CAMERA_BUF_SIZE,
					 MX35_3DS_CAMERA_BUF_SIZE);
}

MACHINE_START(MX35_3DS, "Freescale MX35PDK")
	/* Maintainer: Freescale Semiconductor, Inc */
	.atag_offset = 0x100,
	.map_io = mx35_map_io,
	.init_early = imx35_init_early,
	.init_irq = mx35_init_irq,
	.handle_irq = imx35_handle_irq,
	.timer = &mx35pdk_timer,
	.init_machine = mx35_3ds_init,
	.reserve = mx35_3ds_reserve,
	.restart	= mxc_restart,
MACHINE_END
Commit	Line	Data
aefa1c6e FE	1	/*
aefa1c6e FE	2	* Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
d17e1c1a	3	* Copyright (C) 2009 Marc Kleine-Budde, Pengutronix
aefa1c6e FE	4	*
	5	* Author: Fabio Estevam <fabio.estevam@freescale.com>
	6	*
25af2d9f AG	7	* Copyright (C) 2011 Meprolight, Ltd.
	8	* Alex Gershgorin <alexg@meprolight.com>
	9	*
	10	* Modified from i.MX31 3-Stack Development System
	11	*
aefa1c6e FE	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License as published by
	14	* the Free Software Foundation; either version 2 of the License, or
	15	* (at your option) any later version.
	16	*
	17	* This program is distributed in the hope that it will be useful,
	18	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	* GNU General Public License for more details.
aefa1c6e FE	21	*/
aefa1c6e FE	22
767c38b2 UKK	23	/*
	24	* This machine is known as:
	25	* - i.MX35 3-Stack Development System
	26	* - i.MX35 Platform Development Kit (i.MX35 PDK)
	27	*/
	28
aefa1c6e FE	29	#include <linux/types.h>
	30	#include <linux/init.h>
	31	#include <linux/platform_device.h>
	32	#include <linux/memory.h>
	33	#include <linux/gpio.h>
130a0dda	34	#include <linux/usb/otg.h>
aefa1c6e	35
d17e1c1a	36	#include <linux/mtd/physmap.h>
c8349fb4 AG	37	#include <linux/mfd/mc13892.h>
c8349fb4 AG	38	#include <linux/regulator/machine.h>
d17e1c1a	39
aefa1c6e FE	40	#include <asm/mach-types.h>
	41	#include <asm/mach/arch.h>
	42	#include <asm/mach/time.h>
	43	#include <asm/mach/map.h>
25af2d9f	44	#include <asm/memblock.h>
aefa1c6e	45
881e09f8	46	#include <video/platform_lcd.h>
aefa1c6e	47
25af2d9f AG	48	#include <media/soc_camera.h>
25af2d9f AG	49
3ed0bcb4	50	#include "3ds_debugboard.h"
e3372474	51	#include "common.h"
6eafde5f	52	#include "devices-imx35.h"
50f2de61	53	#include "hardware.h"
267dd34c	54	#include "iomux-mx35.h"
aefa1c6e	55
881e09f8	56	#define GPIO_MC9S08DZ60_GPS_ENABLE 0
	57	#define GPIO_MC9S08DZ60_HDD_ENABLE 4
	58	#define GPIO_MC9S08DZ60_WIFI_ENABLE 5
	59	#define GPIO_MC9S08DZ60_LCD_ENABLE 6
	60	#define GPIO_MC9S08DZ60_SPEAKER_ENABLE 8
	61
	62	static const struct fb_videomode fb_modedb[] = {
	63	{
	64	/* 800x480 @ 55 Hz */
	65	.name = "Ceramate-CLAA070VC01",
	66	.refresh = 55,
	67	.xres = 800,
	68	.yres = 480,
	69	.pixclock = 40000,
	70	.left_margin = 40,
	71	.right_margin = 40,
	72	.upper_margin = 5,
	73	.lower_margin = 5,
	74	.hsync_len = 20,
	75	.vsync_len = 10,
	76	.sync = FB_SYNC_OE_ACT_HIGH,
	77	.vmode = FB_VMODE_NONINTERLACED,
	78	.flag = 0,
	79	},
	80	};
	81
881e09f8	82	static struct mx3fb_platform_data mx3fb_pdata __initdata = {
	83	.name = "Ceramate-CLAA070VC01",
	84	.mode = fb_modedb,
	85	.num_modes = ARRAY_SIZE(fb_modedb),
	86	};
	87
	88	static struct i2c_board_info __initdata i2c_devices_3ds[] = {
	89	{
	90	I2C_BOARD_INFO("mc9s08dz60", 0x69),
	91	},
	92	};
	93
	94	static int lcd_power_gpio = -ENXIO;
	95
3d0f7cf0	96	static int mc9s08dz60_gpiochip_match(struct gpio_chip chip, void data)
881e09f8	97	{
	98	return !strcmp(chip->label, data);
	99	}
	100
	101	static void mx35_3ds_lcd_set_power(
	102	struct plat_lcd_data *pd, unsigned int power)
	103	{
	104	struct gpio_chip *chip;
	105
	106	if (!gpio_is_valid(lcd_power_gpio)) {
	107	chip = gpiochip_find(
	108	"mc9s08dz60", mc9s08dz60_gpiochip_match);
	109	if (chip) {
	110	lcd_power_gpio =
	111	chip->base + GPIO_MC9S08DZ60_LCD_ENABLE;
	112	if (gpio_request(lcd_power_gpio, "lcd_power") < 0) {
	113	pr_err("error: gpio already requested!\n");
	114	lcd_power_gpio = -ENXIO;
	115	}
	116	} else {
	117	pr_err("error: didn't find mc9s08dz60 gpio chip\n");
	118	}
	119	}
	120
	121	if (gpio_is_valid(lcd_power_gpio))
	122	gpio_set_value_cansleep(lcd_power_gpio, power);
	123	}
	124
	125	static struct plat_lcd_data mx35_3ds_lcd_data = {
	126	.set_power = mx35_3ds_lcd_set_power,
	127	};
	128
	129	static struct platform_device mx35_3ds_lcd = {
	130	.name = "platform-lcd",
	131	.dev.platform_data = &mx35_3ds_lcd_data,
	132	};
	133
6eafde5f	134	static const struct imxuart_platform_data uart_pdata __initconst = {
aefa1c6e FE	135	.flags = IMXUART_HAVE_RTSCTS,
	136	};
	137
d17e1c1a MKB	138	static struct physmap_flash_data mx35pdk_flash_data = {
	139	.width = 2,
	140	};
	141
	142	static struct resource mx35pdk_flash_resource = {
	143	.start = MX35_CS0_BASE_ADDR,
	144	.end = MX35_CS0_BASE_ADDR + SZ_64M - 1,
	145	.flags = IORESOURCE_MEM,
	146	};
	147
	148	static struct platform_device mx35pdk_flash = {
	149	.name = "physmap-flash",
	150	.id = 0,
	151	.dev = {
	152	.platform_data = &mx35pdk_flash_data,
	153	},
	154	.resource = &mx35pdk_flash_resource,
	155	.num_resources = 1,
	156	};
	157
81aa1720 MKB	158	static const struct mxc_nand_platform_data mx35pdk_nand_board_info __initconst = {
	159	.width = 1,
	160	.hw_ecc = 1,
	161	.flash_bbt = 1,
	162	};
	163
aefa1c6e	164	static struct platform_device *devices[] __initdata = {
d17e1c1a	165	&mx35pdk_flash,
aefa1c6e FE	166	};
aefa1c6e FE	167
8f5260c8	168	static iomux_v3_cfg_t mx35pdk_pads[] = {
aefa1c6e FE	169	/* UART1 */
	170	MX35_PAD_CTS1__UART1_CTS,
	171	MX35_PAD_RTS1__UART1_RTS,
	172	MX35_PAD_TXD1__UART1_TXD_MUX,
	173	MX35_PAD_RXD1__UART1_RXD_MUX,
	174	/* FEC */
	175	MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
	176	MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
	177	MX35_PAD_FEC_RX_DV__FEC_RX_DV,
	178	MX35_PAD_FEC_COL__FEC_COL,
	179	MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
	180	MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
	181	MX35_PAD_FEC_TX_EN__FEC_TX_EN,
	182	MX35_PAD_FEC_MDC__FEC_MDC,
	183	MX35_PAD_FEC_MDIO__FEC_MDIO,
	184	MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
	185	MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
	186	MX35_PAD_FEC_CRS__FEC_CRS,
	187	MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
	188	MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
	189	MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
	190	MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
	191	MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
	192	MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
9c2daf15 HH	193	/* USBOTG */
	194	MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR,
	195	MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC,
ab3d8b58 MKB	196	/* USBH1 */
	197	MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
	198	MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
6207c833 SG	199	/* SDCARD */
	200	MX35_PAD_SD1_CMD__ESDHC1_CMD,
	201	MX35_PAD_SD1_CLK__ESDHC1_CLK,
	202	MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
	203	MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
	204	MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
	205	MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
352cd9a0 FE	206	/* I2C1 */
	207	MX35_PAD_I2C1_CLK__I2C1_SCL,
	208	MX35_PAD_I2C1_DAT__I2C1_SDA,
881e09f8	209	/* Display */
	210	MX35_PAD_LD0__IPU_DISPB_DAT_0,
	211	MX35_PAD_LD1__IPU_DISPB_DAT_1,
	212	MX35_PAD_LD2__IPU_DISPB_DAT_2,
	213	MX35_PAD_LD3__IPU_DISPB_DAT_3,
	214	MX35_PAD_LD4__IPU_DISPB_DAT_4,
	215	MX35_PAD_LD5__IPU_DISPB_DAT_5,
	216	MX35_PAD_LD6__IPU_DISPB_DAT_6,
	217	MX35_PAD_LD7__IPU_DISPB_DAT_7,
	218	MX35_PAD_LD8__IPU_DISPB_DAT_8,
	219	MX35_PAD_LD9__IPU_DISPB_DAT_9,
	220	MX35_PAD_LD10__IPU_DISPB_DAT_10,
	221	MX35_PAD_LD11__IPU_DISPB_DAT_11,
	222	MX35_PAD_LD12__IPU_DISPB_DAT_12,
	223	MX35_PAD_LD13__IPU_DISPB_DAT_13,
	224	MX35_PAD_LD14__IPU_DISPB_DAT_14,
	225	MX35_PAD_LD15__IPU_DISPB_DAT_15,
	226	MX35_PAD_LD16__IPU_DISPB_DAT_16,
	227	MX35_PAD_LD17__IPU_DISPB_DAT_17,
	228	MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
	229	MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
	230	MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
	231	MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
	232	MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
	233	MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
	234	MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
25af2d9f AG	235	/* CSI */
	236	MX35_PAD_TX1__IPU_CSI_D_6,
	237	MX35_PAD_TX0__IPU_CSI_D_7,
	238	MX35_PAD_CSI_D8__IPU_CSI_D_8,
	239	MX35_PAD_CSI_D9__IPU_CSI_D_9,
	240	MX35_PAD_CSI_D10__IPU_CSI_D_10,
	241	MX35_PAD_CSI_D11__IPU_CSI_D_11,
	242	MX35_PAD_CSI_D12__IPU_CSI_D_12,
	243	MX35_PAD_CSI_D13__IPU_CSI_D_13,
	244	MX35_PAD_CSI_D14__IPU_CSI_D_14,
	245	MX35_PAD_CSI_D15__IPU_CSI_D_15,
	246	MX35_PAD_CSI_HSYNC__IPU_CSI_HSYNC,
	247	MX35_PAD_CSI_MCLK__IPU_CSI_MCLK,
	248	MX35_PAD_CSI_PIXCLK__IPU_CSI_PIXCLK,
	249	MX35_PAD_CSI_VSYNC__IPU_CSI_VSYNC,
c8349fb4 AG	250	/PMIC IRQ/
c8349fb4 AG	251	MX35_PAD_GPIO2_0__GPIO2_0,
25af2d9f AG	252	};
	253
	254	/*
	255	* Camera support
	256	*/
	257	static phys_addr_t mx3_camera_base __initdata;
	258	#define MX35_3DS_CAMERA_BUF_SIZE SZ_8M
	259
	260	static const struct mx3_camera_pdata mx35_3ds_camera_pdata __initconst = {
	261	.flags = MX3_CAMERA_DATAWIDTH_8,
	262	.mclk_10khz = 2000,
	263	};
	264
	265	static int __init imx35_3ds_init_camera(void)
	266	{
	267	int dma, ret = -ENOMEM;
	268	struct platform_device *pdev =
	269	imx35_alloc_mx3_camera(&mx35_3ds_camera_pdata);
	270
	271	if (IS_ERR(pdev))
	272	return PTR_ERR(pdev);
	273
	274	if (!mx3_camera_base)
	275	goto err;
	276
	277	dma = dma_declare_coherent_memory(&pdev->dev,
	278	mx3_camera_base, mx3_camera_base,
	279	MX35_3DS_CAMERA_BUF_SIZE,
	280	DMA_MEMORY_MAP \| DMA_MEMORY_EXCLUSIVE);
	281
	282	if (!(dma & DMA_MEMORY_MAP))
	283	goto err;
	284
	285	ret = platform_device_add(pdev);
	286	if (ret)
	287	err:
	288	platform_device_put(pdev);
	289
	290	return ret;
	291	}
	292
25af2d9f AG	293	static struct i2c_board_info mx35_3ds_i2c_camera = {
	294	I2C_BOARD_INFO("ov2640", 0x30),
	295	};
	296
	297	static struct soc_camera_link iclink_ov2640 = {
	298	.bus_id = 0,
	299	.board_info = &mx35_3ds_i2c_camera,
	300	.i2c_adapter_id = 0,
	301	.power = NULL,
	302	};
	303
	304	static struct platform_device mx35_3ds_ov2640 = {
	305	.name = "soc-camera-pdrv",
	306	.id = 0,
	307	.dev = {
	308	.platform_data = &iclink_ov2640,
	309	},
9c2daf15 HH	310	};
9c2daf15 HH	311
c8349fb4 AG	312	static struct regulator_consumer_supply sw1_consumers[] = {
	313	{
	314	.supply = "cpu_vcc",
	315	}
	316	};
	317
	318	static struct regulator_consumer_supply vcam_consumers[] = {
	319	/* sgtl5000 */
	320	REGULATOR_SUPPLY("VDDA", "0-000a"),
	321	};
	322
	323	static struct regulator_consumer_supply vaudio_consumers[] = {
	324	REGULATOR_SUPPLY("cmos_vio", "soc-camera-pdrv.0"),
	325	};
	326
	327	static struct regulator_init_data sw1_init = {
	328	.constraints = {
	329	.name = "SW1",
	330	.min_uV = 600000,
	331	.max_uV = 1375000,
	332	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	333	.valid_modes_mask = 0,
	334	.always_on = 1,
	335	.boot_on = 1,
	336	},
	337	.num_consumer_supplies = ARRAY_SIZE(sw1_consumers),
	338	.consumer_supplies = sw1_consumers,
	339	};
	340
	341	static struct regulator_init_data sw2_init = {
	342	.constraints = {
	343	.name = "SW2",
	344	.always_on = 1,
	345	.boot_on = 1,
	346	}
	347	};
	348
	349	static struct regulator_init_data sw3_init = {
	350	.constraints = {
	351	.name = "SW3",
	352	.always_on = 1,
	353	.boot_on = 1,
	354	}
	355	};
	356
	357	static struct regulator_init_data sw4_init = {
	358	.constraints = {
	359	.name = "SW4",
	360	.always_on = 1,
	361	.boot_on = 1,
	362	}
	363	};
	364
	365	static struct regulator_init_data viohi_init = {
	366	.constraints = {
	367	.name = "VIOHI",
	368	.boot_on = 1,
	369	}
	370	};
	371
	372	static struct regulator_init_data vusb_init = {
	373	.constraints = {
	374	.name = "VUSB",
	375	.boot_on = 1,
376	}
377	};
378
379	static struct regulator_init_data vdig_init = {
380	.constraints = {
381	.name = "VDIG",
382	.boot_on = 1,
383	}
384	};
385
386	static struct regulator_init_data vpll_init = {
387	.constraints = {
388	.name = "VPLL",
389	.boot_on = 1,
390	}
391	};
392
393	static struct regulator_init_data vusb2_init = {
394	.constraints = {
395	.name = "VUSB2",
396	.boot_on = 1,
397	}
398	};
399
400	static struct regulator_init_data vvideo_init = {
401	.constraints = {
402	.name = "VVIDEO",
403	.boot_on = 1
404	}
405	};
406
407	static struct regulator_init_data vaudio_init = {
408	.constraints = {
409	.name = "VAUDIO",
410	.min_uV = 2300000,
411	.max_uV = 3000000,
412	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
413	.boot_on = 1
414	},
415	.num_consumer_supplies = ARRAY_SIZE(vaudio_consumers),
416	.consumer_supplies = vaudio_consumers,
417	};
418
419	static struct regulator_init_data vcam_init = {
420	.constraints = {
421	.name = "VCAM",
422	.min_uV = 2500000,
423	.max_uV = 3000000,
424	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE \|
425	REGULATOR_CHANGE_MODE,
426	.valid_modes_mask = REGULATOR_MODE_FAST \| REGULATOR_MODE_NORMAL,
427	.boot_on = 1
428	},
429	.num_consumer_supplies = ARRAY_SIZE(vcam_consumers),
430	.consumer_supplies = vcam_consumers,
431	};
432
433	static struct regulator_init_data vgen1_init = {
434	.constraints = {
435	.name = "VGEN1",
436	}
437	};
438
439	static struct regulator_init_data vgen2_init = {
440	.constraints = {
441	.name = "VGEN2",
442	.boot_on = 1,
443	}
444	};
445
446	static struct regulator_init_data vgen3_init = {
447	.constraints = {
448	.name = "VGEN3",
449	}
450	};
451
452	static struct mc13xxx_regulator_init_data mx35_3ds_regulators[] = {
453	{ .id = MC13892_SW1, .init_data = &sw1_init },
454	{ .id = MC13892_SW2, .init_data = &sw2_init },
455	{ .id = MC13892_SW3, .init_data = &sw3_init },
456	{ .id = MC13892_SW4, .init_data = &sw4_init },
457	{ .id = MC13892_VIOHI, .init_data = &viohi_init },
458	{ .id = MC13892_VPLL, .init_data = &vpll_init },
459	{ .id = MC13892_VDIG, .init_data = &vdig_init },
460	{ .id = MC13892_VUSB2, .init_data = &vusb2_init },
461	{ .id = MC13892_VVIDEO, .init_data = &vvideo_init },
462	{ .id = MC13892_VAUDIO, .init_data = &vaudio_init },
463	{ .id = MC13892_VCAM, .init_data = &vcam_init },
464	{ .id = MC13892_VGEN1, .init_data = &vgen1_init },
465	{ .id = MC13892_VGEN2, .init_data = &vgen2_init },
466	{ .id = MC13892_VGEN3, .init_data = &vgen3_init },
467	{ .id = MC13892_VUSB, .init_data = &vusb_init },
468	};
469
470	static struct mc13xxx_platform_data mx35_3ds_mc13892_data = {
471	.flags = MC13XXX_USE_RTC \| MC13XXX_USE_TOUCHSCREEN,
472	.regulators = {
473	.num_regulators = ARRAY_SIZE(mx35_3ds_regulators),
474	.regulators = mx35_3ds_regulators,
475	},
476	};
477
478	#define GPIO_PMIC_INT IMX_GPIO_NR(2, 0)
479
480	static struct i2c_board_info mx35_3ds_i2c_mc13892 = {
481
482	I2C_BOARD_INFO("mc13892", 0x08),
483	.platform_data = &mx35_3ds_mc13892_data,
84715dd6	484	/* irq number is run-time assigned */
c8349fb4 AG	485	};
	486
	487	static void __init imx35_3ds_init_mc13892(void)
	488	{
	489	int ret = gpio_request_one(GPIO_PMIC_INT, GPIOF_DIR_IN, "pmic irq");
	490
	491	if (ret) {
	492	pr_err("failed to get pmic irq: %d\n", ret);
	493	return;
	494	}
	495
84715dd6	496	mx35_3ds_i2c_mc13892.irq = gpio_to_irq(GPIO_PMIC_INT);
c8349fb4 AG	497	i2c_register_board_info(0, &mx35_3ds_i2c_mc13892, 1);
	498	}
	499
4bd597b6 SH	500	static int mx35_3ds_otg_init(struct platform_device *pdev)
	501	{
	502	return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
	503	}
	504
9c2daf15	505	/* OTG config */
9e1dde33	506	static const struct fsl_usb2_platform_data usb_otg_pdata __initconst = {
9c2daf15 HH	507	.operating_mode = FSL_USB2_DR_DEVICE,
9c2daf15 HH	508	.phy_mode = FSL_USB2_PHY_UTMI_WIDE,
1a46cce8 FE	509	.workaround = FLS_USB2_WORKAROUND_ENGCM09152,
	510	/*
	511	* ENGCM09152 also requires a hardware change.
	512	* Please check the MX35 Chip Errata document for details.
	513	*/
aefa1c6e FE	514	};
aefa1c6e FE	515
130a0dda	516	static struct mxc_usbh_platform_data otg_pdata __initdata = {
4bd597b6	517	.init = mx35_3ds_otg_init,
130a0dda	518	.portsc = MXC_EHCI_MODE_UTMI,
130a0dda FE	519	};
130a0dda FE	520
4bd597b6 SH	521	static int mx35_3ds_usbh_init(struct platform_device *pdev)
	522	{
	523	return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_SINGLE_UNI \|
	524	MXC_EHCI_INTERNAL_PHY);
	525	}
	526
ab3d8b58	527	/* USB HOST config */
2d58de28	528	static const struct mxc_usbh_platform_data usb_host_pdata __initconst = {
4bd597b6	529	.init = mx35_3ds_usbh_init,
ab3d8b58	530	.portsc = MXC_EHCI_MODE_SERIAL,
ab3d8b58 MKB	531	};
ab3d8b58 MKB	532
33a264dd	533	static bool otg_mode_host __initdata;
130a0dda FE	534
	535	static int __init mx35_3ds_otg_mode(char *options)
	536	{
	537	if (!strcmp(options, "host"))
33a264dd	538	otg_mode_host = true;
130a0dda	539	else if (!strcmp(options, "device"))
33a264dd	540	otg_mode_host = false;
130a0dda FE	541	else
	542	pr_info("otg_mode neither \"host\" nor \"device\". "
	543	"Defaulting to device\n");
33a264dd	544	return 1;
130a0dda FE	545	}
	546	__setup("otg_mode=", mx35_3ds_otg_mode);
	547
352cd9a0 FE	548	static const struct imxi2c_platform_data mx35_3ds_i2c0_data __initconst = {
	549	.bitrate = 100000,
	550	};
	551
aefa1c6e FE	552	/*
	553	* Board specific initialization.
	554	*/
e134fb2b	555	static void __init mx35_3ds_init(void)
aefa1c6e	556	{
881e09f8	557	struct platform_device *imx35_fb_pdev;
881e09f8	558
b78d8e59 SG	559	imx35_soc_init();
b78d8e59 SG	560
aefa1c6e FE	561	mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads));
aefa1c6e FE	562
6bd96f3c	563	imx35_add_fec(NULL);
bec31a85	564	imx35_add_imx2_wdt();
c6fd6d11	565	imx35_add_mxc_rtc();
aefa1c6e FE	566	platform_add_devices(devices, ARRAY_SIZE(devices));
aefa1c6e FE	567
6eafde5f	568	imx35_add_imx_uart0(&uart_pdata);
9c2daf15	569
130a0dda FE	570	if (otg_mode_host)
130a0dda FE	571	imx35_add_mxc_ehci_otg(&otg_pdata);
81aa1720	572
2d58de28	573	imx35_add_mxc_ehci_hs(&usb_host_pdata);
ab3d8b58	574
130a0dda FE	575	if (!otg_mode_host)
	576	imx35_add_fsl_usb2_udc(&usb_otg_pdata);
	577
81aa1720	578	imx35_add_mxc_nand(&mx35pdk_nand_board_info);
124bf94a	579	imx35_add_sdhci_esdhc_imx(0, NULL);
2c6605de	580
ed4a7fb0	581	if (mxc_expio_init(MX35_CS5_BASE_ADDR, IMX_GPIO_NR(1, 1)))
2c6605de XJ	582	pr_warn("Init of the debugboard failed, all "
2c6605de XJ	583	"devices on the debugboard are unusable.\n");
352cd9a0	584	imx35_add_imx_i2c0(&mx35_3ds_i2c0_data);
881e09f8	585
	586	i2c_register_board_info(
	587	0, i2c_devices_3ds, ARRAY_SIZE(i2c_devices_3ds));
	588
88289c80	589	imx35_add_ipu_core();
25af2d9f AG	590	platform_device_register(&mx35_3ds_ov2640);
	591	imx35_3ds_init_camera();
	592
881e09f8	593	imx35_fb_pdev = imx35_add_mx3_sdc_fb(&mx3fb_pdata);
	594	mx35_3ds_lcd.dev.parent = &imx35_fb_pdev->dev;
	595	platform_device_register(&mx35_3ds_lcd);
c8349fb4 AG	596
c8349fb4 AG	597	imx35_3ds_init_mc13892();
aefa1c6e FE	598	}
	599
	600	static void __init mx35pdk_timer_init(void)
	601	{
	602	mx35_clocks_init();
	603	}
	604
7bf1c875	605	static struct sys_timer mx35pdk_timer = {
aefa1c6e FE	606	.init = mx35pdk_timer_init,
	607	};
	608
25af2d9f AG	609	static void __init mx35_3ds_reserve(void)
	610	{
	611	/* reserve MX35_3DS_CAMERA_BUF_SIZE bytes for mx3-camera */
	612	mx3_camera_base = arm_memblock_steal(MX35_3DS_CAMERA_BUF_SIZE,
	613	MX35_3DS_CAMERA_BUF_SIZE);
	614	}
	615
aefa1c6e FE	616	MACHINE_START(MX35_3DS, "Freescale MX35PDK")
aefa1c6e FE	617	/* Maintainer: Freescale Semiconductor, Inc */
dc8f1907	618	.atag_offset = 0x100,
97976e22 UKK	619	.map_io = mx35_map_io,
	620	.init_early = imx35_init_early,
	621	.init_irq = mx35_init_irq,
ffa2ea3f	622	.handle_irq = imx35_handle_irq,
97976e22	623	.timer = &mx35pdk_timer,
e134fb2b	624	.init_machine = mx35_3ds_init,
25af2d9f	625	.reserve = mx35_3ds_reserve,
65ea7884	626	.restart = mxc_restart,
aefa1c6e	627	MACHINE_END