[deliverable/linux.git] / arch / arm / mach-imx / mx31moboard-devboard.c

/*
 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/types.h>

#include <linux/usb/otg.h>

#include "common.h"
#include "devices-imx31.h"
#include "hardware.h"
#include "iomux-mx3.h"
#include "ulpi.h"

static unsigned int devboard_pins[] = {
	/* UART1 */
	MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
	MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
	/* SDHC2 */
	MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
	MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
	MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
	MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
	/* USB H1 */
	MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
	MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
	MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
	MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
	MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
	/* SEL */
	MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
	MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)

static int devboard_sdhc2_get_ro(struct device *dev)
{
	return !gpio_get_value(SDHC2_WP);
}

static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
		void *data)
{
	int ret;

	ret = gpio_request(SDHC2_CD, "sdhc-detect");
	if (ret)
		return ret;

	gpio_direction_input(SDHC2_CD);

	ret = gpio_request(SDHC2_WP, "sdhc-wp");
	if (ret)
		goto err_gpio_free;
	gpio_direction_input(SDHC2_WP);

	ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
		IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
		"sdhc2-card-detect", data);
	if (ret)
		goto err_gpio_free_2;

	return 0;

err_gpio_free_2:
	gpio_free(SDHC2_WP);
err_gpio_free:
	gpio_free(SDHC2_CD);

	return ret;
}

static void devboard_sdhc2_exit(struct device *dev, void *data)
{
	free_irq(gpio_to_irq(SDHC2_CD), data);
	gpio_free(SDHC2_WP);
	gpio_free(SDHC2_CD);
}

static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
	.get_ro	= devboard_sdhc2_get_ro,
	.init	= devboard_sdhc2_init,
	.exit	= devboard_sdhc2_exit,
};

#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)

static void devboard_init_sel_gpios(void)
{
	if (!gpio_request(SEL0, "sel0")) {
		gpio_direction_input(SEL0);
		gpio_export(SEL0, true);
	}

	if (!gpio_request(SEL1, "sel1")) {
		gpio_direction_input(SEL1);
		gpio_export(SEL1, true);
	}

	if (!gpio_request(SEL2, "sel2")) {
		gpio_direction_input(SEL2);
		gpio_export(SEL2, true);
	}

	if (!gpio_request(SEL3, "sel3")) {
		gpio_direction_input(SEL3);
		gpio_export(SEL3, true);
	}
}
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
			PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)

static int devboard_usbh1_hw_init(struct platform_device *pdev)
{
	mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);

	mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);

	mdelay(10);

	return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
			MXC_EHCI_INTERFACE_SINGLE_UNI);
}

#define USBH1_VBUSEN_B	IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
#define USBH1_MODE	IOMUX_TO_GPIO(MX31_PIN_NFALE)

static int devboard_isp1105_init(struct usb_phy *otg)
{
	int ret = gpio_request(USBH1_MODE, "usbh1-mode");
	if (ret)
		return ret;
	/* single ended */
	gpio_direction_output(USBH1_MODE, 0);

	ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
	if (ret) {
		gpio_free(USBH1_MODE);
		return ret;
	}
	gpio_direction_output(USBH1_VBUSEN_B, 1);

	return 0;
}


static int devboard_isp1105_set_vbus(struct usb_otg *otg, bool on)
{
	if (on)
		gpio_set_value(USBH1_VBUSEN_B, 0);
	else
		gpio_set_value(USBH1_VBUSEN_B, 1);

	return 0;
}

static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
	.init	= devboard_usbh1_hw_init,
	.portsc	= MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
};

static int __init devboard_usbh1_init(void)
{
	struct usb_phy *phy;
	struct platform_device *pdev;

	phy = kzalloc(sizeof(*phy), GFP_KERNEL);
	if (!phy)
		return -ENOMEM;

	phy->otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
	if (!phy->otg) {
		kfree(phy);
		return -ENOMEM;
	}

	phy->label	= "ISP1105";
	phy->init	= devboard_isp1105_init;
	phy->otg->set_vbus	= devboard_isp1105_set_vbus;

	usbh1_pdata.otg = phy;

	pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
	if (IS_ERR(pdev))
		return PTR_ERR(pdev);

	return 0;
}


static const struct fsl_usb2_platform_data usb_pdata __initconst = {
	.operating_mode	= FSL_USB2_DR_DEVICE,
	.phy_mode	= FSL_USB2_PHY_ULPI,
};

/*
 * system init for baseboard usage. Will be called by mx31moboard init.
 */
void __init mx31moboard_devboard_init(void)
{
	printk(KERN_INFO "Initializing mx31devboard peripherals\n");

	mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
		"devboard");

	imx31_add_imx_uart1(&uart_pdata);

	imx31_add_mxc_mmc(1, &sdhc2_pdata);

	devboard_init_sel_gpios();

	imx31_add_fsl_usb2_udc(&usb_pdata);

	devboard_usbh1_init();
}
Commit	Line	Data
e00f0b4a VL	1	/*
	2	* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
e00f0b4a VL	13	*/
e00f0b4a VL	14
45b131a7	15	#include <linux/gpio.h>
e00f0b4a	16	#include <linux/init.h>
45b131a7	17	#include <linux/interrupt.h>
4bd597b6	18	#include <linux/delay.h>
e00f0b4a	19	#include <linux/platform_device.h>
5a0e3ad6	20	#include <linux/slab.h>
220bbcea	21	#include <linux/types.h>
e00f0b4a	22
d67d1075 VL	23	#include <linux/usb/otg.h>
d67d1075 VL	24
e3372474	25	#include "common.h"
16cf5c41	26	#include "devices-imx31.h"
50f2de61	27	#include "hardware.h"
267dd34c	28	#include "iomux-mx3.h"
39ef6340	29	#include "ulpi.h"
e00f0b4a	30
220bbcea VL	31	static unsigned int devboard_pins[] = {
220bbcea VL	32	/* UART1 */
e00f0b4a VL	33	MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
e00f0b4a VL	34	MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
56c7a45b VL	35	/* SDHC2 */
	36	MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
	37	MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
	38	MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
	39	MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
d67d1075 VL	40	/* USB H1 */
	41	MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
	42	MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
	43	MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
	44	MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
	45	MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
e335c75c VL	46	/* SEL */
	47	MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
	48	MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
e00f0b4a VL	49	};
e00f0b4a VL	50
16cf5c41	51	static const struct imxuart_platform_data uart_pdata __initconst = {
220bbcea VL	52	.flags = IMXUART_HAVE_RTSCTS,
	53	};
	54
45b131a7 VL	55	#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
	56	#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
	57
	58	static int devboard_sdhc2_get_ro(struct device *dev)
	59	{
563abb4b	60	return !gpio_get_value(SDHC2_WP);
45b131a7 VL	61	}
	62
	63	static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
	64	void *data)
	65	{
4f163eb8 SH	66	int ret;
	67
	68	ret = gpio_request(SDHC2_CD, "sdhc-detect");
	69	if (ret)
	70	return ret;
	71
	72	gpio_direction_input(SDHC2_CD);
	73
	74	ret = gpio_request(SDHC2_WP, "sdhc-wp");
	75	if (ret)
	76	goto err_gpio_free;
	77	gpio_direction_input(SDHC2_WP);
	78
	79	ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
45b131a7 VL	80	IRQF_TRIGGER_RISING \| IRQF_TRIGGER_FALLING,
45b131a7 VL	81	"sdhc2-card-detect", data);
4f163eb8 SH	82	if (ret)
	83	goto err_gpio_free_2;
	84
	85	return 0;
	86
	87	err_gpio_free_2:
	88	gpio_free(SDHC2_WP);
	89	err_gpio_free:
	90	gpio_free(SDHC2_CD);
	91
	92	return ret;
45b131a7 VL	93	}
	94
	95	static void devboard_sdhc2_exit(struct device dev, void data)
	96	{
	97	free_irq(gpio_to_irq(SDHC2_CD), data);
4f163eb8 SH	98	gpio_free(SDHC2_WP);
4f163eb8 SH	99	gpio_free(SDHC2_CD);
45b131a7 VL	100	}
45b131a7 VL	101
6a697e3d	102	static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
45b131a7 VL	103	.get_ro = devboard_sdhc2_get_ro,
	104	.init = devboard_sdhc2_init,
	105	.exit = devboard_sdhc2_exit,
	106	};
	107
e335c75c VL	108	#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
	109	#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
	110	#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
	111	#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
	112
	113	static void devboard_init_sel_gpios(void)
	114	{
	115	if (!gpio_request(SEL0, "sel0")) {
	116	gpio_direction_input(SEL0);
	117	gpio_export(SEL0, true);
	118	}
	119
	120	if (!gpio_request(SEL1, "sel1")) {
	121	gpio_direction_input(SEL1);
	122	gpio_export(SEL1, true);
	123	}
	124
	125	if (!gpio_request(SEL2, "sel2")) {
	126	gpio_direction_input(SEL2);
	127	gpio_export(SEL2, true);
	128	}
	129
	130	if (!gpio_request(SEL3, "sel3")) {
	131	gpio_direction_input(SEL3);
	132	gpio_export(SEL3, true);
	133	}
	134	}
d67d1075 VL	135	#define USB_PAD_CFG (PAD_CTL_DRV_MAX \| PAD_CTL_SRE_FAST \| PAD_CTL_HYS_CMOS \| \
	136	PAD_CTL_ODE_CMOS \| PAD_CTL_100K_PU)
	137
	138	static int devboard_usbh1_hw_init(struct platform_device *pdev)
	139	{
	140	mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
	141
	142	mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
	143	mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
	144	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
	145	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
	146	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
	147	mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
	148	mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
	149	mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
	150
4bd597b6 SH	151	mdelay(10);
	152
	153	return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED \|
	154	MXC_EHCI_INTERFACE_SINGLE_UNI);
d67d1075 VL	155	}
	156
	157	#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
	158	#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
	159
86753811	160	static int devboard_isp1105_init(struct usb_phy *otg)
d67d1075 VL	161	{
	162	int ret = gpio_request(USBH1_MODE, "usbh1-mode");
	163	if (ret)
	164	return ret;
	165	/* single ended */
	166	gpio_direction_output(USBH1_MODE, 0);
	167
	168	ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
	169	if (ret) {
	170	gpio_free(USBH1_MODE);
	171	return ret;
	172	}
	173	gpio_direction_output(USBH1_VBUSEN_B, 1);
	174
	175	return 0;
	176	}
	177
	178
76eb57ec	179	static int devboard_isp1105_set_vbus(struct usb_otg *otg, bool on)
d67d1075 VL	180	{
	181	if (on)
	182	gpio_set_value(USBH1_VBUSEN_B, 0);
	183	else
	184	gpio_set_value(USBH1_VBUSEN_B, 1);
	185
	186	return 0;
	187	}
	188
2d58de28	189	static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
d67d1075 VL	190	.init = devboard_usbh1_hw_init,
d67d1075 VL	191	.portsc = MXC_EHCI_MODE_UTMI \| MXC_EHCI_SERIAL,
d67d1075 VL	192	};
	193
	194	static int __init devboard_usbh1_init(void)
	195	{
76eb57ec	196	struct usb_phy *phy;
2d58de28	197	struct platform_device *pdev;
d67d1075	198
76eb57ec HK	199	phy = kzalloc(sizeof(*phy), GFP_KERNEL);
76eb57ec HK	200	if (!phy)
d67d1075 VL	201	return -ENOMEM;
d67d1075 VL	202
76eb57ec HK	203	phy->otg = kzalloc(sizeof(struct usb_otg), GFP_KERNEL);
	204	if (!phy->otg) {
	205	kfree(phy);
	206	return -ENOMEM;
	207	}
	208
	209	phy->label = "ISP1105";
	210	phy->init = devboard_isp1105_init;
	211	phy->otg->set_vbus = devboard_isp1105_set_vbus;
d67d1075	212
76eb57ec	213	usbh1_pdata.otg = phy;
d67d1075	214
2d58de28 UKK	215	pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
	216	if (IS_ERR(pdev))
	217	return PTR_ERR(pdev);
	218
	219	return 0;
d67d1075 VL	220	}
d67d1075 VL	221
66c202ad	222
9e1dde33	223	static const struct fsl_usb2_platform_data usb_pdata __initconst = {
66c202ad PR	224	.operating_mode = FSL_USB2_DR_DEVICE,
	225	.phy_mode = FSL_USB2_PHY_ULPI,
	226	};
	227
e00f0b4a VL	228	/*
	229	* system init for baseboard usage. Will be called by mx31moboard init.
	230	*/
	231	void __init mx31moboard_devboard_init(void)
	232	{
	233	printk(KERN_INFO "Initializing mx31devboard peripherals\n");
220bbcea VL	234
	235	mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
	236	"devboard");
	237
16cf5c41	238	imx31_add_imx_uart1(&uart_pdata);
45b131a7	239
6a697e3d	240	imx31_add_mxc_mmc(1, &sdhc2_pdata);
d67d1075	241
e335c75c VL	242	devboard_init_sel_gpios();
e335c75c VL	243
9e1dde33	244	imx31_add_fsl_usb2_udc(&usb_pdata);
66c202ad	245
d67d1075	246	devboard_usbh1_init();
e00f0b4a	247	}