projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| eea643f7 JB |
1 | /* |
| 2 | * Copyright (C) 1999 ARM Limited | |
| 3 | * Copyright (C) 2000 Deep Blue Solutions Ltd | |
| 4 | * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved. | |
| 5 | * Copyright 2008 Juergen Beisert, kernel@pengutronix.de | |
| 74bef9a4 | 6 | * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com |
| eea643f7 JB |
7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License as published by | |
| 10 | * the Free Software Foundation; either version 2 of the License, or | |
| 11 | * (at your option) any later version. | |
| 12 | * | |
| 13 | * This program is distributed in the hope that it will be useful, | |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | * GNU General Public License for more details. | |
| eea643f7 JB |
17 | */ |
| 18 | ||
| 19 | #include <linux/kernel.h> | |
| 20 | #include <linux/clk.h> | |
| 21 | #include <linux/io.h> | |
| 74bef9a4 IY |
22 | #include <linux/err.h> |
| 23 | #include <linux/delay.h> | |
| eea643f7 | 24 | |
| 9f97da78 | 25 | #include <asm/system_misc.h> |
| eea643f7 | 26 | #include <asm/proc-fns.h> |
| c2932bf4 | 27 | #include <asm/mach-types.h> |
| eea643f7 | 28 | |
| e3372474 | 29 | #include "common.h" |
| 50f2de61 | 30 | #include "hardware.h" |
| e3372474 | 31 | |
| be124c94 | 32 | static void __iomem *wdog_base; |
| eea643f7 JB |
33 | |
| 34 | /* | |
| 35 | * Reset the system. It is called by machine_restart(). | |
| 36 | */ | |
| 65ea7884 | 37 | void mxc_restart(char mode, const char *cmd) |
| eea643f7 | 38 | { |
| be124c94 SH |
39 | unsigned int wcr_enable; |
| 40 | ||
| 41 | if (cpu_is_mx1()) { | |
| 42 | wcr_enable = (1 << 0); | |
| 43 | } else { | |
| 74bef9a4 | 44 | struct clk *clk; |
| eea643f7 | 45 | |
| 2c1f4672 | 46 | clk = clk_get_sys("imx2-wdt.0", NULL); |
| 74bef9a4 | 47 | if (!IS_ERR(clk)) |
| bcab5010 | 48 | clk_prepare_enable(clk); |
| be124c94 | 49 | wcr_enable = (1 << 2); |
| eea643f7 JB |
50 | } |
| 51 | ||
| eea643f7 | 52 | /* Assert SRS signal */ |
| be124c94 | 53 | __raw_writew(wcr_enable, wdog_base); |
| 74bef9a4 IY |
54 | |
| 55 | /* wait for reset to assert... */ | |
| 56 | mdelay(500); | |
| 57 | ||
| 58 | printk(KERN_ERR "Watchdog reset failed to assert reset\n"); | |
| 59 | ||
| 60 | /* delay to allow the serial port to show the message */ | |
| 61 | mdelay(50); | |
| 62 | ||
| 63 | /* we'll take a jump through zero as a poor second */ | |
| e879c862 | 64 | soft_restart(0); |
| eea643f7 | 65 | } |
| be124c94 SH |
66 | |
| 67 | void mxc_arch_reset_init(void __iomem *base) | |
| 68 | { | |
| 69 | wdog_base = base; | |
| 70 | } |