ARM: Move platform memory reservations out of generic code
[deliverable/linux.git] / arch / arm / mach-integrator / core.c
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1da177e4
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1/*
2 * linux/arch/arm/mach-integrator/core.c
3 *
4 * Copyright (C) 2000-2003 Deep Blue Solutions Ltd
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
9 */
10#include <linux/types.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/device.h>
14#include <linux/spinlock.h>
15#include <linux/interrupt.h>
a03d4d27 16#include <linux/irq.h>
98c672cf 17#include <linux/bootmem.h>
1da177e4 18#include <linux/sched.h>
20cf33ea 19#include <linux/smp.h>
fbb18a27 20#include <linux/termios.h>
a62c80e5 21#include <linux/amba/bus.h>
fbb18a27 22#include <linux/amba/serial.h>
fced80c7 23#include <linux/io.h>
1da177e4 24
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25#include <asm/clkdev.h>
26#include <mach/clkdev.h>
a09e64fb 27#include <mach/hardware.h>
a285edcf 28#include <mach/platform.h>
1da177e4 29#include <asm/irq.h>
a09e64fb 30#include <mach/cm.h>
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31#include <asm/system.h>
32#include <asm/leds.h>
33#include <asm/mach/time.h>
98c672cf 34#include <asm/pgtable.h>
1da177e4 35
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36static struct amba_pl010_data integrator_uart_data;
37
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38static struct amba_device rtc_device = {
39 .dev = {
1d559e29 40 .init_name = "mb:15",
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41 },
42 .res = {
43 .start = INTEGRATOR_RTC_BASE,
44 .end = INTEGRATOR_RTC_BASE + SZ_4K - 1,
45 .flags = IORESOURCE_MEM,
46 },
47 .irq = { IRQ_RTCINT, NO_IRQ },
48 .periphid = 0x00041030,
49};
50
51static struct amba_device uart0_device = {
52 .dev = {
1d559e29 53 .init_name = "mb:16",
fbb18a27 54 .platform_data = &integrator_uart_data,
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55 },
56 .res = {
57 .start = INTEGRATOR_UART0_BASE,
58 .end = INTEGRATOR_UART0_BASE + SZ_4K - 1,
59 .flags = IORESOURCE_MEM,
60 },
61 .irq = { IRQ_UARTINT0, NO_IRQ },
62 .periphid = 0x0041010,
63};
64
65static struct amba_device uart1_device = {
66 .dev = {
1d559e29 67 .init_name = "mb:17",
fbb18a27 68 .platform_data = &integrator_uart_data,
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69 },
70 .res = {
71 .start = INTEGRATOR_UART1_BASE,
72 .end = INTEGRATOR_UART1_BASE + SZ_4K - 1,
73 .flags = IORESOURCE_MEM,
74 },
75 .irq = { IRQ_UARTINT1, NO_IRQ },
76 .periphid = 0x0041010,
77};
78
79static struct amba_device kmi0_device = {
80 .dev = {
1d559e29 81 .init_name = "mb:18",
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82 },
83 .res = {
84 .start = KMI0_BASE,
85 .end = KMI0_BASE + SZ_4K - 1,
86 .flags = IORESOURCE_MEM,
87 },
88 .irq = { IRQ_KMIINT0, NO_IRQ },
89 .periphid = 0x00041050,
90};
91
92static struct amba_device kmi1_device = {
93 .dev = {
1d559e29 94 .init_name = "mb:19",
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95 },
96 .res = {
97 .start = KMI1_BASE,
98 .end = KMI1_BASE + SZ_4K - 1,
99 .flags = IORESOURCE_MEM,
100 },
101 .irq = { IRQ_KMIINT1, NO_IRQ },
102 .periphid = 0x00041050,
103};
104
105static struct amba_device *amba_devs[] __initdata = {
106 &rtc_device,
107 &uart0_device,
108 &uart1_device,
109 &kmi0_device,
110 &kmi1_device,
111};
112
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113/*
114 * These are fixed clocks.
115 */
116static struct clk clk24mhz = {
117 .rate = 24000000,
118};
119
120static struct clk uartclk = {
121 .rate = 14745600,
122};
123
a93ea9b3 124static struct clk_lookup lookups[] = {
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125 { /* UART0 */
126 .dev_id = "mb:16",
127 .clk = &uartclk,
128 }, { /* UART1 */
129 .dev_id = "mb:17",
130 .clk = &uartclk,
131 }, { /* KMI0 */
132 .dev_id = "mb:18",
133 .clk = &clk24mhz,
134 }, { /* KMI1 */
135 .dev_id = "mb:19",
136 .clk = &clk24mhz,
137 }, { /* MMCI - IntegratorCP */
138 .dev_id = "mb:1c",
139 .clk = &uartclk,
140 }
141};
142
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143static int __init integrator_init(void)
144{
145 int i;
146
0a0300dc 147 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
d72fbdf0 148
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149 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
150 struct amba_device *d = amba_devs[i];
151 amba_device_register(d, &iomem_resource);
152 }
153
154 return 0;
155}
156
157arch_initcall(integrator_init);
158
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159/*
160 * On the Integrator platform, the port RTS and DTR are provided by
161 * bits in the following SC_CTRLS register bits:
162 * RTS DTR
163 * UART0 7 6
164 * UART1 5 4
165 */
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166#define SC_CTRLC IO_ADDRESS(INTEGRATOR_SC_CTRLC)
167#define SC_CTRLS IO_ADDRESS(INTEGRATOR_SC_CTRLS)
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168
169static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
170{
171 unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
172
173 if (dev == &uart0_device) {
174 rts_mask = 1 << 4;
175 dtr_mask = 1 << 5;
176 } else {
177 rts_mask = 1 << 6;
178 dtr_mask = 1 << 7;
179 }
180
181 if (mctrl & TIOCM_RTS)
182 ctrlc |= rts_mask;
183 else
184 ctrls |= rts_mask;
185
186 if (mctrl & TIOCM_DTR)
187 ctrlc |= dtr_mask;
188 else
189 ctrls |= dtr_mask;
190
191 __raw_writel(ctrls, SC_CTRLS);
192 __raw_writel(ctrlc, SC_CTRLC);
193}
194
195static struct amba_pl010_data integrator_uart_data = {
196 .set_mctrl = integrator_uart_set_mctrl,
197};
198
b830b9b5 199#define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_CTRL)
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200
201static DEFINE_SPINLOCK(cm_lock);
202
203/**
204 * cm_control - update the CM_CTRL register.
205 * @mask: bits to change
206 * @set: bits to set
207 */
208void cm_control(u32 mask, u32 set)
209{
210 unsigned long flags;
211 u32 val;
212
213 spin_lock_irqsave(&cm_lock, flags);
214 val = readl(CM_CTRL) & ~mask;
215 writel(val | set, CM_CTRL);
216 spin_unlock_irqrestore(&cm_lock, flags);
217}
218
219EXPORT_SYMBOL(cm_control);
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220
221/*
222 * We need to stop things allocating the low memory; ideally we need a
223 * better implementation of GFP_DMA which does not assume that DMA-able
224 * memory starts at zero.
225 */
226void __init integrator_reserve(void)
227{
228 reserve_bootmem(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET, BOOTMEM_DEFAULT);
229}
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