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c680b77e LB |
1 | /* |
2 | * arch/arm/mach-iop33x/iq80331.c | |
3 | * | |
4 | * Board support code for the Intel IQ80331 platform. | |
5 | * | |
6 | * Author: Dave Jiang <dave.jiang@intel.com> | |
7 | * Copyright (C) 2003 Intel Corp. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | */ | |
14 | ||
15 | #include <linux/mm.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/string.h> | |
20 | #include <linux/slab.h> | |
21 | #include <linux/serial_core.h> | |
22 | #include <linux/serial_8250.h> | |
23 | #include <linux/mtd/physmap.h> | |
24 | #include <linux/platform_device.h> | |
25 | #include <asm/hardware.h> | |
26 | #include <asm/io.h> | |
27 | #include <asm/irq.h> | |
28 | #include <asm/mach/arch.h> | |
29 | #include <asm/mach/map.h> | |
30 | #include <asm/mach/pci.h> | |
31 | #include <asm/mach/time.h> | |
32 | #include <asm/mach-types.h> | |
33 | #include <asm/page.h> | |
34 | #include <asm/pgtable.h> | |
3668b45d | 35 | #include <asm/arch/time.h> |
c680b77e LB |
36 | |
37 | /* | |
38 | * IQ80331 timer tick configuration. | |
39 | */ | |
40 | static void __init iq80331_timer_init(void) | |
41 | { | |
42 | /* D-Step parts run at a higher internal bus frequency */ | |
43 | if (*IOP3XX_ATURID >= 0xa) | |
3668b45d | 44 | iop_init_time(333000000); |
c680b77e | 45 | else |
3668b45d | 46 | iop_init_time(266000000); |
c680b77e LB |
47 | } |
48 | ||
49 | static struct sys_timer iq80331_timer = { | |
50 | .init = iq80331_timer_init, | |
3668b45d | 51 | .offset = iop_gettimeoffset, |
c680b77e LB |
52 | }; |
53 | ||
54 | ||
55 | /* | |
56 | * IQ80331 PCI. | |
57 | */ | |
d73d8011 | 58 | static int __init |
c680b77e LB |
59 | iq80331_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) |
60 | { | |
61 | int irq; | |
62 | ||
63 | if (slot == 1 && pin == 1) { | |
64 | /* PCI-X Slot INTA */ | |
c852ac80 | 65 | irq = IRQ_IOP33X_XINT1; |
c680b77e LB |
66 | } else if (slot == 1 && pin == 2) { |
67 | /* PCI-X Slot INTB */ | |
c852ac80 | 68 | irq = IRQ_IOP33X_XINT2; |
c680b77e LB |
69 | } else if (slot == 1 && pin == 3) { |
70 | /* PCI-X Slot INTC */ | |
c852ac80 | 71 | irq = IRQ_IOP33X_XINT3; |
c680b77e LB |
72 | } else if (slot == 1 && pin == 4) { |
73 | /* PCI-X Slot INTD */ | |
c852ac80 | 74 | irq = IRQ_IOP33X_XINT0; |
c680b77e LB |
75 | } else if (slot == 2) { |
76 | /* GigE */ | |
c852ac80 | 77 | irq = IRQ_IOP33X_XINT2; |
c680b77e LB |
78 | } else { |
79 | printk(KERN_ERR "iq80331_pci_map_irq() called for unknown " | |
80 | "device PCI:%d:%d:%d\n", dev->bus->number, | |
81 | PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); | |
82 | irq = -1; | |
83 | } | |
84 | ||
85 | return irq; | |
86 | } | |
87 | ||
88 | static struct hw_pci iq80331_pci __initdata = { | |
89 | .swizzle = pci_std_swizzle, | |
90 | .nr_controllers = 1, | |
91 | .setup = iop3xx_pci_setup, | |
92 | .preinit = iop3xx_pci_preinit, | |
93 | .scan = iop3xx_pci_scan_bus, | |
94 | .map_irq = iq80331_pci_map_irq, | |
95 | }; | |
96 | ||
97 | static int __init iq80331_pci_init(void) | |
98 | { | |
e90ddd81 DW |
99 | if ((iop3xx_get_init_atu() == IOP3XX_INIT_ATU_ENABLE) && |
100 | machine_is_iq80331()) | |
c680b77e LB |
101 | pci_common_init(&iq80331_pci); |
102 | ||
103 | return 0; | |
104 | } | |
105 | ||
106 | subsys_initcall(iq80331_pci_init); | |
107 | ||
108 | ||
109 | /* | |
110 | * IQ80331 machine initialisation. | |
111 | */ | |
112 | static struct physmap_flash_data iq80331_flash_data = { | |
113 | .width = 1, | |
114 | }; | |
115 | ||
116 | static struct resource iq80331_flash_resource = { | |
117 | .start = 0xc0000000, | |
118 | .end = 0xc07fffff, | |
119 | .flags = IORESOURCE_MEM, | |
120 | }; | |
121 | ||
122 | static struct platform_device iq80331_flash_device = { | |
123 | .name = "physmap-flash", | |
124 | .id = 0, | |
125 | .dev = { | |
126 | .platform_data = &iq80331_flash_data, | |
127 | }, | |
128 | .num_resources = 1, | |
129 | .resource = &iq80331_flash_resource, | |
130 | }; | |
131 | ||
132 | static void __init iq80331_init_machine(void) | |
133 | { | |
134 | platform_device_register(&iop3xx_i2c0_device); | |
135 | platform_device_register(&iop3xx_i2c1_device); | |
136 | platform_device_register(&iop33x_uart0_device); | |
137 | platform_device_register(&iop33x_uart1_device); | |
138 | platform_device_register(&iq80331_flash_device); | |
2492c845 DW |
139 | platform_device_register(&iop3xx_dma_0_channel); |
140 | platform_device_register(&iop3xx_dma_1_channel); | |
141 | platform_device_register(&iop3xx_aau_channel); | |
c680b77e LB |
142 | } |
143 | ||
144 | MACHINE_START(IQ80331, "Intel IQ80331") | |
145 | /* Maintainer: Intel Corp. */ | |
146 | .phys_io = 0xfefff000, | |
147 | .io_pg_offst = ((0xfffff000) >> 18) & 0xfffc, | |
148 | .boot_params = 0x00000100, | |
149 | .map_io = iop3xx_map_io, | |
c852ac80 | 150 | .init_irq = iop33x_init_irq, |
c680b77e LB |
151 | .timer = &iq80331_timer, |
152 | .init_machine = iq80331_init_machine, | |
153 | MACHINE_END |