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1da177e4 LT |
1 | /* |
2 | * arch/arm/mach-iop3xx/iop321-time.c | |
3 | * | |
4 | * Timer code for IOP321 based systems | |
5 | * | |
6 | * Author: Deepak Saxena <dsaxena@mvista.com> | |
7 | * | |
8 | * Copyright 2002-2003 MontaVista Software Inc. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify it | |
11 | * under the terms of the GNU General Public License as published by the | |
12 | * Free Software Foundation; either version 2 of the License, or (at your | |
13 | * option) any later version. | |
14 | */ | |
15 | ||
16 | #include <linux/kernel.h> | |
17 | #include <linux/interrupt.h> | |
18 | #include <linux/time.h> | |
19 | #include <linux/init.h> | |
20 | #include <linux/timex.h> | |
21 | ||
22 | #include <asm/hardware.h> | |
23 | #include <asm/io.h> | |
24 | #include <asm/irq.h> | |
25 | #include <asm/uaccess.h> | |
26 | #include <asm/mach-types.h> | |
27 | #include <asm/mach/irq.h> | |
28 | #include <asm/mach/time.h> | |
29 | ||
30 | #define IOP321_TIME_SYNC 0 | |
31 | ||
32 | static inline unsigned long get_elapsed(void) | |
33 | { | |
34 | return LATCH - *IOP321_TU_TCR0; | |
35 | } | |
36 | ||
37 | static unsigned long iop321_gettimeoffset(void) | |
38 | { | |
39 | unsigned long elapsed, usec; | |
40 | u32 tisr1, tisr2; | |
41 | ||
42 | /* | |
43 | * If an interrupt was pending before we read the timer, | |
44 | * we've already wrapped. Factor this into the time. | |
45 | * If an interrupt was pending after we read the timer, | |
46 | * it may have wrapped between checking the interrupt | |
47 | * status and reading the timer. Re-read the timer to | |
48 | * be sure its value is after the wrap. | |
49 | */ | |
50 | ||
51 | asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr1)); | |
52 | elapsed = get_elapsed(); | |
53 | asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr2)); | |
54 | ||
55 | if(tisr1 & 1) | |
56 | elapsed += LATCH; | |
57 | else if (tisr2 & 1) | |
58 | elapsed = LATCH + get_elapsed(); | |
59 | ||
60 | /* | |
61 | * Now convert them to usec. | |
62 | */ | |
63 | usec = (unsigned long)(elapsed * (tick_nsec / 1000)) / LATCH; | |
64 | ||
65 | return usec; | |
66 | } | |
67 | ||
68 | static irqreturn_t | |
69 | iop321_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
70 | { | |
71 | u32 tisr; | |
72 | ||
73 | write_seqlock(&xtime_lock); | |
74 | ||
75 | asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr)); | |
76 | tisr |= 1; | |
77 | asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (tisr)); | |
78 | ||
79 | timer_tick(regs); | |
80 | ||
81 | write_sequnlock(&xtime_lock); | |
82 | ||
83 | return IRQ_HANDLED; | |
84 | } | |
85 | ||
86 | static struct irqaction iop321_timer_irq = { | |
87 | .name = "IOP321 Timer Tick", | |
88 | .handler = iop321_timer_interrupt, | |
09b8b5f8 | 89 | .flags = SA_INTERRUPT | SA_TIMER, |
1da177e4 LT |
90 | }; |
91 | ||
92 | static void __init iop321_timer_init(void) | |
93 | { | |
94 | u32 timer_ctl; | |
95 | ||
96 | setup_irq(IRQ_IOP321_TIMER0, &iop321_timer_irq); | |
97 | ||
98 | timer_ctl = IOP321_TMR_EN | IOP321_TMR_PRIVILEGED | IOP321_TMR_RELOAD | | |
99 | IOP321_TMR_RATIO_1_1; | |
100 | ||
101 | asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (LATCH)); | |
102 | ||
103 | asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl)); | |
104 | } | |
105 | ||
106 | struct sys_timer iop321_timer = { | |
107 | .init = &iop321_timer_init, | |
108 | .offset = iop321_gettimeoffset, | |
109 | }; |