[deliverable/linux.git] / arch / arm / mach-ixp2000 / ixdp2x00.c

/*
 * arch/arm/mach-ixp2000/ixdp2x00.c
 *
 * Code common to IXDP2400 and IXDP2800 platforms.
 *
 * Original Author: Naeem Afzal <naeem.m.afzal@intel.com>
 * Maintainer: Deepak Saxena <dsaxena@plexity.net>
 *
 * Copyright (C) 2002 Intel Corp.
 * Copyright (C) 2003-2004 MontaVista Software, Inc.
 *
 *  This program is free software; you can redistribute  it and/or modify it
 *  under  the terms of  the GNU General  Public License as published by the
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 *  option) any later version.
 */
#include <linux/gpio.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/bitops.h>
#include <linux/pci.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/io.h>

#include <asm/irq.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>

#include <asm/mach/pci.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#include <asm/mach/flash.h>
#include <asm/mach/arch.h>

#include <mach/gpio-ixp2000.h>

/*************************************************************************
 * IXDP2x00 IRQ Initialization
 *************************************************************************/
static volatile unsigned long *board_irq_mask;
static volatile unsigned long *board_irq_stat;
static unsigned long board_irq_count;

#ifdef CONFIG_ARCH_IXDP2400
/*
 * Slowport configuration for accessing CPLD registers on IXDP2x00
 */
static struct slowport_cfg slowport_cpld_cfg = {
	.CCR =	SLOWPORT_CCR_DIV_2,
	.WTC = 0x00000070,
	.RTC = 0x00000070,
	.PCR = SLOWPORT_MODE_FLASH,
	.ADC = SLOWPORT_ADDR_WIDTH_24 | SLOWPORT_DATA_WIDTH_8
};
#endif

static void ixdp2x00_irq_mask(struct irq_data *d)
{
	unsigned long dummy;
	static struct slowport_cfg old_cfg;

	/*
	 * This is ugly in common code but really don't know
	 * of a better way to handle it. :(
	 */
#ifdef CONFIG_ARCH_IXDP2400
	if (machine_is_ixdp2400())
		ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg);
#endif

	dummy = *board_irq_mask;
	dummy |=  IXP2000_BOARD_IRQ_MASK(d->irq);
	ixp2000_reg_wrb(board_irq_mask, dummy);

#ifdef CONFIG_ARCH_IXDP2400
	if (machine_is_ixdp2400())
		ixp2000_release_slowport(&old_cfg);
#endif
}

static void ixdp2x00_irq_unmask(struct irq_data *d)
{
	unsigned long dummy;
	static struct slowport_cfg old_cfg;

#ifdef CONFIG_ARCH_IXDP2400
	if (machine_is_ixdp2400())
		ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg);
#endif

	dummy = *board_irq_mask;
	dummy &=  ~IXP2000_BOARD_IRQ_MASK(d->irq);
	ixp2000_reg_wrb(board_irq_mask, dummy);

	if (machine_is_ixdp2400()) 
		ixp2000_release_slowport(&old_cfg);
}

static void ixdp2x00_irq_handler(unsigned int irq, struct irq_desc *desc)
{
        volatile u32 ex_interrupt = 0;
	static struct slowport_cfg old_cfg;
	int i;

	desc->irq_data.chip->irq_mask(&desc->irq_data);

#ifdef CONFIG_ARCH_IXDP2400
	if (machine_is_ixdp2400())
		ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg);
#endif
        ex_interrupt = *board_irq_stat & 0xff;
	if (machine_is_ixdp2400())
		ixp2000_release_slowport(&old_cfg);

	if(!ex_interrupt) {
		printk(KERN_ERR "Spurious IXDP2x00 CPLD interrupt!\n");
		return;
	}

	for(i = 0; i < board_irq_count; i++) {
		if(ex_interrupt & (1 << i))  {
			int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
			generic_handle_irq(cpld_irq);
		}
	}

	desc->irq_data.chip->irq_unmask(&desc->irq_data);
}

static struct irq_chip ixdp2x00_cpld_irq_chip = {
	.irq_ack	= ixdp2x00_irq_mask,
	.irq_mask	= ixdp2x00_irq_mask,
	.irq_unmask	= ixdp2x00_irq_unmask
};

void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigned long *mask_reg, unsigned long nr_of_irqs)
{
	unsigned int irq;

	ixp2000_init_irq();
	
	if (!ixdp2x00_master_npu())
		return;

	board_irq_stat = stat_reg;
	board_irq_mask = mask_reg;
	board_irq_count = nr_of_irqs;

	*board_irq_mask = 0xffffffff;

	for(irq = IXP2000_BOARD_IRQ(0); irq < IXP2000_BOARD_IRQ(board_irq_count); irq++) {
		irq_set_chip_and_handler(irq, &ixdp2x00_cpld_irq_chip,
					 handle_level_irq);
		set_irq_flags(irq, IRQF_VALID);
	}

	/* Hook into PCI interrupt */
	irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler);
}

/*************************************************************************
 * IXDP2x00 memory map
 *************************************************************************/
static struct map_desc ixdp2x00_io_desc __initdata = {
	.virtual	= IXDP2X00_VIRT_CPLD_BASE, 
	.pfn		= __phys_to_pfn(IXDP2X00_PHYS_CPLD_BASE),
	.length		= IXDP2X00_CPLD_SIZE,
	.type		= MT_DEVICE
};

void __init ixdp2x00_map_io(void)
{
	ixp2000_map_io();	

	iotable_init(&ixdp2x00_io_desc, 1);
}

/*************************************************************************
 * IXDP2x00-common PCI init
 *
 * The IXDP2[48]00 has a horrid PCI bus layout. Basically the board 
 * contains two NPUs (ingress and egress) connected over PCI,  both running 
 * instances  of the kernel. So far so good. Peers on the PCI bus running 
 * Linux is a common design in telecom systems. The problem is that instead 
 * of all the devices being controlled by a single host, different
 * devices are controlled by different NPUs on the same bus, leading to
 * multiple hosts on the bus. The exact bus layout looks like:
 *
 *                   Bus 0
 *    Master NPU <-------------------+-------------------> Slave NPU
 *                                   |
 *                                   |
 *                                  P2P 
 *                                   |
 *
 *                  Bus 1            |
 *               <--+------+---------+---------+------+-->
 *                  |      |         |         |      |
 *                  |      |         |         |      |
 *             ... Dev    PMC       Media     Eth0   Eth1 ...
 *
 * The master controls all but Eth1, which is controlled by the
 * slave. What this means is that the both the master and the slave
 * have to scan the bus, but only one of them can enumerate the bus.
 * In addition, after the bus is scanned, each kernel must remove
 * the device(s) it does not control from the PCI dev list otherwise
 * a driver on each NPU will try to manage it and we will have horrible
 * conflicts. Oh..and the slave NPU needs to see the master NPU
 * for Intel's drivers to work properly. Closed source drivers...
 *
 * The way we deal with this is fairly simple but ugly:
 *
 * 1) Let master scan and enumerate the bus completely.
 * 2) Master deletes Eth1 from device list.
 * 3) Slave scans bus and then deletes all but Eth1 (Eth0 on slave)
 *    from device list.
 * 4) Find HW designers and LART them.
 *
 * The boards also do not do normal PCI IRQ routing, or any sort of 
 * sensical  swizzling, so we just need to check where on the  bus a
 * device sits and figure out to which CPLD pin the interrupt is routed.
 * See ixdp2[48]00.c files.
 *
 *************************************************************************/
void ixdp2x00_slave_pci_postinit(void)
{
	struct pci_dev *dev;

	/*
	 * Remove PMC device is there is one
	 */
	if((dev = pci_get_bus_and_slot(1, IXDP2X00_PMC_DEVFN))) {
		pci_stop_and_remove_bus_device(dev);
		pci_dev_put(dev);
	}

	dev = pci_get_bus_and_slot(0, IXDP2X00_21555_DEVFN);
	pci_stop_and_remove_bus_device(dev);
	pci_dev_put(dev);
}

/**************************************************************************
 * IXDP2x00 Machine Setup
 *************************************************************************/
static struct flash_platform_data ixdp2x00_platform_data = {
	.map_name	= "cfi_probe",
	.width		= 1,
};

static struct ixp2000_flash_data ixdp2x00_flash_data = {
	.platform_data	= &ixdp2x00_platform_data,
	.nr_banks	= 1
};

static struct resource ixdp2x00_flash_resource = {
	.start		= 0xc4000000,
	.end		= 0xc4000000 + 0x00ffffff,
	.flags		= IORESOURCE_MEM,
};

static struct platform_device ixdp2x00_flash = {
	.name		= "IXP2000-Flash",
	.id		= 0,
	.dev		= {
		.platform_data = &ixdp2x00_flash_data,
	},
	.num_resources	= 1,
	.resource	= &ixdp2x00_flash_resource,
};

static struct ixp2000_i2c_pins ixdp2x00_i2c_gpio_pins = {
	.sda_pin	= IXDP2X00_GPIO_SDA,
	.scl_pin	= IXDP2X00_GPIO_SCL,
};

static struct platform_device ixdp2x00_i2c_controller = {
	.name		= "IXP2000-I2C",
	.id		= 0,
	.dev		= {
		.platform_data = &ixdp2x00_i2c_gpio_pins,
	},
	.num_resources	= 0
};

static struct platform_device *ixdp2x00_devices[] __initdata = {
	&ixdp2x00_flash,
	&ixdp2x00_i2c_controller
};

void __init ixdp2x00_init_machine(void)
{
	gpio_line_set(IXDP2X00_GPIO_I2C_ENABLE, 1);
	gpio_line_config(IXDP2X00_GPIO_I2C_ENABLE, GPIO_OUT);

	platform_add_devices(ixdp2x00_devices, ARRAY_SIZE(ixdp2x00_devices));
	ixp2000_uart_init();
}
Commit	Line	Data
1da177e4 LT	1	/*
	2	* arch/arm/mach-ixp2000/ixdp2x00.c
	3	*
	4	* Code common to IXDP2400 and IXDP2800 platforms.
	5	*
	6	* Original Author: Naeem Afzal <naeem.m.afzal@intel.com>
	7	* Maintainer: Deepak Saxena <dsaxena@plexity.net>
	8	*
	9	* Copyright (C) 2002 Intel Corp.
	10	* Copyright (C) 2003-2004 MontaVista Software, Inc.
	11	*
	12	* This program is free software; you can redistribute it and/or modify it
	13	* under the terms of the GNU General Public License as published by the
	14	* Free Software Foundation; either version 2 of the License, or (at your
	15	* option) any later version.
	16	*/
2f8163ba	17	#include <linux/gpio.h>
1da177e4 LT	18	#include <linux/kernel.h>
	19	#include <linux/init.h>
	20	#include <linux/mm.h>
	21	#include <linux/sched.h>
	22	#include <linux/interrupt.h>
d052d1be	23	#include <linux/platform_device.h>
1da177e4 LT	24	#include <linux/bitops.h>
	25	#include <linux/pci.h>
	26	#include <linux/ioport.h>
1da177e4	27	#include <linux/delay.h>
fced80c7	28	#include <linux/io.h>
1da177e4	29
1da177e4 LT	30	#include <asm/irq.h>
	31	#include <asm/pgtable.h>
	32	#include <asm/page.h>
a09e64fb	33	#include <mach/hardware.h>
1da177e4 LT	34	#include <asm/mach-types.h>
	35
	36	#include <asm/mach/pci.h>
	37	#include <asm/mach/map.h>
	38	#include <asm/mach/irq.h>
	39	#include <asm/mach/time.h>
	40	#include <asm/mach/flash.h>
	41	#include <asm/mach/arch.h>
	42
87f911a3	43	#include <mach/gpio-ixp2000.h>
8144f56b	44
1da177e4 LT	45	/*************************************************************************
	46	* IXDP2x00 IRQ Initialization
	47	*************************************************************************/
	48	static volatile unsigned long *board_irq_mask;
	49	static volatile unsigned long *board_irq_stat;
	50	static unsigned long board_irq_count;
	51
	52	#ifdef CONFIG_ARCH_IXDP2400
	53	/*
	54	* Slowport configuration for accessing CPLD registers on IXDP2x00
	55	*/
	56	static struct slowport_cfg slowport_cpld_cfg = {
	57	.CCR = SLOWPORT_CCR_DIV_2,
	58	.WTC = 0x00000070,
	59	.RTC = 0x00000070,
	60	.PCR = SLOWPORT_MODE_FLASH,
	61	.ADC = SLOWPORT_ADDR_WIDTH_24 \| SLOWPORT_DATA_WIDTH_8
	62	};
	63	#endif
	64
6e8f54fa	65	static void ixdp2x00_irq_mask(struct irq_data *d)
1da177e4 LT	66	{
	67	unsigned long dummy;
	68	static struct slowport_cfg old_cfg;
	69
	70	/*
	71	* This is ugly in common code but really don't know
	72	* of a better way to handle it. :(
	73	*/
	74	#ifdef CONFIG_ARCH_IXDP2400
	75	if (machine_is_ixdp2400())
	76	ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg);
	77	#endif
	78
	79	dummy = *board_irq_mask;
6e8f54fa	80	dummy \|= IXP2000_BOARD_IRQ_MASK(d->irq);
e9b72e43	81	ixp2000_reg_wrb(board_irq_mask, dummy);
1da177e4 LT	82
	83	#ifdef CONFIG_ARCH_IXDP2400
	84	if (machine_is_ixdp2400())
	85	ixp2000_release_slowport(&old_cfg);
	86	#endif
	87	}
	88
6e8f54fa	89	static void ixdp2x00_irq_unmask(struct irq_data *d)
1da177e4 LT	90	{
	91	unsigned long dummy;
	92	static struct slowport_cfg old_cfg;
	93
	94	#ifdef CONFIG_ARCH_IXDP2400
	95	if (machine_is_ixdp2400())
	96	ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg);
	97	#endif
	98
	99	dummy = *board_irq_mask;
6e8f54fa	100	dummy &= ~IXP2000_BOARD_IRQ_MASK(d->irq);
e9b72e43	101	ixp2000_reg_wrb(board_irq_mask, dummy);
1da177e4 LT	102
	103	if (machine_is_ixdp2400())
	104	ixp2000_release_slowport(&old_cfg);
	105	}
	106
10dd5ce2	107	static void ixdp2x00_irq_handler(unsigned int irq, struct irq_desc *desc)
1da177e4 LT	108	{
	109	volatile u32 ex_interrupt = 0;
	110	static struct slowport_cfg old_cfg;
	111	int i;
	112
6e8f54fa	113	desc->irq_data.chip->irq_mask(&desc->irq_data);
1da177e4 LT	114
	115	#ifdef CONFIG_ARCH_IXDP2400
	116	if (machine_is_ixdp2400())
	117	ixp2000_acquire_slowport(&slowport_cpld_cfg, &old_cfg);
	118	#endif
	119	ex_interrupt = *board_irq_stat & 0xff;
	120	if (machine_is_ixdp2400())
	121	ixp2000_release_slowport(&old_cfg);
	122
	123	if(!ex_interrupt) {
	124	printk(KERN_ERR "Spurious IXDP2x00 CPLD interrupt!\n");
	125	return;
	126	}
	127
	128	for(i = 0; i < board_irq_count; i++) {
	129	if(ex_interrupt & (1 << i)) {
1da177e4	130	int cpld_irq = IXP2000_BOARD_IRQ(0) + i;
d8aa0251	131	generic_handle_irq(cpld_irq);
1da177e4 LT	132	}
	133	}
	134
6e8f54fa	135	desc->irq_data.chip->irq_unmask(&desc->irq_data);
1da177e4 LT	136	}
1da177e4 LT	137
10dd5ce2	138	static struct irq_chip ixdp2x00_cpld_irq_chip = {
6e8f54fa LB	139	.irq_ack = ixdp2x00_irq_mask,
	140	.irq_mask = ixdp2x00_irq_mask,
	141	.irq_unmask = ixdp2x00_irq_unmask
1da177e4 LT	142	};
1da177e4 LT	143
4b1135a2	144	void __init ixdp2x00_init_irq(volatile unsigned long stat_reg, volatile unsigned long mask_reg, unsigned long nr_of_irqs)
1da177e4 LT	145	{
	146	unsigned int irq;
	147
	148	ixp2000_init_irq();
	149
	150	if (!ixdp2x00_master_npu())
	151	return;
	152
	153	board_irq_stat = stat_reg;
	154	board_irq_mask = mask_reg;
4b1135a2	155	board_irq_count = nr_of_irqs;
1da177e4 LT	156
	157	*board_irq_mask = 0xffffffff;
	158
	159	for(irq = IXP2000_BOARD_IRQ(0); irq < IXP2000_BOARD_IRQ(board_irq_count); irq++) {
f38c02f3 TG	160	irq_set_chip_and_handler(irq, &ixdp2x00_cpld_irq_chip,
f38c02f3 TG	161	handle_level_irq);
1da177e4 LT	162	set_irq_flags(irq, IRQF_VALID);
	163	}
	164
	165	/* Hook into PCI interrupt */
6845664a	166	irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler);
1da177e4 LT	167	}
	168
	169	/*************************************************************************
	170	* IXDP2x00 memory map
	171	*************************************************************************/
	172	static struct map_desc ixdp2x00_io_desc __initdata = {
	173	.virtual = IXDP2X00_VIRT_CPLD_BASE,
db0d087e	174	.pfn = __phys_to_pfn(IXDP2X00_PHYS_CPLD_BASE),
1da177e4 LT	175	.length = IXDP2X00_CPLD_SIZE,
	176	.type = MT_DEVICE
	177	};
	178
	179	void __init ixdp2x00_map_io(void)
	180	{
	181	ixp2000_map_io();
	182
	183	iotable_init(&ixdp2x00_io_desc, 1);
	184	}
	185
	186	/*************************************************************************
	187	* IXDP2x00-common PCI init
	188	*
	189	* The IXDP2[48]00 has a horrid PCI bus layout. Basically the board
	190	* contains two NPUs (ingress and egress) connected over PCI, both running
	191	* instances of the kernel. So far so good. Peers on the PCI bus running
	192	* Linux is a common design in telecom systems. The problem is that instead
	193	* of all the devices being controlled by a single host, different
6cbdc8c5	194	* devices are controlled by different NPUs on the same bus, leading to
1da177e4 LT	195	* multiple hosts on the bus. The exact bus layout looks like:
	196	*
	197	* Bus 0
	198	* Master NPU <-------------------+-------------------> Slave NPU
	199	* \|
	200	* \|
	201	* P2P
	202	* \|
	203	*
	204	* Bus 1 \|
	205	* <--+------+---------+---------+------+-->
	206	* \| \| \| \| \|
	207	* \| \| \| \| \|
	208	* ... Dev PMC Media Eth0 Eth1 ...
	209	*
6cbdc8c5	210	* The master controls all but Eth1, which is controlled by the
1da177e4 LT	211	* slave. What this means is that the both the master and the slave
	212	* have to scan the bus, but only one of them can enumerate the bus.
	213	* In addition, after the bus is scanned, each kernel must remove
	214	* the device(s) it does not control from the PCI dev list otherwise
	215	* a driver on each NPU will try to manage it and we will have horrible
	216	* conflicts. Oh..and the slave NPU needs to see the master NPU
	217	* for Intel's drivers to work properly. Closed source drivers...
	218	*
	219	* The way we deal with this is fairly simple but ugly:
	220	*
	221	* 1) Let master scan and enumerate the bus completely.
	222	* 2) Master deletes Eth1 from device list.
	223	* 3) Slave scans bus and then deletes all but Eth1 (Eth0 on slave)
	224	* from device list.
	225	* 4) Find HW designers and LART them.
	226	*
	227	* The boards also do not do normal PCI IRQ routing, or any sort of
	228	* sensical swizzling, so we just need to check where on the bus a
	229	* device sits and figure out to which CPLD pin the interrupt is routed.
	230	* See ixdp2[48]00.c files.
	231	*
	232	*************************************************************************/
	233	void ixdp2x00_slave_pci_postinit(void)
	234	{
	235	struct pci_dev *dev;
	236
	237	/*
	238	* Remove PMC device is there is one
	239	*/
7281c248	240	if((dev = pci_get_bus_and_slot(1, IXDP2X00_PMC_DEVFN))) {
210647af	241	pci_stop_and_remove_bus_device(dev);
7281c248 AC	242	pci_dev_put(dev);
7281c248 AC	243	}
1da177e4	244
7281c248	245	dev = pci_get_bus_and_slot(0, IXDP2X00_21555_DEVFN);
210647af	246	pci_stop_and_remove_bus_device(dev);
7281c248	247	pci_dev_put(dev);
1da177e4 LT	248	}
	249
	250	/**************************************************************************
	251	* IXDP2x00 Machine Setup
	252	*************************************************************************/
	253	static struct flash_platform_data ixdp2x00_platform_data = {
	254	.map_name = "cfi_probe",
	255	.width = 1,
	256	};
	257
	258	static struct ixp2000_flash_data ixdp2x00_flash_data = {
	259	.platform_data = &ixdp2x00_platform_data,
	260	.nr_banks = 1
	261	};
	262
	263	static struct resource ixdp2x00_flash_resource = {
	264	.start = 0xc4000000,
	265	.end = 0xc4000000 + 0x00ffffff,
	266	.flags = IORESOURCE_MEM,
	267	};
	268
	269	static struct platform_device ixdp2x00_flash = {
	270	.name = "IXP2000-Flash",
	271	.id = 0,
	272	.dev = {
	273	.platform_data = &ixdp2x00_flash_data,
	274	},
	275	.num_resources = 1,
	276	.resource = &ixdp2x00_flash_resource,
	277	};
	278
	279	static struct ixp2000_i2c_pins ixdp2x00_i2c_gpio_pins = {
	280	.sda_pin = IXDP2X00_GPIO_SDA,
	281	.scl_pin = IXDP2X00_GPIO_SCL,
	282	};
	283
	284	static struct platform_device ixdp2x00_i2c_controller = {
	285	.name = "IXP2000-I2C",
	286	.id = 0,
	287	.dev = {
	288	.platform_data = &ixdp2x00_i2c_gpio_pins,
	289	},
	290	.num_resources = 0
	291	};
	292
	293	static struct platform_device *ixdp2x00_devices[] __initdata = {
	294	&ixdp2x00_flash,
	295	&ixdp2x00_i2c_controller
	296	};
	297
	298	void __init ixdp2x00_init_machine(void)
	299	{
	300	gpio_line_set(IXDP2X00_GPIO_I2C_ENABLE, 1);
	301	gpio_line_config(IXDP2X00_GPIO_I2C_ENABLE, GPIO_OUT);
	302
	303	platform_add_devices(ixdp2x00_devices, ARRAY_SIZE(ixdp2x00_devices));
28187f2c	304	ixp2000_uart_init();
1da177e4 LT	305	}
1da177e4 LT	306