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c4713074 LB |
1 | /* |
2 | * arch/arm/mach-ixp23xx/pci.c | |
3 | * | |
4 | * PCI routines for IXP23XX based systems | |
5 | * | |
6 | * Copyright (c) 2005 MontaVista Software, Inc. | |
7 | * | |
8 | * based on original code: | |
9 | * | |
10 | * Author: Naeem Afzal <naeem.m.afzal@intel.com> | |
11 | * Copyright 2002-2005 Intel Corp. | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or modify it | |
14 | * under the terms of the GNU General Public License as published by the | |
15 | * Free Software Foundation; either version 2 of the License, or (at your | |
16 | * option) any later version. | |
17 | */ | |
18 | ||
19 | #include <linux/config.h> | |
20 | #include <linux/sched.h> | |
21 | #include <linux/kernel.h> | |
22 | #include <linux/pci.h> | |
23 | #include <linux/interrupt.h> | |
24 | #include <linux/mm.h> | |
25 | #include <linux/init.h> | |
26 | #include <linux/ioport.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/delay.h> | |
29 | ||
30 | #include <asm/io.h> | |
31 | #include <asm/irq.h> | |
32 | #include <asm/sizes.h> | |
33 | #include <asm/system.h> | |
34 | #include <asm/mach/pci.h> | |
35 | #include <asm/mach-types.h> | |
36 | #include <asm/hardware.h> | |
37 | ||
38 | extern int (*external_fault) (unsigned long, struct pt_regs *); | |
39 | ||
40 | static int pci_master_aborts = 0; | |
41 | ||
42 | #ifdef DEBUG | |
43 | #define DBG(x...) printk(x) | |
44 | #else | |
45 | #define DBG(x...) | |
46 | #endif | |
47 | ||
48 | int clear_master_aborts(void); | |
49 | ||
50 | static u32 | |
51 | *ixp23xx_pci_config_addr(unsigned int bus_nr, unsigned int devfn, int where) | |
52 | { | |
53 | u32 *paddress; | |
54 | ||
55 | /* | |
56 | * Must be dword aligned | |
57 | */ | |
58 | where &= ~3; | |
59 | ||
60 | /* | |
61 | * For top bus, generate type 0, else type 1 | |
62 | */ | |
63 | if (!bus_nr) { | |
64 | if (PCI_SLOT(devfn) >= 8) | |
65 | return 0; | |
66 | ||
67 | paddress = (u32 *) (IXP23XX_PCI_CFG0_VIRT | |
68 | | (1 << (PCI_SLOT(devfn) + 16)) | |
69 | | (PCI_FUNC(devfn) << 8) | where); | |
70 | } else { | |
71 | paddress = (u32 *) (IXP23XX_PCI_CFG1_VIRT | |
72 | | (bus_nr << 16) | |
73 | | (PCI_SLOT(devfn) << 11) | |
74 | | (PCI_FUNC(devfn) << 8) | where); | |
75 | } | |
76 | ||
77 | return paddress; | |
78 | } | |
79 | ||
80 | /* | |
81 | * Mask table, bits to mask for quantity of size 1, 2 or 4 bytes. | |
82 | * 0 and 3 are not valid indexes... | |
83 | */ | |
84 | static u32 bytemask[] = { | |
85 | /*0*/ 0, | |
86 | /*1*/ 0xff, | |
87 | /*2*/ 0xffff, | |
88 | /*3*/ 0, | |
89 | /*4*/ 0xffffffff, | |
90 | }; | |
91 | ||
92 | static int ixp23xx_pci_read_config(struct pci_bus *bus, unsigned int devfn, | |
93 | int where, int size, u32 *value) | |
94 | { | |
95 | u32 n; | |
96 | u32 *addr; | |
97 | ||
98 | n = where % 4; | |
99 | ||
100 | DBG("In config_read(%d) %d from dev %d:%d:%d\n", size, where, | |
101 | bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn)); | |
102 | ||
103 | addr = ixp23xx_pci_config_addr(bus->number, devfn, where); | |
104 | if (!addr) | |
105 | return PCIBIOS_DEVICE_NOT_FOUND; | |
106 | ||
107 | pci_master_aborts = 0; | |
108 | *value = (*addr >> (8*n)) & bytemask[size]; | |
109 | if (pci_master_aborts) { | |
110 | pci_master_aborts = 0; | |
111 | *value = 0xffffffff; | |
112 | return PCIBIOS_DEVICE_NOT_FOUND; | |
113 | } | |
114 | ||
115 | return PCIBIOS_SUCCESSFUL; | |
116 | } | |
117 | ||
118 | /* | |
119 | * We don't do error checking on the address for writes. | |
120 | * It's assumed that the user checked for the device existing first | |
121 | * by doing a read first. | |
122 | */ | |
123 | static int ixp23xx_pci_write_config(struct pci_bus *bus, unsigned int devfn, | |
124 | int where, int size, u32 value) | |
125 | { | |
126 | u32 mask; | |
127 | u32 *addr; | |
128 | u32 temp; | |
129 | ||
130 | mask = ~(bytemask[size] << ((where % 0x4) * 8)); | |
131 | addr = ixp23xx_pci_config_addr(bus->number, devfn, where); | |
132 | if (!addr) | |
133 | return PCIBIOS_DEVICE_NOT_FOUND; | |
134 | temp = (u32) (value) << ((where % 0x4) * 8); | |
135 | *addr = (*addr & mask) | temp; | |
136 | ||
137 | clear_master_aborts(); | |
138 | ||
139 | return PCIBIOS_SUCCESSFUL; | |
140 | } | |
141 | ||
142 | struct pci_ops ixp23xx_pci_ops = { | |
143 | .read = ixp23xx_pci_read_config, | |
144 | .write = ixp23xx_pci_write_config, | |
145 | }; | |
146 | ||
147 | struct pci_bus *ixp23xx_pci_scan_bus(int nr, struct pci_sys_data *sysdata) | |
148 | { | |
149 | return pci_scan_bus(sysdata->busnr, &ixp23xx_pci_ops, sysdata); | |
150 | } | |
151 | ||
152 | int ixp23xx_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | |
153 | { | |
154 | volatile unsigned long temp; | |
155 | unsigned long flags; | |
156 | ||
157 | pci_master_aborts = 1; | |
158 | ||
159 | local_irq_save(flags); | |
160 | temp = *IXP23XX_PCI_CONTROL; | |
161 | ||
162 | /* | |
163 | * master abort and cmd tgt err | |
164 | */ | |
165 | if (temp & ((1 << 8) | (1 << 5))) | |
166 | *IXP23XX_PCI_CONTROL = temp; | |
167 | ||
168 | temp = *IXP23XX_PCI_CMDSTAT; | |
169 | ||
170 | if (temp & (1 << 29)) | |
171 | *IXP23XX_PCI_CMDSTAT = temp; | |
172 | local_irq_restore(flags); | |
173 | ||
174 | /* | |
175 | * If it was an imprecise abort, then we need to correct the | |
176 | * return address to be _after_ the instruction. | |
177 | */ | |
178 | if (fsr & (1 << 10)) | |
179 | regs->ARM_pc += 4; | |
180 | ||
181 | return 0; | |
182 | } | |
183 | ||
184 | int clear_master_aborts(void) | |
185 | { | |
186 | volatile u32 temp; | |
187 | ||
188 | temp = *IXP23XX_PCI_CONTROL; | |
189 | ||
190 | /* | |
191 | * master abort and cmd tgt err | |
192 | */ | |
193 | if (temp & ((1 << 8) | (1 << 5))) | |
194 | *IXP23XX_PCI_CONTROL = temp; | |
195 | ||
196 | temp = *IXP23XX_PCI_CMDSTAT; | |
197 | ||
198 | if (temp & (1 << 29)) | |
199 | *IXP23XX_PCI_CMDSTAT = temp; | |
200 | ||
201 | return 0; | |
202 | } | |
203 | ||
532bda5d | 204 | static void __init ixp23xx_pci_common_init(void) |
c4713074 LB |
205 | { |
206 | #ifdef __ARMEB__ | |
207 | *IXP23XX_PCI_CONTROL |= 0x20000; /* set I/O swapping */ | |
208 | #endif | |
209 | /* | |
210 | * ADDR_31 needs to be clear for PCI memory access to CPP memory | |
211 | */ | |
212 | *IXP23XX_CPP2XSI_CURR_XFER_REG3 &= ~IXP23XX_CPP2XSI_ADDR_31; | |
213 | *IXP23XX_CPP2XSI_CURR_XFER_REG3 |= IXP23XX_CPP2XSI_PSH_OFF; | |
214 | ||
215 | /* | |
216 | * Select correct memory for PCI inbound transactions | |
217 | */ | |
218 | if (ixp23xx_cpp_boot()) { | |
219 | *IXP23XX_PCI_CPP_ADDR_BITS &= ~(1 << 1); | |
220 | } else { | |
221 | *IXP23XX_PCI_CPP_ADDR_BITS |= (1 << 1); | |
23759dc6 LB |
222 | |
223 | /* | |
224 | * Enable coherency on A2 silicon. | |
225 | */ | |
226 | if (arch_is_coherent()) | |
227 | *IXP23XX_CPP2XSI_CURR_XFER_REG3 &= ~IXP23XX_CPP2XSI_COH_OFF; | |
c4713074 | 228 | } |
532bda5d LB |
229 | } |
230 | ||
231 | void __init ixp23xx_pci_preinit(void) | |
232 | { | |
233 | ixp23xx_pci_common_init(); | |
c4713074 LB |
234 | |
235 | hook_fault_code(16+6, ixp23xx_pci_abort_handler, SIGBUS, | |
236 | "PCI config cycle to non-existent device"); | |
237 | ||
238 | *IXP23XX_PCI_ADDR_EXT = 0x0000e000; | |
239 | } | |
240 | ||
241 | /* | |
242 | * Prevent PCI layer from seeing the inbound host-bridge resources | |
243 | */ | |
244 | static void __devinit pci_fixup_ixp23xx(struct pci_dev *dev) | |
245 | { | |
246 | int i; | |
247 | ||
248 | dev->class &= 0xff; | |
249 | dev->class |= PCI_CLASS_BRIDGE_HOST << 8; | |
250 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { | |
251 | dev->resource[i].start = 0; | |
252 | dev->resource[i].end = 0; | |
253 | dev->resource[i].flags = 0; | |
254 | } | |
255 | } | |
256 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9002, pci_fixup_ixp23xx); | |
257 | ||
258 | /* | |
259 | * IXP2300 systems often have large resource requirements, so we just | |
260 | * use our own resource space. | |
261 | */ | |
262 | static struct resource ixp23xx_pci_mem_space = { | |
263 | .start = IXP23XX_PCI_MEM_START, | |
264 | .end = IXP23XX_PCI_MEM_START + IXP23XX_PCI_MEM_SIZE - 1, | |
265 | .flags = IORESOURCE_MEM, | |
266 | .name = "PCI Mem Space" | |
267 | }; | |
268 | ||
269 | static struct resource ixp23xx_pci_io_space = { | |
270 | .start = 0x00000100, | |
271 | .end = 0x01ffffff, | |
272 | .flags = IORESOURCE_IO, | |
273 | .name = "PCI I/O Space" | |
274 | }; | |
275 | ||
276 | int ixp23xx_pci_setup(int nr, struct pci_sys_data *sys) | |
277 | { | |
278 | if (nr >= 1) | |
279 | return 0; | |
280 | ||
281 | sys->resource[0] = &ixp23xx_pci_io_space; | |
282 | sys->resource[1] = &ixp23xx_pci_mem_space; | |
283 | sys->resource[2] = NULL; | |
284 | ||
285 | return 1; | |
286 | } | |
532bda5d LB |
287 | |
288 | void ixp23xx_pci_slave_init(void) | |
289 | { | |
290 | ixp23xx_pci_common_init(); | |
291 | } |