projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * arch/arm/mach-ixp4xx/common.c | |
| 3 | * | |
| 4 | * Generic code shared across all IXP4XX platforms | |
| 5 | * | |
| 6 | * Maintainer: Deepak Saxena <dsaxena@plexity.net> | |
| 7 | * | |
| 8 | * Copyright 2002 (c) Intel Corporation | |
| 9 | * Copyright 2003-2004 (c) MontaVista, Software, Inc. | |
| 10 | * | |
| 11 | * This file is licensed under the terms of the GNU General Public | |
| 12 | * License version 2. This program is licensed "as is" without any | |
| 13 | * warranty of any kind, whether express or implied. | |
| 14 | */ | |
| 15 | ||
| 1da177e4 LT |
16 | #include <linux/kernel.h> |
| 17 | #include <linux/mm.h> | |
| 18 | #include <linux/init.h> | |
| 19 | #include <linux/serial.h> | |
| 20 | #include <linux/sched.h> | |
| 21 | #include <linux/tty.h> | |
| d052d1be | 22 | #include <linux/platform_device.h> |
| 1da177e4 LT |
23 | #include <linux/serial_core.h> |
| 24 | #include <linux/bootmem.h> | |
| 25 | #include <linux/interrupt.h> | |
| 26 | #include <linux/bitops.h> | |
| 27 | #include <linux/time.h> | |
| 28 | #include <linux/timex.h> | |
| 84904d0e | 29 | #include <linux/clocksource.h> |
| 1da177e4 LT |
30 | |
| 31 | #include <asm/hardware.h> | |
| 32 | #include <asm/uaccess.h> | |
| 33 | #include <asm/io.h> | |
| 34 | #include <asm/pgtable.h> | |
| 35 | #include <asm/page.h> | |
| 36 | #include <asm/irq.h> | |
| 37 | ||
| 38 | #include <asm/mach/map.h> | |
| 39 | #include <asm/mach/irq.h> | |
| 40 | #include <asm/mach/time.h> | |
| 41 | ||
| 1da177e4 LT |
42 | /************************************************************************* |
| 43 | * IXP4xx chipset I/O mapping | |
| 44 | *************************************************************************/ | |
| 45 | static struct map_desc ixp4xx_io_desc[] __initdata = { | |
| 46 | { /* UART, Interrupt ctrl, GPIO, timers, NPEs, MACs, USB .... */ | |
| 47 | .virtual = IXP4XX_PERIPHERAL_BASE_VIRT, | |
| 87fe04bd | 48 | .pfn = __phys_to_pfn(IXP4XX_PERIPHERAL_BASE_PHYS), |
| 1da177e4 LT |
49 | .length = IXP4XX_PERIPHERAL_REGION_SIZE, |
| 50 | .type = MT_DEVICE | |
| 51 | }, { /* Expansion Bus Config Registers */ | |
| 52 | .virtual = IXP4XX_EXP_CFG_BASE_VIRT, | |
| 87fe04bd | 53 | .pfn = __phys_to_pfn(IXP4XX_EXP_CFG_BASE_PHYS), |
| 1da177e4 LT |
54 | .length = IXP4XX_EXP_CFG_REGION_SIZE, |
| 55 | .type = MT_DEVICE | |
| 56 | }, { /* PCI Registers */ | |
| 57 | .virtual = IXP4XX_PCI_CFG_BASE_VIRT, | |
| 87fe04bd | 58 | .pfn = __phys_to_pfn(IXP4XX_PCI_CFG_BASE_PHYS), |
| 1da177e4 LT |
59 | .length = IXP4XX_PCI_CFG_REGION_SIZE, |
| 60 | .type = MT_DEVICE | |
| 5932ae3f DS |
61 | }, |
| 62 | #ifdef CONFIG_DEBUG_LL | |
| 63 | { /* Debug UART mapping */ | |
| 64 | .virtual = IXP4XX_DEBUG_UART_BASE_VIRT, | |
| 87fe04bd | 65 | .pfn = __phys_to_pfn(IXP4XX_DEBUG_UART_BASE_PHYS), |
| 5932ae3f DS |
66 | .length = IXP4XX_DEBUG_UART_REGION_SIZE, |
| 67 | .type = MT_DEVICE | |
| 1da177e4 | 68 | } |
| 5932ae3f | 69 | #endif |
| 1da177e4 LT |
70 | }; |
| 71 | ||
| 72 | void __init ixp4xx_map_io(void) | |
| 73 | { | |
| 74 | iotable_init(ixp4xx_io_desc, ARRAY_SIZE(ixp4xx_io_desc)); | |
| 75 | } | |
| 76 | ||
| 77 | ||
| 78 | /************************************************************************* | |
| 79 | * IXP4xx chipset IRQ handling | |
| 80 | * | |
| 81 | * TODO: GPIO IRQs should be marked invalid until the user of the IRQ | |
| 82 | * (be it PCI or something else) configures that GPIO line | |
| 83 | * as an IRQ. | |
| 84 | **************************************************************************/ | |
| bdf82b59 DS |
85 | enum ixp4xx_irq_type { |
| 86 | IXP4XX_IRQ_LEVEL, IXP4XX_IRQ_EDGE | |
| 87 | }; | |
| 88 | ||
| 89 | static void ixp4xx_config_irq(unsigned irq, enum ixp4xx_irq_type type); | |
| 90 | ||
| 91 | /* | |
| 92 | * IRQ -> GPIO mapping table | |
| 93 | */ | |
| 6cc1b658 | 94 | static signed char irq2gpio[32] = { |
| bdf82b59 DS |
95 | -1, -1, -1, -1, -1, -1, 0, 1, |
| 96 | -1, -1, -1, -1, -1, -1, -1, -1, | |
| 97 | -1, -1, -1, 2, 3, 4, 5, 6, | |
| 98 | 7, 8, 9, 10, 11, 12, -1, -1, | |
| 99 | }; | |
| 100 | ||
| 101 | static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type) | |
| 102 | { | |
| 103 | int line = irq2gpio[irq]; | |
| 104 | u32 int_style; | |
| 105 | enum ixp4xx_irq_type irq_type; | |
| 106 | volatile u32 *int_reg; | |
| 107 | ||
| 108 | /* | |
| 109 | * Only for GPIO IRQs | |
| 110 | */ | |
| 111 | if (line < 0) | |
| 112 | return -EINVAL; | |
| 113 |