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2f7e8fae HZ |
1 | /* |
2 | * linux/arch/arm/mach-mmp/mmp2.c | |
3 | * | |
4 | * code name MMP2 | |
5 | * | |
6 | * Copyright (C) 2009 Marvell International Ltd. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/io.h> | |
17 | ||
18 | #include <mach/addr-map.h> | |
19 | #include <mach/regs-apbc.h> | |
20 | #include <mach/regs-apmu.h> | |
21 | #include <mach/cputype.h> | |
22 | #include <mach/irqs.h> | |
23 | #include <mach/mfp.h> | |
16144bfb | 24 | #include <mach/gpio.h> |
2f7e8fae HZ |
25 | #include <mach/devices.h> |
26 | ||
27 | #include "common.h" | |
28 | #include "clock.h" | |
29 | ||
30 | #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) | |
31 | ||
16144bfb HZ |
32 | #define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c) |
33 | ||
247b4592 HZ |
34 | static struct mfp_addr_map mmp2_addr_map[] __initdata = { |
35 | MFP_ADDR(PMIC_INT, 0x2c4), | |
36 | ||
37 | MFP_ADDR_END, | |
38 | }; | |
39 | ||
16144bfb HZ |
40 | static void __init mmp2_init_gpio(void) |
41 | { | |
42 | int i; | |
43 | ||
44 | /* enable GPIO clock */ | |
45 | __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_MMP2_GPIO); | |
46 | ||
47 | /* unmask GPIO edge detection for all 6 banks -- APMASKx */ | |
48 | for (i = 0; i < 6; i++) | |
49 | __raw_writel(0xffffffff, APMASK(i)); | |
50 | ||
51 | pxa_init_gpio(IRQ_MMP2_GPIO, 0, 167, NULL); | |
52 | } | |
53 | ||
54 | void __init mmp2_init_irq(void) | |
55 | { | |
56 | mmp2_init_icu(); | |
57 | mmp2_init_gpio(); | |
58 | } | |
59 | ||
2f7e8fae HZ |
60 | /* APB peripheral clocks */ |
61 | static APBC_CLK(uart1, MMP2_UART1, 1, 26000000); | |
62 | static APBC_CLK(uart2, MMP2_UART2, 1, 26000000); | |
63 | static APBC_CLK(uart3, MMP2_UART3, 1, 26000000); | |
64 | static APBC_CLK(uart4, MMP2_UART4, 1, 26000000); | |
65 | static APBC_CLK(twsi1, MMP2_TWSI1, 0, 26000000); | |
66 | static APBC_CLK(twsi2, MMP2_TWSI2, 0, 26000000); | |
67 | static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000); | |
68 | static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000); | |
69 | static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000); | |
70 | static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000); | |
71 | static APBC_CLK(rtc, MMP2_RTC, 0, 32768); | |
72 | ||
73 | static APMU_CLK(nand, NAND, 0xbf, 100000000); | |
74 | ||
75 | static struct clk_lookup mmp2_clkregs[] = { | |
76 | INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), | |
77 | INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL), | |
78 | INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL), | |
79 | INIT_CLKREG(&clk_uart4, "pxa2xx-uart.3", NULL), | |
80 | INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.0", NULL), | |
81 | INIT_CLKREG(&clk_twsi2, "pxa2xx-i2c.1", NULL), | |
82 | INIT_CLKREG(&clk_twsi3, "pxa2xx-i2c.2", NULL), | |
83 | INIT_CLKREG(&clk_twsi4, "pxa2xx-i2c.3", NULL), | |
84 | INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL), | |
85 | INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL), | |
86 | INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), | |
87 | }; | |
88 | ||
89 | static int __init mmp2_init(void) | |
90 | { | |
91 | if (cpu_is_mmp2()) { | |
92 | mfp_init_base(MFPR_VIRT_BASE); | |
247b4592 | 93 | mfp_init_addr(mmp2_addr_map); |
2f7e8fae HZ |
94 | clks_register(ARRAY_AND_SIZE(mmp2_clkregs)); |
95 | } | |
96 | ||
97 | return 0; | |
98 | } | |
99 | postcore_initcall(mmp2_init); | |
100 | ||
101 | /* on-chip devices */ | |
102 | MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5); | |
103 | MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21); | |
104 | MMP2_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4018000, 0x30, 22, 23); | |
105 | MMP2_DEVICE(uart4, "pxa2xx-uart", 3, UART4, 0xd4016000, 0x30, 18, 19); | |
106 | MMP2_DEVICE(twsi1, "pxa2xx-i2c", 0, TWSI1, 0xd4011000, 0x70); | |
107 | MMP2_DEVICE(twsi2, "pxa2xx-i2c", 1, TWSI2, 0xd4031000, 0x70); | |
108 | MMP2_DEVICE(twsi3, "pxa2xx-i2c", 2, TWSI3, 0xd4032000, 0x70); | |
109 | MMP2_DEVICE(twsi4, "pxa2xx-i2c", 3, TWSI4, 0xd4033000, 0x70); | |
110 | MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70); | |
111 | MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70); | |
112 | MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29); | |
113 |