Commit | Line | Data |
---|---|---|
49cbe786 EM |
1 | /* |
2 | * linux/arch/arm/mach-mmp/pxa168.c | |
3 | * | |
4 | * Code specific to PXA168 | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
49cbe786 EM |
10 | #include <linux/module.h> |
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/list.h> | |
e2bb6650 | 14 | #include <linux/io.h> |
49cbe786 | 15 | #include <linux/clk.h> |
990f2f22 | 16 | #include <linux/clk/mmp.h> |
157d2644 | 17 | #include <linux/platform_device.h> |
161105bc | 18 | #include <linux/platform_data/mv_usb.h> |
b501fd7b | 19 | #include <linux/dma-mapping.h> |
49cbe786 EM |
20 | |
21 | #include <asm/mach/time.h> | |
9f97da78 | 22 | #include <asm/system_misc.h> |
49cbe786 | 23 | |
b501fd7b | 24 | #include "addr-map.h" |
49cbe786 | 25 | #include "clock.h" |
b501fd7b AB |
26 | #include "common.h" |
27 | #include "cputype.h" | |
28 | #include "devices.h" | |
29 | #include "irqs.h" | |
30 | #include "mfp.h" | |
31 | #include "pxa168.h" | |
32 | #include "regs-apbc.h" | |
33 | #include "regs-apmu.h" | |
34 | #include "regs-usb.h" | |
49cbe786 | 35 | |
a7a89d96 EM |
36 | #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) |
37 | ||
38 | static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata = | |
39 | { | |
40 | MFP_ADDR_X(GPIO0, GPIO36, 0x04c), | |
41 | MFP_ADDR_X(GPIO37, GPIO55, 0x000), | |
42 | MFP_ADDR_X(GPIO56, GPIO123, 0x0e0), | |
43 | MFP_ADDR_X(GPIO124, GPIO127, 0x0f4), | |
44 | ||
45 | MFP_ADDR_END, | |
46 | }; | |
47 | ||
49cbe786 EM |
48 | void __init pxa168_init_irq(void) |
49 | { | |
50 | icu_init_irq(); | |
51 | } | |
52 | ||
49cbe786 EM |
53 | static int __init pxa168_init(void) |
54 | { | |
55 | if (cpu_is_pxa168()) { | |
a7a89d96 EM |
56 | mfp_init_base(MFPR_VIRT_BASE); |
57 | mfp_init_addr(pxa168_mfp_addr_map); | |
990f2f22 AB |
58 | pxa168_clk_init(APB_PHYS_BASE + 0x50000, |
59 | AXI_PHYS_BASE + 0x82800, | |
60 | APB_PHYS_BASE + 0x15000); | |
49cbe786 EM |
61 | } |
62 | ||
63 | return 0; | |
64 | } | |
65 | postcore_initcall(pxa168_init); | |
66 | ||
67 | /* system timer - clock enabled, 3.25MHz */ | |
68 | #define TIMER_CLK_RST (APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(3)) | |
50d0e244 | 69 | #define APBC_TIMERS APBC_REG(0x34) |
49cbe786 | 70 | |
6bb27d73 | 71 | void __init pxa168_timer_init(void) |
49cbe786 EM |
72 | { |
73 | /* this is early, we have to initialize the CCU registers by | |
74 | * ourselves instead of using clk_* API. Clock rate is defined | |
75 | * by APBC_TIMERS_CLK_RST (3.25MHz) and enabled free-running | |
76 | */ | |
50d0e244 | 77 | __raw_writel(APBC_APBCLK | APBC_RST, APBC_TIMERS); |
49cbe786 EM |
78 | |
79 | /* 3.25MHz, bus/functional clock enabled, release reset */ | |
50d0e244 | 80 | __raw_writel(TIMER_CLK_RST, APBC_TIMERS); |
49cbe786 EM |
81 | |
82 | timer_init(IRQ_PXA168_TIMER1); | |
83 | } | |
84 | ||
ab5739a1 MB |
85 | void pxa168_clear_keypad_wakeup(void) |
86 | { | |
87 | uint32_t val; | |
88 | uint32_t mask = APMU_PXA168_KP_WAKE_CLR; | |
89 | ||
90 | /* wake event clear is needed in order to clear keypad interrupt */ | |
91 | val = __raw_readl(APMU_WAKE_CLR); | |
92 | __raw_writel(val | mask, APMU_WAKE_CLR); | |
93 | } | |
94 | ||
49cbe786 EM |
95 | /* on-chip devices */ |
96 | PXA168_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4017000, 0x30, 21, 22); | |
97 | PXA168_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4018000, 0x30, 23, 24); | |
26407f81 | 98 | PXA168_DEVICE(uart3, "pxa2xx-uart", 2, UART3, 0xd4026000, 0x30, 23, 24); |
1a77920e EM |
99 | PXA168_DEVICE(twsi0, "pxa2xx-i2c", 0, TWSI0, 0xd4011000, 0x28); |
100 | PXA168_DEVICE(twsi1, "pxa2xx-i2c", 1, TWSI1, 0xd4025000, 0x28); | |
a27ba768 EM |
101 | PXA168_DEVICE(pwm1, "pxa168-pwm", 0, NONE, 0xd401a000, 0x10); |
102 | PXA168_DEVICE(pwm2, "pxa168-pwm", 1, NONE, 0xd401a400, 0x10); | |
103 | PXA168_DEVICE(pwm3, "pxa168-pwm", 2, NONE, 0xd401a800, 0x10); | |
104 | PXA168_DEVICE(pwm4, "pxa168-pwm", 3, NONE, 0xd401ac00, 0x10); | |
a0f266c1 | 105 | PXA168_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); |
7e499228 HZ |
106 | PXA168_DEVICE(ssp1, "pxa168-ssp", 0, SSP1, 0xd401b000, 0x40, 52, 53); |
107 | PXA168_DEVICE(ssp2, "pxa168-ssp", 1, SSP2, 0xd401c000, 0x40, 54, 55); | |
108 | PXA168_DEVICE(ssp3, "pxa168-ssp", 2, SSP3, 0xd401f000, 0x40, 56, 57); | |
109 | PXA168_DEVICE(ssp4, "pxa168-ssp", 3, SSP4, 0xd4020000, 0x40, 58, 59); | |
110 | PXA168_DEVICE(ssp5, "pxa168-ssp", 4, SSP5, 0xd4021000, 0x40, 60, 61); | |
58cf68b8 | 111 | PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8); |
6d109465 | 112 | PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c); |
80def0dc | 113 | PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff); |
3abd7f68 | 114 | |
157d2644 HZ |
115 | struct resource pxa168_resource_gpio[] = { |
116 | { | |
117 | .start = 0xd4019000, | |
118 | .end = 0xd4019fff, | |
119 | .flags = IORESOURCE_MEM, | |
120 | }, { | |
121 | .start = IRQ_PXA168_GPIOX, | |
122 | .end = IRQ_PXA168_GPIOX, | |
93413c36 | 123 | .name = "gpio_mux", |
157d2644 HZ |
124 | .flags = IORESOURCE_IRQ, |
125 | }, | |
126 | }; | |
127 | ||
128 | struct platform_device pxa168_device_gpio = { | |
2cab0292 | 129 | .name = "mmp-gpio", |
157d2644 HZ |
130 | .id = -1, |
131 | .num_resources = ARRAY_SIZE(pxa168_resource_gpio), | |
132 | .resource = pxa168_resource_gpio, | |
133 | }; | |
134 | ||
3abd7f68 TU |
135 | struct resource pxa168_usb_host_resources[] = { |
136 | /* USB Host conroller register base */ | |
137 | [0] = { | |
161105bc NZ |
138 | .start = PXA168_U2H_REGBASE + U2x_CAPREGS_OFFSET, |
139 | .end = PXA168_U2H_REGBASE + USB_REG_RANGE, | |
3abd7f68 | 140 | .flags = IORESOURCE_MEM, |
161105bc | 141 | .name = "capregs", |
3abd7f68 TU |
142 | }, |
143 | /* USB PHY register base */ | |
144 | [1] = { | |
161105bc NZ |
145 | .start = PXA168_U2H_PHYBASE, |
146 | .end = PXA168_U2H_PHYBASE + USB_PHY_RANGE, | |
3abd7f68 | 147 | .flags = IORESOURCE_MEM, |
161105bc | 148 | .name = "phyregs", |
3abd7f68 TU |
149 | }, |
150 | [2] = { | |
151 | .start = IRQ_PXA168_USB2, | |
152 | .end = IRQ_PXA168_USB2, | |
153 | .flags = IORESOURCE_IRQ, | |
154 | }, | |
155 | }; | |
156 | ||
157 | static u64 pxa168_usb_host_dmamask = DMA_BIT_MASK(32); | |
158 | struct platform_device pxa168_device_usb_host = { | |
161105bc | 159 | .name = "pxa-sph", |
3abd7f68 TU |
160 | .id = -1, |
161 | .dev = { | |
162 | .dma_mask = &pxa168_usb_host_dmamask, | |
163 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
164 | }, | |
165 | ||
166 | .num_resources = ARRAY_SIZE(pxa168_usb_host_resources), | |
167 | .resource = pxa168_usb_host_resources, | |
168 | }; | |
169 | ||
161105bc | 170 | int __init pxa168_add_usb_host(struct mv_usb_platform_data *pdata) |
3abd7f68 TU |
171 | { |
172 | pxa168_device_usb_host.dev.platform_data = pdata; | |
173 | return platform_device_register(&pxa168_device_usb_host); | |
174 | } | |
9854a38e | 175 | |
7b6d864b | 176 | void pxa168_restart(enum reboot_mode mode, const char *cmd) |
9854a38e RK |
177 | { |
178 | soft_restart(0xffff0000); | |
179 | } |