Commit | Line | Data |
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009f1315 GC |
1 | /* |
2 | * Coherency fabric: low level functions | |
3 | * | |
4 | * Copyright (C) 2012 Marvell | |
5 | * | |
6 | * Gregory CLEMENT <gregory.clement@free-electrons.com> | |
7 | * | |
8 | * This file is licensed under the terms of the GNU General Public | |
9 | * License version 2. This program is licensed "as is" without any | |
10 | * warranty of any kind, whether express or implied. | |
11 | * | |
12 | * This file implements the assembly function to add a CPU to the | |
13 | * coherency fabric. This function is called by each of the secondary | |
14 | * CPUs during their early boot in an SMP kernel, this why this | |
15 | * function have to callable from assembly. It can also be called by a | |
16 | * primary CPU from C code during its boot. | |
17 | */ | |
18 | ||
19 | #include <linux/linkage.h> | |
20 | #define ARMADA_XP_CFB_CTL_REG_OFFSET 0x0 | |
21 | #define ARMADA_XP_CFB_CFG_REG_OFFSET 0x4 | |
22 | ||
23 | .text | |
24 | /* | |
25 | * r0: Coherency fabric base register address | |
26 | * r1: HW CPU id | |
27 | */ | |
28 | ENTRY(ll_set_cpu_coherent) | |
29 | /* Create bit by cpu index */ | |
30 | mov r3, #(1 << 24) | |
31 | lsl r1, r3, r1 | |
32 | ||
33 | /* Add CPU to SMP group - Atomic */ | |
34 | add r3, r0, #ARMADA_XP_CFB_CTL_REG_OFFSET | |
35 | ldr r2, [r3] | |
36 | orr r2, r2, r1 | |
37 | str r2, [r3] | |
38 | ||
39 | /* Enable coherency on CPU - Atomic */ | |
40 | add r3, r0, #ARMADA_XP_CFB_CFG_REG_OFFSET | |
41 | ldr r2, [r3] | |
42 | orr r2, r2, r1 | |
43 | str r2, [r3] | |
44 | ||
45 | dsb | |
46 | ||
47 | mov r0, #0 | |
48 | mov pc, lr | |
49 | ENDPROC(ll_set_cpu_coherent) |