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e3d13ff4 SH |
1 | /* |
2 | * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved. | |
3 | * Copyright 2008 Sascha Hauer, kernel@pengutronix.de | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, | |
17 | * Boston, MA 02110-1301, USA. | |
18 | */ | |
19 | ||
20 | #include <linux/module.h> | |
21 | #include <linux/platform_device.h> | |
22 | #include <linux/serial.h> | |
07bd1a6c | 23 | #include <linux/gpio.h> |
a09e64fb | 24 | #include <mach/hardware.h> |
80b02c17 | 25 | #include <mach/irqs.h> |
a09e64fb | 26 | #include <mach/imx-uart.h> |
e3d13ff4 SH |
27 | |
28 | static struct resource uart0[] = { | |
29 | { | |
30 | .start = UART1_BASE_ADDR, | |
31 | .end = UART1_BASE_ADDR + 0x0B5, | |
32 | .flags = IORESOURCE_MEM, | |
33 | }, { | |
34 | .start = MXC_INT_UART1, | |
35 | .end = MXC_INT_UART1, | |
36 | .flags = IORESOURCE_IRQ, | |
37 | }, | |
38 | }; | |
39 | ||
5cf09421 | 40 | struct platform_device mxc_uart_device0 = { |
e3d13ff4 SH |
41 | .name = "imx-uart", |
42 | .id = 0, | |
43 | .resource = uart0, | |
44 | .num_resources = ARRAY_SIZE(uart0), | |
45 | }; | |
46 | ||
47 | static struct resource uart1[] = { | |
48 | { | |
49 | .start = UART2_BASE_ADDR, | |
50 | .end = UART2_BASE_ADDR + 0x0B5, | |
51 | .flags = IORESOURCE_MEM, | |
52 | }, { | |
53 | .start = MXC_INT_UART2, | |
54 | .end = MXC_INT_UART2, | |
55 | .flags = IORESOURCE_IRQ, | |
56 | }, | |
57 | }; | |
58 | ||
5cf09421 | 59 | struct platform_device mxc_uart_device1 = { |
e3d13ff4 SH |
60 | .name = "imx-uart", |
61 | .id = 1, | |
62 | .resource = uart1, | |
63 | .num_resources = ARRAY_SIZE(uart1), | |
64 | }; | |
65 | ||
66 | static struct resource uart2[] = { | |
67 | { | |
68 | .start = UART3_BASE_ADDR, | |
69 | .end = UART3_BASE_ADDR + 0x0B5, | |
70 | .flags = IORESOURCE_MEM, | |
71 | }, { | |
72 | .start = MXC_INT_UART3, | |
73 | .end = MXC_INT_UART3, | |
74 | .flags = IORESOURCE_IRQ, | |
75 | }, | |
76 | }; | |
77 | ||
5cf09421 | 78 | struct platform_device mxc_uart_device2 = { |
e3d13ff4 SH |
79 | .name = "imx-uart", |
80 | .id = 2, | |
81 | .resource = uart2, | |
82 | .num_resources = ARRAY_SIZE(uart2), | |
83 | }; | |
84 | ||
85 | static struct resource uart3[] = { | |
86 | { | |
87 | .start = UART4_BASE_ADDR, | |
88 | .end = UART4_BASE_ADDR + 0x0B5, | |
89 | .flags = IORESOURCE_MEM, | |
90 | }, { | |
91 | .start = MXC_INT_UART4, | |
92 | .end = MXC_INT_UART4, | |
93 | .flags = IORESOURCE_IRQ, | |
94 | }, | |
95 | }; | |
96 | ||
5cf09421 | 97 | struct platform_device mxc_uart_device3 = { |
e3d13ff4 SH |
98 | .name = "imx-uart", |
99 | .id = 3, | |
100 | .resource = uart3, | |
101 | .num_resources = ARRAY_SIZE(uart3), | |
102 | }; | |
103 | ||
104 | static struct resource uart4[] = { | |
105 | { | |
106 | .start = UART5_BASE_ADDR, | |
107 | .end = UART5_BASE_ADDR + 0x0B5, | |
108 | .flags = IORESOURCE_MEM, | |
109 | }, { | |
110 | .start = MXC_INT_UART5, | |
111 | .end = MXC_INT_UART5, | |
112 | .flags = IORESOURCE_IRQ, | |
113 | }, | |
114 | }; | |
115 | ||
5cf09421 | 116 | struct platform_device mxc_uart_device4 = { |
e3d13ff4 SH |
117 | .name = "imx-uart", |
118 | .id = 4, | |
119 | .resource = uart4, | |
120 | .num_resources = ARRAY_SIZE(uart4), | |
121 | }; | |
122 | ||
07bd1a6c JB |
123 | /* GPIO port description */ |
124 | static struct mxc_gpio_port imx_gpio_ports[] = { | |
125 | [0] = { | |
126 | .chip.label = "gpio-0", | |
127 | .base = IO_ADDRESS(GPIO1_BASE_ADDR), | |
128 | .irq = MXC_INT_GPIO1, | |
9d631b83 | 129 | .virtual_irq_start = MXC_GPIO_IRQ_START, |
07bd1a6c JB |
130 | }, |
131 | [1] = { | |
132 | .chip.label = "gpio-1", | |
133 | .base = IO_ADDRESS(GPIO2_BASE_ADDR), | |
134 | .irq = MXC_INT_GPIO2, | |
9d631b83 | 135 | .virtual_irq_start = MXC_GPIO_IRQ_START + 32, |
07bd1a6c JB |
136 | }, |
137 | [2] = { | |
138 | .chip.label = "gpio-2", | |
139 | .base = IO_ADDRESS(GPIO3_BASE_ADDR), | |
140 | .irq = MXC_INT_GPIO3, | |
9d631b83 | 141 | .virtual_irq_start = MXC_GPIO_IRQ_START + 64, |
07bd1a6c JB |
142 | } |
143 | }; | |
144 | ||
145 | int __init mxc_register_gpios(void) | |
146 | { | |
147 | return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports)); | |
148 | } | |
a8405929 SH |
149 | |
150 | static struct resource mxc_w1_master_resources[] = { | |
151 | { | |
152 | .start = OWIRE_BASE_ADDR, | |
153 | .end = OWIRE_BASE_ADDR + SZ_4K - 1, | |
154 | .flags = IORESOURCE_MEM, | |
155 | }, | |
156 | }; | |
157 | ||
158 | struct platform_device mxc_w1_master_device = { | |
159 | .name = "mxc_w1", | |
160 | .id = 0, | |
161 | .num_resources = ARRAY_SIZE(mxc_w1_master_resources), | |
162 | .resource = mxc_w1_master_resources, | |
163 | }; | |
cb96cf1a SH |
164 | |
165 | static struct resource mxc_nand_resources[] = { | |
166 | { | |
167 | .start = NFC_BASE_ADDR, | |
168 | .end = NFC_BASE_ADDR + 0xfff, | |
169 | .flags = IORESOURCE_MEM | |
170 | }, { | |
171 | .start = MXC_INT_NANDFC, | |
172 | .end = MXC_INT_NANDFC, | |
173 | .flags = IORESOURCE_IRQ | |
174 | }, | |
175 | }; | |
176 | ||
177 | struct platform_device mxc_nand_device = { | |
178 | .name = "mxc_nand", | |
179 | .id = 0, | |
180 | .num_resources = ARRAY_SIZE(mxc_nand_resources), | |
181 | .resource = mxc_nand_resources, | |
182 | }; | |
39d1dc06 MB |
183 | |
184 | static struct resource mxc_i2c0_resources[] = { | |
185 | { | |
186 | .start = I2C_BASE_ADDR, | |
187 | .end = I2C_BASE_ADDR + SZ_4K - 1, | |
188 | .flags = IORESOURCE_MEM, | |
189 | }, | |
190 | { | |
191 | .start = MXC_INT_I2C, | |
192 | .end = MXC_INT_I2C, | |
193 | .flags = IORESOURCE_IRQ, | |
194 | }, | |
195 | }; | |
196 | ||
197 | struct platform_device mxc_i2c_device0 = { | |
198 | .name = "imx-i2c", | |
199 | .id = 0, | |
200 | .num_resources = ARRAY_SIZE(mxc_i2c0_resources), | |
201 | .resource = mxc_i2c0_resources, | |
202 | }; | |
203 | ||
204 | static struct resource mxc_i2c1_resources[] = { | |
205 | { | |
206 | .start = I2C2_BASE_ADDR, | |
207 | .end = I2C2_BASE_ADDR + SZ_4K - 1, | |
208 | .flags = IORESOURCE_MEM, | |
209 | }, | |
210 | { | |
211 | .start = MXC_INT_I2C2, | |
212 | .end = MXC_INT_I2C2, | |
213 | .flags = IORESOURCE_IRQ, | |
214 | }, | |
215 | }; | |
216 | ||
217 | struct platform_device mxc_i2c_device1 = { | |
218 | .name = "imx-i2c", | |
219 | .id = 1, | |
220 | .num_resources = ARRAY_SIZE(mxc_i2c1_resources), | |
221 | .resource = mxc_i2c1_resources, | |
222 | }; | |
223 | ||
224 | static struct resource mxc_i2c2_resources[] = { | |
225 | { | |
226 | .start = I2C3_BASE_ADDR, | |
227 | .end = I2C3_BASE_ADDR + SZ_4K - 1, | |
228 | .flags = IORESOURCE_MEM, | |
229 | }, | |
230 | { | |
231 | .start = MXC_INT_I2C3, | |
232 | .end = MXC_INT_I2C3, | |
233 | .flags = IORESOURCE_IRQ, | |
234 | }, | |
235 | }; | |
236 | ||
237 | struct platform_device mxc_i2c_device2 = { | |
238 | .name = "imx-i2c", | |
239 | .id = 2, | |
240 | .num_resources = ARRAY_SIZE(mxc_i2c2_resources), | |
241 | .resource = mxc_i2c2_resources, | |
242 | }; |