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5e9145ed AP |
1 | /* |
2 | * armadillo5x0.c | |
3 | * | |
4 | * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com> | |
5 | * updates in http://alberdroid.blogspot.com/ | |
6 | * | |
7 | * Based on Atmark Techno, Inc. armadillo 500 BSP 2008 | |
8 | * Based on mx31ads.c and pcm037.c Great Work! | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, | |
23 | * MA 02110-1301, USA. | |
24 | */ | |
25 | ||
26 | #include <linux/types.h> | |
27 | #include <linux/init.h> | |
28 | #include <linux/clk.h> | |
29 | #include <linux/platform_device.h> | |
30 | #include <linux/gpio.h> | |
31 | #include <linux/smsc911x.h> | |
32 | #include <linux/interrupt.h> | |
33 | #include <linux/irq.h> | |
c3a9c7f5 | 34 | #include <linux/mtd/physmap.h> |
0c8bad6a | 35 | #include <linux/io.h> |
e33c049c AP |
36 | #include <linux/input.h> |
37 | #include <linux/gpio_keys.h> | |
2097abcb | 38 | #include <linux/i2c.h> |
b3aa111f AP |
39 | #include <linux/usb/otg.h> |
40 | #include <linux/usb/ulpi.h> | |
41 | #include <linux/delay.h> | |
5e9145ed AP |
42 | |
43 | #include <mach/hardware.h> | |
44 | #include <asm/mach-types.h> | |
45 | #include <asm/mach/arch.h> | |
46 | #include <asm/mach/time.h> | |
47 | #include <asm/memory.h> | |
48 | #include <asm/mach/map.h> | |
49 | ||
50 | #include <mach/common.h> | |
51 | #include <mach/imx-uart.h> | |
52 | #include <mach/iomux-mx3.h> | |
5e9145ed AP |
53 | #include <mach/mmc.h> |
54 | #include <mach/ipu.h> | |
55 | #include <mach/mx3fb.h> | |
b3aa111f AP |
56 | #include <mach/mxc_ehci.h> |
57 | #include <mach/ulpi.h> | |
5e9145ed | 58 | |
a2ceeef5 | 59 | #include "devices-imx31.h" |
5e9145ed | 60 | #include "devices.h" |
0c8bad6a | 61 | #include "crm_regs.h" |
5e9145ed AP |
62 | |
63 | static int armadillo5x0_pins[] = { | |
64 | /* UART1 */ | |
65 | MX31_PIN_CTS1__CTS1, | |
66 | MX31_PIN_RTS1__RTS1, | |
67 | MX31_PIN_TXD1__TXD1, | |
68 | MX31_PIN_RXD1__RXD1, | |
69 | /* UART2 */ | |
70 | MX31_PIN_CTS2__CTS2, | |
71 | MX31_PIN_RTS2__RTS2, | |
72 | MX31_PIN_TXD2__TXD2, | |
73 | MX31_PIN_RXD2__RXD2, | |
74 | /* LAN9118_IRQ */ | |
75 | IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO), | |
76 | /* SDHC1 */ | |
77 | MX31_PIN_SD1_DATA3__SD1_DATA3, | |
78 | MX31_PIN_SD1_DATA2__SD1_DATA2, | |
79 | MX31_PIN_SD1_DATA1__SD1_DATA1, | |
80 | MX31_PIN_SD1_DATA0__SD1_DATA0, | |
81 | MX31_PIN_SD1_CLK__SD1_CLK, | |
82 | MX31_PIN_SD1_CMD__SD1_CMD, | |
83 | /* Framebuffer */ | |
84 | MX31_PIN_LD0__LD0, | |
85 | MX31_PIN_LD1__LD1, | |
86 | MX31_PIN_LD2__LD2, | |
87 | MX31_PIN_LD3__LD3, | |
88 | MX31_PIN_LD4__LD4, | |
89 | MX31_PIN_LD5__LD5, | |
90 | MX31_PIN_LD6__LD6, | |
91 | MX31_PIN_LD7__LD7, | |
92 | MX31_PIN_LD8__LD8, | |
93 | MX31_PIN_LD9__LD9, | |
94 | MX31_PIN_LD10__LD10, | |
95 | MX31_PIN_LD11__LD11, | |
96 | MX31_PIN_LD12__LD12, | |
97 | MX31_PIN_LD13__LD13, | |
98 | MX31_PIN_LD14__LD14, | |
99 | MX31_PIN_LD15__LD15, | |
100 | MX31_PIN_LD16__LD16, | |
101 | MX31_PIN_LD17__LD17, | |
102 | MX31_PIN_VSYNC3__VSYNC3, | |
103 | MX31_PIN_HSYNC__HSYNC, | |
104 | MX31_PIN_FPSHIFT__FPSHIFT, | |
105 | MX31_PIN_DRDY0__DRDY0, | |
106 | IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/ | |
e9a6c5d0 AP |
107 | /* I2C2 */ |
108 | MX31_PIN_CSPI2_MOSI__SCL, | |
109 | MX31_PIN_CSPI2_MISO__SDA, | |
b3aa111f AP |
110 | /* OTG */ |
111 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | |
112 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | |
113 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | |
114 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | |
115 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | |
116 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | |
117 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | |
118 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | |
119 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, | |
120 | MX31_PIN_USBOTG_DIR__USBOTG_DIR, | |
121 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, | |
122 | MX31_PIN_USBOTG_STP__USBOTG_STP, | |
123 | /* USB host 2 */ | |
124 | IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC), | |
125 | IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC), | |
126 | IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC), | |
127 | IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC), | |
128 | IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC), | |
129 | IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC), | |
130 | IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC), | |
131 | IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC), | |
132 | IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC), | |
133 | IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC), | |
134 | IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC), | |
135 | IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC), | |
0c8bad6a | 136 | }; |
e9a6c5d0 | 137 | |
b3aa111f AP |
138 | /* USB */ |
139 | #if defined(CONFIG_USB_ULPI) | |
140 | ||
141 | #define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4) | |
142 | #define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6) | |
143 | #define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3) | |
144 | ||
145 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | |
146 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | |
147 | ||
148 | static int usbotg_init(struct platform_device *pdev) | |
149 | { | |
150 | int err; | |
151 | ||
152 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG); | |
153 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG); | |
154 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG); | |
155 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG); | |
156 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG); | |
157 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG); | |
158 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG); | |
159 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG); | |
160 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG); | |
161 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG); | |
162 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG); | |
163 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG); | |
164 | ||
165 | /* Chip already enabled by hardware */ | |
166 | /* OTG phy reset*/ | |
167 | err = gpio_request(OTG_RESET, "USB-OTG-RESET"); | |
168 | if (err) { | |
169 | pr_err("Failed to request the usb otg reset gpio\n"); | |
170 | return err; | |
171 | } | |
172 | ||
173 | err = gpio_direction_output(OTG_RESET, 1/*HIGH*/); | |
174 | if (err) { | |
175 | pr_err("Failed to reset the usb otg phy\n"); | |
176 | goto otg_free_reset; | |
177 | } | |
178 | ||
179 | gpio_set_value(OTG_RESET, 0/*LOW*/); | |
180 | mdelay(5); | |
181 | gpio_set_value(OTG_RESET, 1/*HIGH*/); | |
182 | ||
183 | return 0; | |
184 | ||
185 | otg_free_reset: | |
186 | gpio_free(OTG_RESET); | |
187 | return err; | |
188 | } | |
189 | ||
190 | static int usbh2_init(struct platform_device *pdev) | |
191 | { | |
192 | int err; | |
193 | ||
194 | mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG); | |
195 | mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG); | |
196 | mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG); | |
197 | mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG); | |
198 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG); | |
199 | mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG); | |
200 | mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG); | |
201 | mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG); | |
202 | mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG); | |
203 | mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG); | |
204 | mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG); | |
205 | mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG); | |
206 | ||
207 | mxc_iomux_set_gpr(MUX_PGP_UH2, true); | |
208 | ||
209 | ||
210 | /* Enable the chip */ | |
211 | err = gpio_request(USBH2_CS, "USB-H2-CS"); | |
212 | if (err) { | |
213 | pr_err("Failed to request the usb host 2 CS gpio\n"); | |
214 | return err; | |
215 | } | |
216 | ||
217 | err = gpio_direction_output(USBH2_CS, 0/*Enabled*/); | |
218 | if (err) { | |
219 | pr_err("Failed to drive the usb host 2 CS gpio\n"); | |
220 | goto h2_free_cs; | |
221 | } | |
222 | ||
223 | /* H2 phy reset*/ | |
224 | err = gpio_request(USBH2_RESET, "USB-H2-RESET"); | |
225 | if (err) { | |
226 | pr_err("Failed to request the usb host 2 reset gpio\n"); | |
227 | goto h2_free_cs; | |
228 | } | |
229 | ||
230 | err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/); | |
231 | if (err) { | |
232 | pr_err("Failed to reset the usb host 2 phy\n"); | |
233 | goto h2_free_reset; | |
234 | } | |
235 | ||
236 | gpio_set_value(USBH2_RESET, 0/*LOW*/); | |
237 | mdelay(5); | |
238 | gpio_set_value(USBH2_RESET, 1/*HIGH*/); | |
239 | ||
240 | return 0; | |
241 | ||
242 | h2_free_reset: | |
243 | gpio_free(USBH2_RESET); | |
244 | h2_free_cs: | |
245 | gpio_free(USBH2_CS); | |
246 | return err; | |
247 | } | |
248 | ||
249 | static struct mxc_usbh_platform_data usbotg_pdata = { | |
250 | .init = usbotg_init, | |
251 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | |
252 | .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI, | |
253 | }; | |
254 | ||
255 | static struct mxc_usbh_platform_data usbh2_pdata = { | |
256 | .init = usbh2_init, | |
257 | .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, | |
258 | .flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI, | |
259 | }; | |
260 | #endif /* CONFIG_USB_ULPI */ | |
261 | ||
2097abcb AP |
262 | /* RTC over I2C*/ |
263 | #define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4) | |
264 | ||
265 | static struct i2c_board_info armadillo5x0_i2c_rtc = { | |
266 | I2C_BOARD_INFO("s35390a", 0x30), | |
267 | }; | |
268 | ||
e33c049c AP |
269 | /* GPIO BUTTONS */ |
270 | static struct gpio_keys_button armadillo5x0_buttons[] = { | |
271 | { | |
272 | .code = KEY_ENTER, /*28*/ | |
273 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SCLK0), | |
274 | .active_low = 1, | |
275 | .desc = "menu", | |
276 | .wakeup = 1, | |
277 | }, { | |
278 | .code = KEY_BACK, /*158*/ | |
279 | .gpio = IOMUX_TO_GPIO(MX31_PIN_SRST0), | |
280 | .active_low = 1, | |
281 | .desc = "back", | |
282 | .wakeup = 1, | |
283 | } | |
284 | }; | |
285 | ||
286 | static struct gpio_keys_platform_data armadillo5x0_button_data = { | |
287 | .buttons = armadillo5x0_buttons, | |
288 | .nbuttons = ARRAY_SIZE(armadillo5x0_buttons), | |
289 | }; | |
290 | ||
291 | static struct platform_device armadillo5x0_button_device = { | |
292 | .name = "gpio-keys", | |
293 | .id = -1, | |
294 | .num_resources = 0, | |
295 | .dev = { | |
296 | .platform_data = &armadillo5x0_button_data, | |
297 | } | |
298 | }; | |
5e9145ed | 299 | |
0c8bad6a AP |
300 | /* |
301 | * NAND Flash | |
302 | */ | |
a2ceeef5 UKK |
303 | static const struct mxc_nand_platform_data |
304 | armadillo5x0_nand_board_info __initconst = { | |
0c8bad6a AP |
305 | .width = 1, |
306 | .hw_ecc = 1, | |
5e9145ed AP |
307 | }; |
308 | ||
c3a9c7f5 AP |
309 | /* |
310 | * MTD NOR Flash | |
311 | */ | |
312 | static struct mtd_partition armadillo5x0_nor_flash_partitions[] = { | |
313 | { | |
314 | .name = "nor.bootloader", | |
315 | .offset = 0x00000000, | |
316 | .size = 4*32*1024, | |
317 | }, { | |
318 | .name = "nor.kernel", | |
319 | .offset = MTDPART_OFS_APPEND, | |
320 | .size = 16*128*1024, | |
321 | }, { | |
322 | .name = "nor.userland", | |
323 | .offset = MTDPART_OFS_APPEND, | |
324 | .size = 110*128*1024, | |
325 | }, { | |
326 | .name = "nor.config", | |
327 | .offset = MTDPART_OFS_APPEND, | |
328 | .size = 1*128*1024, | |
329 | }, | |
330 | }; | |
331 | ||
332 | static struct physmap_flash_data armadillo5x0_nor_flash_pdata = { | |
333 | .width = 2, | |
334 | .parts = armadillo5x0_nor_flash_partitions, | |
335 | .nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions), | |
336 | }; | |
337 | ||
338 | static struct resource armadillo5x0_nor_flash_resource = { | |
339 | .flags = IORESOURCE_MEM, | |
f568dd7f UKK |
340 | .start = MX31_CS0_BASE_ADDR, |
341 | .end = MX31_CS0_BASE_ADDR + SZ_64M - 1, | |
c3a9c7f5 AP |
342 | }; |
343 | ||
344 | static struct platform_device armadillo5x0_nor_flash = { | |
345 | .name = "physmap-flash", | |
346 | .id = -1, | |
347 | .num_resources = 1, | |
348 | .resource = &armadillo5x0_nor_flash_resource, | |
349 | }; | |
350 | ||
5e9145ed AP |
351 | /* |
352 | * FB support | |
353 | */ | |
354 | static const struct fb_videomode fb_modedb[] = { | |
355 | { /* 640x480 @ 60 Hz */ | |
356 | .name = "CRT-VGA", | |
357 | .refresh = 60, | |
358 | .xres = 640, | |
359 | .yres = 480, | |
360 | .pixclock = 39721, | |
361 | .left_margin = 35, | |
362 | .right_margin = 115, | |
363 | .upper_margin = 43, | |
364 | .lower_margin = 1, | |
365 | .hsync_len = 10, | |
366 | .vsync_len = 1, | |
367 | .sync = FB_SYNC_OE_ACT_HIGH, | |
368 | .vmode = FB_VMODE_NONINTERLACED, | |
369 | .flag = 0, | |
370 | }, {/* 800x600 @ 56 Hz */ | |
371 | .name = "CRT-SVGA", | |
372 | .refresh = 56, | |
373 | .xres = 800, | |
374 | .yres = 600, | |
375 | .pixclock = 30000, | |
376 | .left_margin = 30, | |
377 | .right_margin = 108, | |
378 | .upper_margin = 13, | |
379 | .lower_margin = 10, | |
380 | .hsync_len = 10, | |
381 | .vsync_len = 1, | |
382 | .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT | | |
383 | FB_SYNC_VERT_HIGH_ACT, | |
384 | .vmode = FB_VMODE_NONINTERLACED, | |
385 | .flag = 0, | |
386 | }, | |
387 | }; | |
388 | ||
389 | static struct ipu_platform_data mx3_ipu_data = { | |
390 | .irq_base = MXC_IPU_IRQ_START, | |
391 | }; | |
392 | ||
393 | static struct mx3fb_platform_data mx3fb_pdata = { | |
394 | .dma_dev = &mx3_ipu.dev, | |
395 | .name = "CRT-VGA", | |
396 | .mode = fb_modedb, | |
397 | .num_modes = ARRAY_SIZE(fb_modedb), | |
398 | }; | |
399 | ||
400 | /* | |
401 | * SDHC 1 | |
402 | * MMC support | |
403 | */ | |
404 | static int armadillo5x0_sdhc1_get_ro(struct device *dev) | |
405 | { | |
406 | return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B)); | |
407 | } | |
408 | ||
409 | static int armadillo5x0_sdhc1_init(struct device *dev, | |
410 | irq_handler_t detect_irq, void *data) | |
411 | { | |
412 | int ret; | |
413 | int gpio_det, gpio_wp; | |
414 | ||
415 | gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK); | |
416 | gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B); | |
417 | ||
418 | ret = gpio_request(gpio_det, "sdhc-card-detect"); | |
419 | if (ret) | |
420 | return ret; | |
421 | ||
422 | gpio_direction_input(gpio_det); | |
423 | ||
424 | ret = gpio_request(gpio_wp, "sdhc-write-protect"); | |
425 | if (ret) | |
426 | goto err_gpio_free; | |
427 | ||
428 | gpio_direction_input(gpio_wp); | |
429 | ||
430 | /* When supported the trigger type have to be BOTH */ | |
431 | ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), detect_irq, | |
432 | IRQF_DISABLED | IRQF_TRIGGER_FALLING, | |
433 | "sdhc-detect", data); | |
434 | ||
435 | if (ret) | |
436 | goto err_gpio_free_2; | |
437 | ||
438 | return 0; | |
439 | ||
440 | err_gpio_free_2: | |
441 | gpio_free(gpio_wp); | |
442 | ||
443 | err_gpio_free: | |
444 | gpio_free(gpio_det); | |
445 | ||
446 | return ret; | |
447 | ||
448 | } | |
449 | ||
450 | static void armadillo5x0_sdhc1_exit(struct device *dev, void *data) | |
451 | { | |
452 | free_irq(IOMUX_TO_IRQ(MX31_PIN_ATA_DMACK), data); | |
453 | gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)); | |
454 | gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B)); | |
455 | } | |
456 | ||
457 | static struct imxmmc_platform_data sdhc_pdata = { | |
458 | .get_ro = armadillo5x0_sdhc1_get_ro, | |
459 | .init = armadillo5x0_sdhc1_init, | |
460 | .exit = armadillo5x0_sdhc1_exit, | |
461 | }; | |
462 | ||
463 | /* | |
464 | * SMSC 9118 | |
465 | * Network support | |
466 | */ | |
467 | static struct resource armadillo5x0_smc911x_resources[] = { | |
468 | { | |
f568dd7f UKK |
469 | .start = MX31_CS3_BASE_ADDR, |
470 | .end = MX31_CS3_BASE_ADDR + SZ_32M - 1, | |
5e9145ed AP |
471 | .flags = IORESOURCE_MEM, |
472 | }, { | |
473 | .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0), | |
474 | .end = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0), | |
475 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
476 | }, | |
477 | }; | |
478 | ||
479 | static struct smsc911x_platform_config smsc911x_info = { | |
07299ca3 | 480 | .flags = SMSC911X_USE_16BIT, |
5e9145ed AP |
481 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, |
482 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | |
483 | }; | |
484 | ||
485 | static struct platform_device armadillo5x0_smc911x_device = { | |
486 | .name = "smsc911x", | |
487 | .id = -1, | |
488 | .num_resources = ARRAY_SIZE(armadillo5x0_smc911x_resources), | |
489 | .resource = armadillo5x0_smc911x_resources, | |
490 | .dev = { | |
491 | .platform_data = &smsc911x_info, | |
492 | }, | |
493 | }; | |
494 | ||
495 | /* UART device data */ | |
496 | static struct imxuart_platform_data uart_pdata = { | |
497 | .flags = IMXUART_HAVE_RTSCTS, | |
498 | }; | |
499 | ||
500 | static struct platform_device *devices[] __initdata = { | |
501 | &armadillo5x0_smc911x_device, | |
e9a6c5d0 | 502 | &mxc_i2c_device1, |
e33c049c | 503 | &armadillo5x0_button_device, |
5e9145ed AP |
504 | }; |
505 | ||
506 | /* | |
507 | * Perform board specific initializations | |
508 | */ | |
509 | static void __init armadillo5x0_init(void) | |
510 | { | |
511 | mxc_iomux_setup_multiple_pins(armadillo5x0_pins, | |
512 | ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0"); | |
513 | ||
514 | platform_add_devices(devices, ARRAY_SIZE(devices)); | |
515 | ||
516 | /* Register UART */ | |
517 | mxc_register_device(&mxc_uart_device0, &uart_pdata); | |
518 | mxc_register_device(&mxc_uart_device1, &uart_pdata); | |
519 | ||
520 | /* SMSC9118 IRQ pin */ | |
521 | gpio_direction_input(MX31_PIN_GPIO1_0); | |
522 | ||
523 | /* Register SDHC */ | |
524 | mxc_register_device(&mxcsdhc_device0, &sdhc_pdata); | |
525 | ||
526 | /* Register FB */ | |
527 | mxc_register_device(&mx3_ipu, &mx3_ipu_data); | |
528 | mxc_register_device(&mx3_fb, &mx3fb_pdata); | |
c3a9c7f5 AP |
529 | |
530 | /* Register NOR Flash */ | |
531 | mxc_register_device(&armadillo5x0_nor_flash, | |
532 | &armadillo5x0_nor_flash_pdata); | |
0c8bad6a AP |
533 | |
534 | /* Register NAND Flash */ | |
a2ceeef5 | 535 | imx31_add_mxc_nand(&armadillo5x0_nand_board_info); |
0c8bad6a AP |
536 | |
537 | /* set NAND page size to 2k if not configured via boot mode pins */ | |
538 | __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); | |
2097abcb AP |
539 | |
540 | /* RTC */ | |
541 | /* Get RTC IRQ and register the chip */ | |
542 | if (gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc") == 0) { | |
543 | if (gpio_direction_input(ARMADILLO5X0_RTC_GPIO) == 0) | |
544 | armadillo5x0_i2c_rtc.irq = gpio_to_irq(ARMADILLO5X0_RTC_GPIO); | |
545 | else | |
546 | gpio_free(ARMADILLO5X0_RTC_GPIO); | |
547 | } | |
548 | if (armadillo5x0_i2c_rtc.irq == 0) | |
549 | pr_warning("armadillo5x0_init: failed to get RTC IRQ\n"); | |
550 | i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1); | |
b3aa111f AP |
551 | |
552 | /* USB */ | |
553 | #if defined(CONFIG_USB_ULPI) | |
554 | usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | |
555 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); | |
556 | usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | |
557 | USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); | |
558 | ||
559 | mxc_register_device(&mxc_otg_host, &usbotg_pdata); | |
560 | mxc_register_device(&mxc_usbh2, &usbh2_pdata); | |
561 | #endif | |
5e9145ed AP |
562 | } |
563 | ||
5e9145ed AP |
564 | static void __init armadillo5x0_timer_init(void) |
565 | { | |
566 | mx31_clocks_init(26000000); | |
567 | } | |
568 | ||
569 | static struct sys_timer armadillo5x0_timer = { | |
570 | .init = armadillo5x0_timer_init, | |
571 | }; | |
572 | ||
573 | MACHINE_START(ARMADILLO5X0, "Armadillo-500") | |
574 | /* Maintainer: Alberto Panizzo */ | |
f568dd7f | 575 | .phys_io = MX31_AIPS1_BASE_ADDR, |
321ed164 | 576 | .io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc, |
34101237 | 577 | .boot_params = MX3x_PHYS_OFFSET + 0x100, |
4e0f0881 | 578 | .map_io = mx31_map_io, |
c5aa0ad0 | 579 | .init_irq = mx31_init_irq, |
5e9145ed AP |
580 | .timer = &armadillo5x0_timer, |
581 | .init_machine = armadillo5x0_init, | |
582 | MACHINE_END |