Commit | Line | Data |
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1553a1ec FE |
1 | /* |
2 | * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License as published by | |
6 | * the Free Software Foundation; either version 2 of the License, or | |
7 | * (at your option) any later version. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
1553a1ec FE |
13 | */ |
14 | ||
a2ef4562 | 15 | #include <linux/delay.h> |
1553a1ec FE |
16 | #include <linux/types.h> |
17 | #include <linux/init.h> | |
18 | #include <linux/clk.h> | |
19 | #include <linux/irq.h> | |
135cad36 | 20 | #include <linux/gpio.h> |
2b0c3677 | 21 | #include <linux/platform_device.h> |
ae7a3f13 AP |
22 | #include <linux/mfd/mc13783.h> |
23 | #include <linux/spi/spi.h> | |
24 | #include <linux/regulator/machine.h> | |
1c50e672 FE |
25 | #include <linux/usb/otg.h> |
26 | #include <linux/usb/ulpi.h> | |
1553a1ec FE |
27 | |
28 | #include <mach/hardware.h> | |
29 | #include <asm/mach-types.h> | |
30 | #include <asm/mach/arch.h> | |
31 | #include <asm/mach/time.h> | |
32 | #include <asm/memory.h> | |
33 | #include <asm/mach/map.h> | |
34 | #include <mach/common.h> | |
1553a1ec | 35 | #include <mach/iomux-mx3.h> |
c5d38f08 | 36 | #include <mach/3ds_debugboard.h> |
1c50e672 | 37 | #include <mach/ulpi.h> |
a2ceeef5 UKK |
38 | |
39 | #include "devices-imx31.h" | |
1553a1ec FE |
40 | #include "devices.h" |
41 | ||
b396dc45 UKK |
42 | /* CPLD IRQ line for external uart, external ethernet etc */ |
43 | #define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1) | |
44 | ||
b396dc45 UKK |
45 | /* |
46 | * This file contains the board-specific initialization routines. | |
1553a1ec FE |
47 | */ |
48 | ||
11a332ad | 49 | static int mx31_3ds_pins[] = { |
153fa1d8 | 50 | /* UART1 */ |
63d97667 VL |
51 | MX31_PIN_CTS1__CTS1, |
52 | MX31_PIN_RTS1__RTS1, | |
53 | MX31_PIN_TXD1__TXD1, | |
135cad36 ML |
54 | MX31_PIN_RXD1__RXD1, |
55 | IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO), | |
a1ac4424 AP |
56 | /* SPI 1 */ |
57 | MX31_PIN_CSPI2_SCLK__SCLK, | |
58 | MX31_PIN_CSPI2_MOSI__MOSI, | |
59 | MX31_PIN_CSPI2_MISO__MISO, | |
60 | MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, | |
61 | MX31_PIN_CSPI2_SS0__SS0, | |
62 | MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */ | |
ae7a3f13 AP |
63 | /* MC13783 IRQ */ |
64 | IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO), | |
a2ef4562 ML |
65 | /* USB OTG reset */ |
66 | IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO), | |
67 | /* USB OTG */ | |
68 | MX31_PIN_USBOTG_DATA0__USBOTG_DATA0, | |
69 | MX31_PIN_USBOTG_DATA1__USBOTG_DATA1, | |
70 | MX31_PIN_USBOTG_DATA2__USBOTG_DATA2, | |
71 | MX31_PIN_USBOTG_DATA3__USBOTG_DATA3, | |
72 | MX31_PIN_USBOTG_DATA4__USBOTG_DATA4, | |
73 | MX31_PIN_USBOTG_DATA5__USBOTG_DATA5, | |
74 | MX31_PIN_USBOTG_DATA6__USBOTG_DATA6, | |
75 | MX31_PIN_USBOTG_DATA7__USBOTG_DATA7, | |
76 | MX31_PIN_USBOTG_CLK__USBOTG_CLK, | |
77 | MX31_PIN_USBOTG_DIR__USBOTG_DIR, | |
78 | MX31_PIN_USBOTG_NXT__USBOTG_NXT, | |
79 | MX31_PIN_USBOTG_STP__USBOTG_STP, | |
54c1f636 AP |
80 | /*Keyboard*/ |
81 | MX31_PIN_KEY_ROW0_KEY_ROW0, | |
82 | MX31_PIN_KEY_ROW1_KEY_ROW1, | |
83 | MX31_PIN_KEY_ROW2_KEY_ROW2, | |
84 | MX31_PIN_KEY_COL0_KEY_COL0, | |
85 | MX31_PIN_KEY_COL1_KEY_COL1, | |
86 | MX31_PIN_KEY_COL2_KEY_COL2, | |
87 | MX31_PIN_KEY_COL3_KEY_COL3, | |
88 | }; | |
89 | ||
90 | /* | |
91 | * Matrix keyboard | |
92 | */ | |
93 | ||
94 | static const uint32_t mx31_3ds_keymap[] = { | |
95 | KEY(0, 0, KEY_UP), | |
96 | KEY(0, 1, KEY_DOWN), | |
97 | KEY(1, 0, KEY_RIGHT), | |
98 | KEY(1, 1, KEY_LEFT), | |
99 | KEY(1, 2, KEY_ENTER), | |
100 | KEY(2, 0, KEY_F6), | |
101 | KEY(2, 1, KEY_F8), | |
102 | KEY(2, 2, KEY_F9), | |
103 | KEY(2, 3, KEY_F10), | |
104 | }; | |
105 | ||
d690b4c4 | 106 | static const struct matrix_keymap_data mx31_3ds_keymap_data __initconst = { |
54c1f636 AP |
107 | .keymap = mx31_3ds_keymap, |
108 | .keymap_size = ARRAY_SIZE(mx31_3ds_keymap), | |
ae7a3f13 AP |
109 | }; |
110 | ||
111 | /* Regulators */ | |
112 | static struct regulator_init_data pwgtx_init = { | |
113 | .constraints = { | |
114 | .boot_on = 1, | |
115 | .always_on = 1, | |
116 | }, | |
117 | }; | |
118 | ||
119 | static struct mc13783_regulator_init_data mx31_3ds_regulators[] = { | |
120 | { | |
121 | .id = MC13783_REGU_PWGT1SPI, /* Power Gate for ARM core. */ | |
122 | .init_data = &pwgtx_init, | |
123 | }, { | |
124 | .id = MC13783_REGU_PWGT2SPI, /* Power Gate for L2 Cache. */ | |
125 | .init_data = &pwgtx_init, | |
126 | }, | |
127 | }; | |
128 | ||
129 | /* MC13783 */ | |
130 | static struct mc13783_platform_data mc13783_pdata __initdata = { | |
131 | .regulators = mx31_3ds_regulators, | |
132 | .num_regulators = ARRAY_SIZE(mx31_3ds_regulators), | |
bd02a9e5 | 133 | .flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN, |
a1ac4424 AP |
134 | }; |
135 | ||
136 | /* SPI */ | |
137 | static int spi1_internal_chipselect[] = { | |
138 | MXC_SPI_CS(0), | |
139 | MXC_SPI_CS(2), | |
140 | }; | |
141 | ||
06606ff1 | 142 | static const struct spi_imx_master spi1_pdata __initconst = { |
a1ac4424 AP |
143 | .chipselect = spi1_internal_chipselect, |
144 | .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect), | |
63d97667 VL |
145 | }; |
146 | ||
ae7a3f13 AP |
147 | static struct spi_board_info mx31_3ds_spi_devs[] __initdata = { |
148 | { | |
149 | .modalias = "mc13783", | |
150 | .max_speed_hz = 1000000, | |
151 | .bus_num = 1, | |
152 | .chip_select = 1, /* SS2 */ | |
153 | .platform_data = &mc13783_pdata, | |
154 | .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3), | |
155 | .mode = SPI_CS_HIGH, | |
156 | }, | |
157 | }; | |
158 | ||
a1b67b95 AP |
159 | /* |
160 | * NAND Flash | |
161 | */ | |
a2ceeef5 UKK |
162 | static const struct mxc_nand_platform_data |
163 | mx31_3ds_nand_board_info __initconst = { | |
a1b67b95 AP |
164 | .width = 1, |
165 | .hw_ecc = 1, | |
166 | #ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT | |
167 | .flash_bbt = 1, | |
168 | #endif | |
169 | }; | |
170 | ||
a2ef4562 ML |
171 | /* |
172 | * USB OTG | |
173 | */ | |
174 | ||
175 | #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ | |
176 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU) | |
177 | ||
178 | #define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR) | |
179 | ||
41f63475 | 180 | static int mx31_3ds_usbotg_init(void) |
a2ef4562 | 181 | { |
41f63475 FE |
182 | int err; |
183 | ||
a2ef4562 ML |
184 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG); |
185 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG); | |
186 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG); | |
187 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG); | |
188 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG); | |
189 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG); | |
190 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG); | |
191 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG); | |
192 | mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG); | |
193 | mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG); | |
194 | mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG); | |
195 | mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG); | |
196 | ||
41f63475 FE |
197 | err = gpio_request(USBOTG_RST_B, "otgusb-reset"); |
198 | if (err) { | |
199 | pr_err("Failed to request the USB OTG reset gpio\n"); | |
200 | return err; | |
201 | } | |
202 | ||
203 | err = gpio_direction_output(USBOTG_RST_B, 0); | |
204 | if (err) { | |
205 | pr_err("Failed to drive the USB OTG reset gpio\n"); | |
206 | goto usbotg_free_reset; | |
207 | } | |
208 | ||
a2ef4562 ML |
209 | mdelay(1); |
210 | gpio_set_value(USBOTG_RST_B, 1); | |
41f63475 FE |
211 | return 0; |
212 | ||
213 | usbotg_free_reset: | |
214 | gpio_free(USBOTG_RST_B); | |
215 | return err; | |
a2ef4562 ML |
216 | } |
217 | ||
1c50e672 FE |
218 | #if defined(CONFIG_USB_ULPI) |
219 | static struct mxc_usbh_platform_data otg_pdata __initdata = { | |
220 | .portsc = MXC_EHCI_MODE_ULPI, | |
221 | .flags = MXC_EHCI_POWER_PINS_ENABLED, | |
222 | }; | |
223 | #endif | |
224 | ||
9e1dde33 | 225 | static const struct fsl_usb2_platform_data usbotg_pdata __initconst = { |
a2ef4562 ML |
226 | .operating_mode = FSL_USB2_DR_DEVICE, |
227 | .phy_mode = FSL_USB2_PHY_ULPI, | |
228 | }; | |
229 | ||
1c50e672 FE |
230 | static int otg_mode_host; |
231 | ||
232 | static int __init mx31_3ds_otg_mode(char *options) | |
233 | { | |
234 | if (!strcmp(options, "host")) | |
235 | otg_mode_host = 1; | |
236 | else if (!strcmp(options, "device")) | |
237 | otg_mode_host = 0; | |
238 | else | |
239 | pr_info("otg_mode neither \"host\" nor \"device\". " | |
240 | "Defaulting to device\n"); | |
241 | return 0; | |
242 | } | |
243 | __setup("otg_mode=", mx31_3ds_otg_mode); | |
244 | ||
16cf5c41 | 245 | static const struct imxuart_platform_data uart_pdata __initconst = { |
153fa1d8 ML |
246 | .flags = IMXUART_HAVE_RTSCTS, |
247 | }; | |
1553a1ec | 248 | |
135cad36 ML |
249 | /* |
250 | * Set up static virtual mappings. | |
251 | */ | |
11a332ad | 252 | static void __init mx31_3ds_map_io(void) |
135cad36 ML |
253 | { |
254 | mx31_map_io(); | |
135cad36 ML |
255 | } |
256 | ||
1553a1ec FE |
257 | /*! |
258 | * Board specific initialization. | |
259 | */ | |
260 | static void __init mxc_board_init(void) | |
261 | { | |
11a332ad AP |
262 | mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins), |
263 | "mx31_3ds"); | |
153fa1d8 | 264 | |
16cf5c41 | 265 | imx31_add_imx_uart0(&uart_pdata); |
a2ceeef5 | 266 | imx31_add_mxc_nand(&mx31_3ds_nand_board_info); |
ae7a3f13 | 267 | |
4a74bddc | 268 | imx31_add_spi_imx1(&spi1_pdata); |
ae7a3f13 AP |
269 | spi_register_board_info(mx31_3ds_spi_devs, |
270 | ARRAY_SIZE(mx31_3ds_spi_devs)); | |
135cad36 | 271 | |
d690b4c4 | 272 | imx31_add_imx_keypad(&mx31_3ds_keymap_data); |
54c1f636 | 273 | |
a2ef4562 | 274 | mx31_3ds_usbotg_init(); |
1c50e672 FE |
275 | #if defined(CONFIG_USB_ULPI) |
276 | if (otg_mode_host) { | |
277 | otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, | |
278 | ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); | |
279 | ||
280 | imx31_add_mxc_ehci_otg(&otg_pdata); | |
281 | } | |
282 | #endif | |
283 | if (!otg_mode_host) | |
284 | imx31_add_fsl_usb2_udc(&usbotg_pdata); | |
a2ef4562 | 285 | |
b8be7b9a RP |
286 | if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT)) |
287 | printk(KERN_WARNING "Init of the debug board failed, all " | |
288 | "devices on the debug board are unusable.\n"); | |
bfdde3a9 | 289 | imx31_add_imx2_wdt(NULL); |
1553a1ec FE |
290 | } |
291 | ||
11a332ad | 292 | static void __init mx31_3ds_timer_init(void) |
1553a1ec | 293 | { |
30c730f8 | 294 | mx31_clocks_init(26000000); |
1553a1ec FE |
295 | } |
296 | ||
11a332ad AP |
297 | static struct sys_timer mx31_3ds_timer = { |
298 | .init = mx31_3ds_timer_init, | |
1553a1ec FE |
299 | }; |
300 | ||
301 | /* | |
302 | * The following uses standard kernel macros defined in arch.h in order to | |
11a332ad | 303 | * initialize __mach_desc_MX31_3DS data structure. |
1553a1ec FE |
304 | */ |
305 | MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") | |
306 | /* Maintainer: Freescale Semiconductor, Inc. */ | |
34101237 | 307 | .boot_params = MX3x_PHYS_OFFSET + 0x100, |
11a332ad | 308 | .map_io = mx31_3ds_map_io, |
c5aa0ad0 | 309 | .init_irq = mx31_init_irq, |
1553a1ec | 310 | .init_machine = mxc_board_init, |
11a332ad | 311 | .timer = &mx31_3ds_timer, |
1553a1ec | 312 | MACHINE_END |