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aefa1c6e FE |
1 | /* |
2 | * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved. | |
d17e1c1a | 3 | * Copyright (C) 2009 Marc Kleine-Budde, Pengutronix |
aefa1c6e FE |
4 | * |
5 | * Author: Fabio Estevam <fabio.estevam@freescale.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
aefa1c6e FE |
16 | */ |
17 | ||
767c38b2 UKK |
18 | /* |
19 | * This machine is known as: | |
20 | * - i.MX35 3-Stack Development System | |
21 | * - i.MX35 Platform Development Kit (i.MX35 PDK) | |
22 | */ | |
23 | ||
aefa1c6e FE |
24 | #include <linux/types.h> |
25 | #include <linux/init.h> | |
26 | #include <linux/platform_device.h> | |
27 | #include <linux/memory.h> | |
28 | #include <linux/gpio.h> | |
130a0dda | 29 | #include <linux/usb/otg.h> |
aefa1c6e | 30 | |
d17e1c1a MKB |
31 | #include <linux/mtd/physmap.h> |
32 | ||
aefa1c6e FE |
33 | #include <asm/mach-types.h> |
34 | #include <asm/mach/arch.h> | |
35 | #include <asm/mach/time.h> | |
36 | #include <asm/mach/map.h> | |
37 | ||
38 | #include <mach/hardware.h> | |
39 | #include <mach/common.h> | |
aefa1c6e | 40 | #include <mach/iomux-mx35.h> |
2c6605de XJ |
41 | #include <mach/irqs.h> |
42 | #include <mach/3ds_debugboard.h> | |
aefa1c6e | 43 | |
6eafde5f | 44 | #include "devices-imx35.h" |
aefa1c6e FE |
45 | #include "devices.h" |
46 | ||
2c6605de XJ |
47 | #define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTA + 1) |
48 | ||
6eafde5f | 49 | static const struct imxuart_platform_data uart_pdata __initconst = { |
aefa1c6e FE |
50 | .flags = IMXUART_HAVE_RTSCTS, |
51 | }; | |
52 | ||
d17e1c1a MKB |
53 | static struct physmap_flash_data mx35pdk_flash_data = { |
54 | .width = 2, | |
55 | }; | |
56 | ||
57 | static struct resource mx35pdk_flash_resource = { | |
58 | .start = MX35_CS0_BASE_ADDR, | |
59 | .end = MX35_CS0_BASE_ADDR + SZ_64M - 1, | |
60 | .flags = IORESOURCE_MEM, | |
61 | }; | |
62 | ||
63 | static struct platform_device mx35pdk_flash = { | |
64 | .name = "physmap-flash", | |
65 | .id = 0, | |
66 | .dev = { | |
67 | .platform_data = &mx35pdk_flash_data, | |
68 | }, | |
69 | .resource = &mx35pdk_flash_resource, | |
70 | .num_resources = 1, | |
71 | }; | |
72 | ||
81aa1720 MKB |
73 | static const struct mxc_nand_platform_data mx35pdk_nand_board_info __initconst = { |
74 | .width = 1, | |
75 | .hw_ecc = 1, | |
76 | .flash_bbt = 1, | |
77 | }; | |
78 | ||
aefa1c6e | 79 | static struct platform_device *devices[] __initdata = { |
d17e1c1a | 80 | &mx35pdk_flash, |
aefa1c6e FE |
81 | }; |
82 | ||
8f5260c8 | 83 | static iomux_v3_cfg_t mx35pdk_pads[] = { |
aefa1c6e FE |
84 | /* UART1 */ |
85 | MX35_PAD_CTS1__UART1_CTS, | |
86 | MX35_PAD_RTS1__UART1_RTS, | |
87 | MX35_PAD_TXD1__UART1_TXD_MUX, | |
88 | MX35_PAD_RXD1__UART1_RXD_MUX, | |
89 | /* FEC */ | |
90 | MX35_PAD_FEC_TX_CLK__FEC_TX_CLK, | |
91 | MX35_PAD_FEC_RX_CLK__FEC_RX_CLK, | |
92 | MX35_PAD_FEC_RX_DV__FEC_RX_DV, | |
93 | MX35_PAD_FEC_COL__FEC_COL, | |
94 | MX35_PAD_FEC_RDATA0__FEC_RDATA_0, | |
95 | MX35_PAD_FEC_TDATA0__FEC_TDATA_0, | |
96 | MX35_PAD_FEC_TX_EN__FEC_TX_EN, | |
97 | MX35_PAD_FEC_MDC__FEC_MDC, | |
98 | MX35_PAD_FEC_MDIO__FEC_MDIO, | |
99 | MX35_PAD_FEC_TX_ERR__FEC_TX_ERR, | |
100 | MX35_PAD_FEC_RX_ERR__FEC_RX_ERR, | |
101 | MX35_PAD_FEC_CRS__FEC_CRS, | |
102 | MX35_PAD_FEC_RDATA1__FEC_RDATA_1, | |
103 | MX35_PAD_FEC_TDATA1__FEC_TDATA_1, | |
104 | MX35_PAD_FEC_RDATA2__FEC_RDATA_2, | |
105 | MX35_PAD_FEC_TDATA2__FEC_TDATA_2, | |
106 | MX35_PAD_FEC_RDATA3__FEC_RDATA_3, | |
107 | MX35_PAD_FEC_TDATA3__FEC_TDATA_3, | |
9c2daf15 HH |
108 | /* USBOTG */ |
109 | MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR, | |
110 | MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC, | |
ab3d8b58 MKB |
111 | /* USBH1 */ |
112 | MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR, | |
113 | MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC, | |
6207c833 SG |
114 | /* SDCARD */ |
115 | MX35_PAD_SD1_CMD__ESDHC1_CMD, | |
116 | MX35_PAD_SD1_CLK__ESDHC1_CLK, | |
117 | MX35_PAD_SD1_DATA0__ESDHC1_DAT0, | |
118 | MX35_PAD_SD1_DATA1__ESDHC1_DAT1, | |
119 | MX35_PAD_SD1_DATA2__ESDHC1_DAT2, | |
120 | MX35_PAD_SD1_DATA3__ESDHC1_DAT3, | |
9c2daf15 HH |
121 | }; |
122 | ||
123 | /* OTG config */ | |
9e1dde33 | 124 | static const struct fsl_usb2_platform_data usb_otg_pdata __initconst = { |
9c2daf15 HH |
125 | .operating_mode = FSL_USB2_DR_DEVICE, |
126 | .phy_mode = FSL_USB2_PHY_UTMI_WIDE, | |
aefa1c6e FE |
127 | }; |
128 | ||
130a0dda FE |
129 | static struct mxc_usbh_platform_data otg_pdata __initdata = { |
130 | .portsc = MXC_EHCI_MODE_UTMI, | |
131 | .flags = MXC_EHCI_INTERNAL_PHY, | |
132 | }; | |
133 | ||
ab3d8b58 | 134 | /* USB HOST config */ |
2d58de28 | 135 | static const struct mxc_usbh_platform_data usb_host_pdata __initconst = { |
ab3d8b58 MKB |
136 | .portsc = MXC_EHCI_MODE_SERIAL, |
137 | .flags = MXC_EHCI_INTERFACE_SINGLE_UNI | | |
138 | MXC_EHCI_INTERNAL_PHY, | |
139 | }; | |
140 | ||
130a0dda FE |
141 | static int otg_mode_host; |
142 | ||
143 | static int __init mx35_3ds_otg_mode(char *options) | |
144 | { | |
145 | if (!strcmp(options, "host")) | |
146 | otg_mode_host = 1; | |
147 | else if (!strcmp(options, "device")) | |
148 | otg_mode_host = 0; | |
149 | else | |
150 | pr_info("otg_mode neither \"host\" nor \"device\". " | |
151 | "Defaulting to device\n"); | |
152 | return 0; | |
153 | } | |
154 | __setup("otg_mode=", mx35_3ds_otg_mode); | |
155 | ||
aefa1c6e FE |
156 | /* |
157 | * Board specific initialization. | |
158 | */ | |
159 | static void __init mxc_board_init(void) | |
160 | { | |
161 | mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads)); | |
162 | ||
6bd96f3c | 163 | imx35_add_fec(NULL); |
c496fa6b | 164 | imx35_add_imx2_wdt(NULL); |
aefa1c6e FE |
165 | platform_add_devices(devices, ARRAY_SIZE(devices)); |
166 | ||
6eafde5f | 167 | imx35_add_imx_uart0(&uart_pdata); |
9c2daf15 | 168 | |
130a0dda FE |
169 | if (otg_mode_host) |
170 | imx35_add_mxc_ehci_otg(&otg_pdata); | |
81aa1720 | 171 | |
2d58de28 | 172 | imx35_add_mxc_ehci_hs(&usb_host_pdata); |
ab3d8b58 | 173 | |
130a0dda FE |
174 | if (!otg_mode_host) |
175 | imx35_add_fsl_usb2_udc(&usb_otg_pdata); | |
176 | ||
81aa1720 | 177 | imx35_add_mxc_nand(&mx35pdk_nand_board_info); |
124bf94a | 178 | imx35_add_sdhci_esdhc_imx(0, NULL); |
2c6605de XJ |
179 | |
180 | if (mxc_expio_init(MX35_CS5_BASE_ADDR, EXPIO_PARENT_INT)) | |
181 | pr_warn("Init of the debugboard failed, all " | |
182 | "devices on the debugboard are unusable.\n"); | |
aefa1c6e FE |
183 | } |
184 | ||
185 | static void __init mx35pdk_timer_init(void) | |
186 | { | |
187 | mx35_clocks_init(); | |
188 | } | |
189 | ||
190 | struct sys_timer mx35pdk_timer = { | |
191 | .init = mx35pdk_timer_init, | |
192 | }; | |
193 | ||
194 | MACHINE_START(MX35_3DS, "Freescale MX35PDK") | |
195 | /* Maintainer: Freescale Semiconductor, Inc */ | |
34101237 | 196 | .boot_params = MX3x_PHYS_OFFSET + 0x100, |
aefa1c6e | 197 | .map_io = mx35_map_io, |
c5aa0ad0 | 198 | .init_irq = mx35_init_irq, |
aefa1c6e FE |
199 | .init_machine = mxc_board_init, |
200 | .timer = &mx35pdk_timer, | |
201 | MACHINE_END |