[deliverable/linux.git] / arch / arm / mach-mx3 / mx31moboard-devboard.c

/*
 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/types.h>

#include <linux/usb/otg.h>

#include <mach/common.h>
#include <mach/iomux-mx3.h>
#include <mach/hardware.h>
#include <mach/ulpi.h>

#include "devices-imx31.h"
#include "devices.h"

static unsigned int devboard_pins[] = {
	/* UART1 */
	MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
	MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
	/* SDHC2 */
	MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
	MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
	MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
	MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
	/* USB H1 */
	MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
	MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
	MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
	MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
	MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
	/* SEL */
	MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
	MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
};

static const struct imxuart_platform_data uart_pdata __initconst = {
	.flags = IMXUART_HAVE_RTSCTS,
};

#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)

static int devboard_sdhc2_get_ro(struct device *dev)
{
	return !gpio_get_value(SDHC2_WP);
}

static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
		void *data)
{
	int ret;

	ret = gpio_request(SDHC2_CD, "sdhc-detect");
	if (ret)
		return ret;

	gpio_direction_input(SDHC2_CD);

	ret = gpio_request(SDHC2_WP, "sdhc-wp");
	if (ret)
		goto err_gpio_free;
	gpio_direction_input(SDHC2_WP);

	ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
		IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
		"sdhc2-card-detect", data);
	if (ret)
		goto err_gpio_free_2;

	return 0;

err_gpio_free_2:
	gpio_free(SDHC2_WP);
err_gpio_free:
	gpio_free(SDHC2_CD);

	return ret;
}

static void devboard_sdhc2_exit(struct device *dev, void *data)
{
	free_irq(gpio_to_irq(SDHC2_CD), data);
	gpio_free(SDHC2_WP);
	gpio_free(SDHC2_CD);
}

static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
	.get_ro	= devboard_sdhc2_get_ro,
	.init	= devboard_sdhc2_init,
	.exit	= devboard_sdhc2_exit,
};

#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)

static void devboard_init_sel_gpios(void)
{
	if (!gpio_request(SEL0, "sel0")) {
		gpio_direction_input(SEL0);
		gpio_export(SEL0, true);
	}

	if (!gpio_request(SEL1, "sel1")) {
		gpio_direction_input(SEL1);
		gpio_export(SEL1, true);
	}

	if (!gpio_request(SEL2, "sel2")) {
		gpio_direction_input(SEL2);
		gpio_export(SEL2, true);
	}

	if (!gpio_request(SEL3, "sel3")) {
		gpio_direction_input(SEL3);
		gpio_export(SEL3, true);
	}
}
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
			PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)

static int devboard_usbh1_hw_init(struct platform_device *pdev)
{
	mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);

	mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
	mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);

	return 0;
}

#define USBH1_VBUSEN_B	IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
#define USBH1_MODE	IOMUX_TO_GPIO(MX31_PIN_NFALE)

static int devboard_isp1105_init(struct otg_transceiver *otg)
{
	int ret = gpio_request(USBH1_MODE, "usbh1-mode");
	if (ret)
		return ret;
	/* single ended */
	gpio_direction_output(USBH1_MODE, 0);

	ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
	if (ret) {
		gpio_free(USBH1_MODE);
		return ret;
	}
	gpio_direction_output(USBH1_VBUSEN_B, 1);

	return 0;
}


static int devboard_isp1105_set_vbus(struct otg_transceiver *otg, bool on)
{
	if (on)
		gpio_set_value(USBH1_VBUSEN_B, 0);
	else
		gpio_set_value(USBH1_VBUSEN_B, 1);

	return 0;
}

static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
	.init	= devboard_usbh1_hw_init,
	.portsc	= MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
	.flags	= MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI,
};

static int __init devboard_usbh1_init(void)
{
	struct otg_transceiver *otg;
	struct platform_device *pdev;

	otg = kzalloc(sizeof(*otg), GFP_KERNEL);
	if (!otg)
		return -ENOMEM;

	otg->label	= "ISP1105";
	otg->init	= devboard_isp1105_init;
	otg->set_vbus	= devboard_isp1105_set_vbus;

	usbh1_pdata.otg = otg;

	pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
	if (IS_ERR(pdev))
		return PTR_ERR(pdev);

	return 0;
}


static const struct fsl_usb2_platform_data usb_pdata __initconst = {
	.operating_mode	= FSL_USB2_DR_DEVICE,
	.phy_mode	= FSL_USB2_PHY_ULPI,
};

/*
 * system init for baseboard usage. Will be called by mx31moboard init.
 */
void __init mx31moboard_devboard_init(void)
{
	printk(KERN_INFO "Initializing mx31devboard peripherals\n");

	mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
		"devboard");

	imx31_add_imx_uart1(&uart_pdata);

	imx31_add_mxc_mmc(1, &sdhc2_pdata);

	devboard_init_sel_gpios();

	imx31_add_fsl_usb2_udc(&usb_pdata);

	devboard_usbh1_init();
}
Commit	Line	Data
e00f0b4a VL	1	/*
	2	* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
e00f0b4a VL	13	*/
e00f0b4a VL	14
45b131a7	15	#include <linux/gpio.h>
e00f0b4a	16	#include <linux/init.h>
45b131a7	17	#include <linux/interrupt.h>
e00f0b4a	18	#include <linux/platform_device.h>
5a0e3ad6	19	#include <linux/slab.h>
220bbcea	20	#include <linux/types.h>
e00f0b4a	21
d67d1075 VL	22	#include <linux/usb/otg.h>
d67d1075 VL	23
e00f0b4a	24	#include <mach/common.h>
e00f0b4a	25	#include <mach/iomux-mx3.h>
220bbcea	26	#include <mach/hardware.h>
d67d1075	27	#include <mach/ulpi.h>
e00f0b4a	28
16cf5c41	29	#include "devices-imx31.h"
e00f0b4a VL	30	#include "devices.h"
e00f0b4a VL	31
220bbcea VL	32	static unsigned int devboard_pins[] = {
220bbcea VL	33	/* UART1 */
e00f0b4a VL	34	MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2,
e00f0b4a VL	35	MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2,
56c7a45b VL	36	/* SDHC2 */
	37	MX31_PIN_PC_PWRON__SD2_DATA3, MX31_PIN_PC_VS1__SD2_DATA2,
	38	MX31_PIN_PC_READY__SD2_DATA1, MX31_PIN_PC_WAIT_B__SD2_DATA0,
	39	MX31_PIN_PC_CD2_B__SD2_CLK, MX31_PIN_PC_CD1_B__SD2_CMD,
	40	MX31_PIN_ATA_DIOR__GPIO3_28, MX31_PIN_ATA_DIOW__GPIO3_29,
d67d1075 VL	41	/* USB H1 */
	42	MX31_PIN_CSPI1_MISO__USBH1_RXDP, MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
	43	MX31_PIN_CSPI1_SS0__USBH1_TXDM, MX31_PIN_CSPI1_SS1__USBH1_TXDP,
	44	MX31_PIN_CSPI1_SS2__USBH1_RCV, MX31_PIN_CSPI1_SCLK__USBH1_OEB,
	45	MX31_PIN_CSPI1_SPI_RDY__USBH1_FS, MX31_PIN_SFS6__USBH1_SUSPEND,
	46	MX31_PIN_NFRE_B__GPIO1_11, MX31_PIN_NFALE__GPIO1_12,
e335c75c VL	47	/* SEL */
	48	MX31_PIN_DTR_DCE1__GPIO2_8, MX31_PIN_DSR_DCE1__GPIO2_9,
	49	MX31_PIN_RI_DCE1__GPIO2_10, MX31_PIN_DCD_DCE1__GPIO2_11,
e00f0b4a VL	50	};
e00f0b4a VL	51
16cf5c41	52	static const struct imxuart_platform_data uart_pdata __initconst = {
220bbcea VL	53	.flags = IMXUART_HAVE_RTSCTS,
	54	};
	55
45b131a7 VL	56	#define SDHC2_CD IOMUX_TO_GPIO(MX31_PIN_ATA_DIOR)
	57	#define SDHC2_WP IOMUX_TO_GPIO(MX31_PIN_ATA_DIOW)
	58
	59	static int devboard_sdhc2_get_ro(struct device *dev)
	60	{
563abb4b	61	return !gpio_get_value(SDHC2_WP);
45b131a7 VL	62	}
	63
	64	static int devboard_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
	65	void *data)
	66	{
4f163eb8 SH	67	int ret;
	68
	69	ret = gpio_request(SDHC2_CD, "sdhc-detect");
	70	if (ret)
	71	return ret;
	72
	73	gpio_direction_input(SDHC2_CD);
	74
	75	ret = gpio_request(SDHC2_WP, "sdhc-wp");
	76	if (ret)
	77	goto err_gpio_free;
	78	gpio_direction_input(SDHC2_WP);
	79
	80	ret = request_irq(gpio_to_irq(SDHC2_CD), detect_irq,
45b131a7 VL	81	IRQF_TRIGGER_RISING \| IRQF_TRIGGER_FALLING,
45b131a7 VL	82	"sdhc2-card-detect", data);
4f163eb8 SH	83	if (ret)
	84	goto err_gpio_free_2;
	85
	86	return 0;
	87
	88	err_gpio_free_2:
	89	gpio_free(SDHC2_WP);
	90	err_gpio_free:
	91	gpio_free(SDHC2_CD);
	92
	93	return ret;
45b131a7 VL	94	}
	95
	96	static void devboard_sdhc2_exit(struct device dev, void data)
	97	{
	98	free_irq(gpio_to_irq(SDHC2_CD), data);
4f163eb8 SH	99	gpio_free(SDHC2_WP);
4f163eb8 SH	100	gpio_free(SDHC2_CD);
45b131a7 VL	101	}
45b131a7 VL	102
6a697e3d	103	static const struct imxmmc_platform_data sdhc2_pdata __initconst = {
45b131a7 VL	104	.get_ro = devboard_sdhc2_get_ro,
	105	.init = devboard_sdhc2_init,
	106	.exit = devboard_sdhc2_exit,
	107	};
	108
e335c75c VL	109	#define SEL0 IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1)
	110	#define SEL1 IOMUX_TO_GPIO(MX31_PIN_DSR_DCE1)
	111	#define SEL2 IOMUX_TO_GPIO(MX31_PIN_RI_DCE1)
	112	#define SEL3 IOMUX_TO_GPIO(MX31_PIN_DCD_DCE1)
	113
	114	static void devboard_init_sel_gpios(void)
	115	{
	116	if (!gpio_request(SEL0, "sel0")) {
	117	gpio_direction_input(SEL0);
	118	gpio_export(SEL0, true);
	119	}
	120
	121	if (!gpio_request(SEL1, "sel1")) {
	122	gpio_direction_input(SEL1);
	123	gpio_export(SEL1, true);
	124	}
	125
	126	if (!gpio_request(SEL2, "sel2")) {
	127	gpio_direction_input(SEL2);
	128	gpio_export(SEL2, true);
	129	}
	130
	131	if (!gpio_request(SEL3, "sel3")) {
	132	gpio_direction_input(SEL3);
	133	gpio_export(SEL3, true);
	134	}
	135	}
d67d1075 VL	136	#define USB_PAD_CFG (PAD_CTL_DRV_MAX \| PAD_CTL_SRE_FAST \| PAD_CTL_HYS_CMOS \| \
	137	PAD_CTL_ODE_CMOS \| PAD_CTL_100K_PU)
	138
	139	static int devboard_usbh1_hw_init(struct platform_device *pdev)
	140	{
	141	mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
	142
	143	mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
	144	mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
	145	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
	146	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
	147	mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
	148	mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
	149	mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
	150	mxc_iomux_set_pad(MX31_PIN_SFS6, USB_PAD_CFG);
	151
	152	return 0;
	153	}
	154
	155	#define USBH1_VBUSEN_B IOMUX_TO_GPIO(MX31_PIN_NFRE_B)
	156	#define USBH1_MODE IOMUX_TO_GPIO(MX31_PIN_NFALE)
	157
	158	static int devboard_isp1105_init(struct otg_transceiver *otg)
	159	{
	160	int ret = gpio_request(USBH1_MODE, "usbh1-mode");
	161	if (ret)
	162	return ret;
	163	/* single ended */
	164	gpio_direction_output(USBH1_MODE, 0);
	165
	166	ret = gpio_request(USBH1_VBUSEN_B, "usbh1-vbusen");
	167	if (ret) {
	168	gpio_free(USBH1_MODE);
	169	return ret;
	170	}
	171	gpio_direction_output(USBH1_VBUSEN_B, 1);
	172
	173	return 0;
	174	}
	175
	176
	177	static int devboard_isp1105_set_vbus(struct otg_transceiver *otg, bool on)
	178	{
	179	if (on)
	180	gpio_set_value(USBH1_VBUSEN_B, 0);
	181	else
	182	gpio_set_value(USBH1_VBUSEN_B, 1);
	183
	184	return 0;
	185	}
	186
2d58de28	187	static struct mxc_usbh_platform_data usbh1_pdata __initdata = {
d67d1075 VL	188	.init = devboard_usbh1_hw_init,
	189	.portsc = MXC_EHCI_MODE_UTMI \| MXC_EHCI_SERIAL,
	190	.flags = MXC_EHCI_POWER_PINS_ENABLED \| MXC_EHCI_INTERFACE_SINGLE_UNI,
	191	};
	192
	193	static int __init devboard_usbh1_init(void)
	194	{
	195	struct otg_transceiver *otg;
2d58de28	196	struct platform_device *pdev;
d67d1075 VL	197
	198	otg = kzalloc(sizeof(*otg), GFP_KERNEL);
	199	if (!otg)
	200	return -ENOMEM;
	201
	202	otg->label = "ISP1105";
	203	otg->init = devboard_isp1105_init;
	204	otg->set_vbus = devboard_isp1105_set_vbus;
	205
	206	usbh1_pdata.otg = otg;
	207
2d58de28 UKK	208	pdev = imx31_add_mxc_ehci_hs(1, &usbh1_pdata);
	209	if (IS_ERR(pdev))
	210	return PTR_ERR(pdev);
	211
	212	return 0;
d67d1075 VL	213	}
d67d1075 VL	214
66c202ad	215
9e1dde33	216	static const struct fsl_usb2_platform_data usb_pdata __initconst = {
66c202ad PR	217	.operating_mode = FSL_USB2_DR_DEVICE,
	218	.phy_mode = FSL_USB2_PHY_ULPI,
	219	};
	220
e00f0b4a VL	221	/*
	222	* system init for baseboard usage. Will be called by mx31moboard init.
	223	*/
	224	void __init mx31moboard_devboard_init(void)
	225	{
	226	printk(KERN_INFO "Initializing mx31devboard peripherals\n");
220bbcea VL	227
	228	mxc_iomux_setup_multiple_pins(devboard_pins, ARRAY_SIZE(devboard_pins),
	229	"devboard");
	230
16cf5c41	231	imx31_add_imx_uart1(&uart_pdata);
45b131a7	232
6a697e3d	233	imx31_add_mxc_mmc(1, &sdhc2_pdata);
d67d1075	234
e335c75c VL	235	devboard_init_sel_gpios();
e335c75c VL	236
9e1dde33	237	imx31_add_fsl_usb2_udc(&usb_pdata);
66c202ad	238
d67d1075	239	devboard_usbh1_init();
e00f0b4a	240	}