ARM: omap: move platform_data definitions
[deliverable/linux.git] / arch / arm / mach-omap1 / board-perseus2.c
CommitLineData
1da177e4 1/*
dbdf9ced 2 * linux/arch/arm/mach-omap1/board-perseus2.c
1da177e4
LT
3 *
4 * Modified from board-generic.c
5 *
6 * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
7 * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
2f8163ba 13#include <linux/gpio.h>
1da177e4
LT
14#include <linux/kernel.h>
15#include <linux/init.h>
d052d1be 16#include <linux/platform_device.h>
1da177e4
LT
17#include <linux/delay.h>
18#include <linux/mtd/mtd.h>
9b6553cd 19#include <linux/mtd/nand.h>
1da177e4 20#include <linux/mtd/partitions.h>
561b036a 21#include <linux/mtd/physmap.h>
9b6553cd 22#include <linux/input.h>
3bc48014 23#include <linux/smc91x.h>
ddba6c7f 24#include <linux/omapfb.h>
2203747c 25#include <linux/platform_data/keypad-omap.h>
1da177e4 26
1da177e4
LT
27#include <asm/mach-types.h>
28#include <asm/mach/arch.h>
1da177e4
LT
29#include <asm/mach/map.h>
30
ce491cf8 31#include <plat/tc.h>
ce491cf8
TL
32#include <plat/mux.h>
33#include <plat/fpga.h>
561b036a 34#include <plat/flash.h>
1da177e4 35
2e3ee9f4
TL
36#include <mach/hardware.h>
37
38#include "iomap.h"
39#include "common.h"
40
da1f026b
JK
41static const unsigned int p2_keymap[] = {
42 KEY(0, 0, KEY_UP),
43 KEY(1, 0, KEY_RIGHT),
44 KEY(2, 0, KEY_LEFT),
45 KEY(3, 0, KEY_DOWN),
46 KEY(4, 0, KEY_ENTER),
47 KEY(0, 1, KEY_F10),
48 KEY(1, 1, KEY_SEND),
49 KEY(2, 1, KEY_END),
50 KEY(3, 1, KEY_VOLUMEDOWN),
51 KEY(4, 1, KEY_VOLUMEUP),
52 KEY(5, 1, KEY_RECORD),
53 KEY(0, 2, KEY_F9),
54 KEY(1, 2, KEY_3),
55 KEY(2, 2, KEY_6),
56 KEY(3, 2, KEY_9),
57 KEY(4, 2, KEY_KPDOT),
58 KEY(0, 3, KEY_BACK),
59 KEY(1, 3, KEY_2),
60 KEY(2, 3, KEY_5),
61 KEY(3, 3, KEY_8),
62 KEY(4, 3, KEY_0),
63 KEY(5, 3, KEY_KPSLASH),
64 KEY(0, 4, KEY_HOME),
65 KEY(1, 4, KEY_1),
66 KEY(2, 4, KEY_4),
67 KEY(3, 4, KEY_7),
68 KEY(4, 4, KEY_KPASTERISK),
69 KEY(5, 4, KEY_POWER),
9b6553cd
TL
70};
71
3bc48014
LM
72static struct smc91x_platdata smc91x_info = {
73 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
74 .leda = RPC_LED_100_10,
75 .ledb = RPC_LED_TX_RX,
76};
77
1da177e4
LT
78static struct resource smc91x_resources[] = {
79 [0] = {
80 .start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
81 .end = H2P2_DBG_FPGA_ETHR_START + 0xf,
82 .flags = IORESOURCE_MEM,
83 },
84 [1] = {
372b1c32 85 .start = INT_7XX_MPU_EXT_NIRQ,
1da177e4 86 .end = 0,
e7b3dc7e 87 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
1da177e4
LT
88 },
89};
90
9b6553cd 91static struct mtd_partition nor_partitions[] = {
1da177e4
LT
92 /* bootloader (U-Boot, etc) in first sector */
93 {
94 .name = "bootloader",
95 .offset = 0,
96 .size = SZ_128K,
97 .mask_flags = MTD_WRITEABLE, /* force read-only */
98 },
99 /* bootloader params in the next sector */
100 {
101 .name = "params",
102 .offset = MTDPART_OFS_APPEND,
103 .size = SZ_128K,
104 .mask_flags = 0,
105 },
106 /* kernel */
107 {
108 .name = "kernel",
109 .offset = MTDPART_OFS_APPEND,
110 .size = SZ_2M,
111 .mask_flags = 0
112 },
113 /* rest of flash is a file system */
114 {
115 .name = "rootfs",
116 .offset = MTDPART_OFS_APPEND,
117 .size = MTDPART_SIZ_FULL,
118 .mask_flags = 0
119 },
120};
121
561b036a 122static struct physmap_flash_data nor_data = {
1da177e4 123 .width = 2,
561b036a 124 .set_vpp = omap1_set_vpp,
9b6553cd
TL
125 .parts = nor_partitions,
126 .nr_parts = ARRAY_SIZE(nor_partitions),
1da177e4
LT
127};
128
9b6553cd 129static struct resource nor_resource = {
7c38cf02
TL
130 .start = OMAP_CS0_PHYS,
131 .end = OMAP_CS0_PHYS + SZ_32M - 1,
1da177e4
LT
132 .flags = IORESOURCE_MEM,
133};
134
9b6553cd 135static struct platform_device nor_device = {
561b036a 136 .name = "physmap-flash",
1da177e4
LT
137 .id = 0,
138 .dev = {
9b6553cd
TL
139 .platform_data = &nor_data,
140 },
141 .num_resources = 1,
142 .resource = &nor_resource,
143};
144
414f552a
LM
145#define P2_NAND_RB_GPIO_PIN 62
146
147static int nand_dev_ready(struct mtd_info *mtd)
148{
149 return gpio_get_value(P2_NAND_RB_GPIO_PIN);
150}
151
414f552a
LM
152static struct platform_nand_data nand_data = {
153 .chip = {
154 .nr_chips = 1,
155 .chip_offset = 0,
156 .options = NAND_SAMSUNG_LP_OPTIONS,
414f552a
LM
157 },
158 .ctrl = {
31cde044 159 .cmd_ctrl = omap1_nand_cmd_ctl,
414f552a
LM
160 .dev_ready = nand_dev_ready,
161 },
9b6553cd
TL
162};
163
164static struct resource nand_resource = {
165 .start = OMAP_CS3_PHYS,
166 .end = OMAP_CS3_PHYS + SZ_4K - 1,
167 .flags = IORESOURCE_MEM,
168};
169
170static struct platform_device nand_device = {
414f552a 171 .name = "gen_nand",
9b6553cd
TL
172 .id = 0,
173 .dev = {
174 .platform_data = &nand_data,
1da177e4
LT
175 },
176 .num_resources = 1,
9b6553cd 177 .resource = &nand_resource,
1da177e4
LT
178};
179
180static struct platform_device smc91x_device = {
181 .name = "smc91x",
182 .id = 0,
3bc48014
LM
183 .dev = {
184 .platform_data = &smc91x_info,
185 },
1da177e4
LT
186 .num_resources = ARRAY_SIZE(smc91x_resources),
187 .resource = smc91x_resources,
188};
189
9b6553cd
TL
190static struct resource kp_resources[] = {
191 [0] = {
372b1c32
AB
192 .start = INT_7XX_MPUIO_KEYPAD,
193 .end = INT_7XX_MPUIO_KEYPAD,
9b6553cd
TL
194 .flags = IORESOURCE_IRQ,
195 },
196};
197
da1f026b
JK
198static const struct matrix_keymap_data p2_keymap_data = {
199 .keymap = p2_keymap,
200 .keymap_size = ARRAY_SIZE(p2_keymap),
201};
202
9b6553cd 203static struct omap_kp_platform_data kp_data = {
4d24607b
KS
204 .rows = 8,
205 .cols = 8,
da1f026b 206 .keymap_data = &p2_keymap_data,
4d24607b 207 .delay = 4,
da1f026b 208 .dbounce = true,
9b6553cd
TL
209};
210
211static struct platform_device kp_device = {
212 .name = "omap-keypad",
213 .id = -1,
214 .dev = {
215 .platform_data = &kp_data,
216 },
217 .num_resources = ARRAY_SIZE(kp_resources),
218 .resource = kp_resources,
219};
220
1da177e4 221static struct platform_device *devices[] __initdata = {
9b6553cd
TL
222 &nor_device,
223 &nand_device,
1da177e4 224 &smc91x_device,
9b6553cd 225 &kp_device,
1da177e4
LT
226};
227
3179a019 228static struct omap_lcd_config perseus2_lcd_config __initdata = {
3179a019
TL
229 .ctrl_name = "internal",
230};
231
c2cdaffe
TL
232static void __init perseus2_init_smc91x(void)
233{
234 fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
235 mdelay(50);
236 fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
237 H2P2_DBG_FPGA_LAN_RESET);
238 mdelay(50);
239}
240
1da177e4
LT
241static void __init omap_perseus2_init(void)
242{
7b88e62f
TL
243 /* Early, board-dependent init */
244
245 /*
246 * Hold GSM Reset until needed
247 */
248 omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
249
250 /*
251 * UARTs -> done automagically by 8250 driver
252 */
253
254 /*
255 * CSx timings, GPIO Mux ... setup
256 */
257
258 /* Flash: CS0 timings setup */
259 omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
260 omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
261
262 /*
263 * Ethernet support through the debug board
264 * CS1 timings setup
265 */
266 omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
267 omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
268
269 /*
270 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
271 * It is used as the Ethernet controller interrupt
272 */
273 omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF,
274 OMAP7XX_IO_CONF_9);
275
c2cdaffe
TL
276 perseus2_init_smc91x();
277
f2d18fea
JN
278 if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
279 BUG();
414f552a 280 gpio_direction_input(P2_NAND_RB_GPIO_PIN);
9b6553cd
TL
281
282 omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
283 omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
284
93c43f25
TL
285 /* Mux pins for keypad */
286 omap_cfg_reg(E2_7XX_KBR0);
287 omap_cfg_reg(J7_7XX_KBR1);
288 omap_cfg_reg(E1_7XX_KBR2);
289 omap_cfg_reg(F3_7XX_KBR3);
290 omap_cfg_reg(D2_7XX_KBR4);
291 omap_cfg_reg(C2_7XX_KBC0);
292 omap_cfg_reg(D3_7XX_KBC1);
293 omap_cfg_reg(E4_7XX_KBC2);
294 omap_cfg_reg(F4_7XX_KBC3);
295 omap_cfg_reg(E3_7XX_KBC4);
296
9b6553cd 297 platform_add_devices(devices, ARRAY_SIZE(devices));
3179a019 298
3179a019 299 omap_serial_init();
1ed16a86 300 omap_register_i2c_bus(1, 100, NULL, 0);
ddba6c7f
TV
301
302 omapfb_set_lcd_config(&perseus2_lcd_config);
1da177e4
LT
303}
304
1da177e4
LT
305/* Only FPGA needs to be mapped here. All others are done with ioremap */
306static struct map_desc omap_perseus2_io_desc[] __initdata = {
9fe133b1
DS
307 {
308 .virtual = H2P2_DBG_FPGA_BASE,
309 .pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
310 .length = H2P2_DBG_FPGA_SIZE,
311 .type = MT_DEVICE
312 }
1da177e4
LT
313};
314
315static void __init omap_perseus2_map_io(void)
316{
7b88e62f 317 omap7xx_map_io();
1da177e4
LT
318 iotable_init(omap_perseus2_io_desc,
319 ARRAY_SIZE(omap_perseus2_io_desc));
1da177e4
LT
320}
321
322MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
e9dea0c6 323 /* Maintainer: Kevin Hilman <kjh@hilman.org> */
246e389d 324 .atag_offset = 0x100,
e9dea0c6 325 .map_io = omap_perseus2_map_io,
7b88e62f 326 .init_early = omap1_init_early,
71ee7dad 327 .reserve = omap_reserve,
7b88e62f 328 .init_irq = omap1_init_irq,
e9dea0c6 329 .init_machine = omap_perseus2_init,
82c3bd03 330 .init_late = omap1_init_late,
e74984e4 331 .timer = &omap1_timer,
baa95883 332 .restart = omap1_restart,
1da177e4 333MACHINE_END
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