[deliverable/linux.git] / arch / arm / mach-omap1 / board-perseus2.c

/*
 * linux/arch/arm/mach-omap1/board-perseus2.c
 *
 * Modified from board-generic.c
 *
 * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
 * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>

#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>

#include <mach/tc.h>
#include <mach/gpio.h>
#include <mach/mux.h>
#include <mach/fpga.h>
#include <mach/nand.h>
#include <mach/keypad.h>
#include <mach/common.h>
#include <mach/board.h>

static int p2_keymap[] = {
	KEY(0,0,KEY_UP),
	KEY(0,1,KEY_RIGHT),
	KEY(0,2,KEY_LEFT),
	KEY(0,3,KEY_DOWN),
	KEY(0,4,KEY_ENTER),
	KEY(1,0,KEY_F10),
	KEY(1,1,KEY_SEND),
	KEY(1,2,KEY_END),
	KEY(1,3,KEY_VOLUMEDOWN),
	KEY(1,4,KEY_VOLUMEUP),
	KEY(1,5,KEY_RECORD),
	KEY(2,0,KEY_F9),
	KEY(2,1,KEY_3),
	KEY(2,2,KEY_6),
	KEY(2,3,KEY_9),
	KEY(2,4,KEY_KPDOT),
	KEY(3,0,KEY_BACK),
	KEY(3,1,KEY_2),
	KEY(3,2,KEY_5),
	KEY(3,3,KEY_8),
	KEY(3,4,KEY_0),
	KEY(3,5,KEY_KPSLASH),
	KEY(4,0,KEY_HOME),
	KEY(4,1,KEY_1),
	KEY(4,2,KEY_4),
	KEY(4,3,KEY_7),
	KEY(4,4,KEY_KPASTERISK),
	KEY(4,5,KEY_POWER),
	0
};

static struct resource smc91x_resources[] = {
	[0] = {
		.start	= H2P2_DBG_FPGA_ETHR_START,	/* Physical */
		.end	= H2P2_DBG_FPGA_ETHR_START + 0xf,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= INT_7XX_MPU_EXT_NIRQ,
		.end	= 0,
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	},
};

static struct mtd_partition nor_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	{
	      .name		= "bootloader",
	      .offset		= 0,
	      .size		= SZ_128K,
	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next sector */
	{
	      .name		= "params",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_128K,
	      .mask_flags	= 0,
	},
	/* kernel */
	{
	      .name		= "kernel",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_2M,
	      .mask_flags	= 0
	},
	/* rest of flash is a file system */
	{
	      .name		= "rootfs",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= MTDPART_SIZ_FULL,
	      .mask_flags	= 0
	},
};

static struct flash_platform_data nor_data = {
	.map_name	= "cfi_probe",
	.width		= 2,
	.parts		= nor_partitions,
	.nr_parts	= ARRAY_SIZE(nor_partitions),
};

static struct resource nor_resource = {
	.start		= OMAP_CS0_PHYS,
	.end		= OMAP_CS0_PHYS + SZ_32M - 1,
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nor_device = {
	.name		= "omapflash",
	.id		= 0,
	.dev		= {
		.platform_data	= &nor_data,
	},
	.num_resources	= 1,
	.resource	= &nor_resource,
};

static struct omap_nand_platform_data nand_data = {
	.options	= NAND_SAMSUNG_LP_OPTIONS,
};

static struct resource nand_resource = {
	.start		= OMAP_CS3_PHYS,
	.end		= OMAP_CS3_PHYS + SZ_4K - 1,
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nand_device = {
	.name		= "omapnand",
	.id		= 0,
	.dev		= {
		.platform_data	= &nand_data,
	},
	.num_resources	= 1,
	.resource	= &nand_resource,
};

static struct platform_device smc91x_device = {
	.name		= "smc91x",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(smc91x_resources),
	.resource	= smc91x_resources,
};

static struct resource kp_resources[] = {
	[0] = {
		.start	= INT_7XX_MPUIO_KEYPAD,
		.end	= INT_7XX_MPUIO_KEYPAD,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct omap_kp_platform_data kp_data = {
	.rows		= 8,
	.cols		= 8,
	.keymap		= p2_keymap,
	.keymapsize	= ARRAY_SIZE(p2_keymap),
	.delay		= 4,
	.dbounce	= 1,
};

static struct platform_device kp_device = {
	.name		= "omap-keypad",
	.id		= -1,
	.dev		= {
		.platform_data = &kp_data,
	},
	.num_resources	= ARRAY_SIZE(kp_resources),
	.resource	= kp_resources,
};

static struct platform_device lcd_device = {
	.name		= "lcd_p2",
	.id		= -1,
};

static struct platform_device *devices[] __initdata = {
	&nor_device,
	&nand_device,
	&smc91x_device,
	&kp_device,
	&lcd_device,
};

#define P2_NAND_RB_GPIO_PIN	62

static int nand_dev_ready(struct omap_nand_platform_data *data)
{
	return gpio_get_value(P2_NAND_RB_GPIO_PIN);
}

static struct omap_lcd_config perseus2_lcd_config __initdata = {
	.ctrl_name	= "internal",
};

static struct omap_board_config_kernel perseus2_config[] __initdata = {
	{ OMAP_TAG_LCD,		&perseus2_lcd_config },
};

static void __init omap_perseus2_init(void)
{
	if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
		BUG();
	nand_data.dev_ready = nand_dev_ready;

	omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
	omap_cfg_reg(M8_1610_FLASH_CS2B_WE);

	platform_add_devices(devices, ARRAY_SIZE(devices));

	omap_board_config = perseus2_config;
	omap_board_config_size = ARRAY_SIZE(perseus2_config);
	omap_serial_init();
	omap_register_i2c_bus(1, 100, NULL, 0);
}

static void __init perseus2_init_smc91x(void)
{
	fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
	mdelay(50);
	fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
		   H2P2_DBG_FPGA_LAN_RESET);
	mdelay(50);
}

static void __init omap_perseus2_init_irq(void)
{
	omap1_init_common_hw();
	omap_init_irq();
	omap_gpio_init();
	perseus2_init_smc91x();
}
/* Only FPGA needs to be mapped here. All others are done with ioremap */
static struct map_desc omap_perseus2_io_desc[] __initdata = {
	{
		.virtual	= H2P2_DBG_FPGA_BASE,
		.pfn		= __phys_to_pfn(H2P2_DBG_FPGA_START),
		.length		= H2P2_DBG_FPGA_SIZE,
		.type		= MT_DEVICE
	}
};

static void __init omap_perseus2_map_io(void)
{
	omap1_map_common_io();
	iotable_init(omap_perseus2_io_desc,
		     ARRAY_SIZE(omap_perseus2_io_desc));

	/* Early, board-dependent init */

	/*
	 * Hold GSM Reset until needed
	 */
	omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);

	/*
	 * UARTs -> done automagically by 8250 driver
	 */

	/*
	 * CSx timings, GPIO Mux ... setup
	 */

	/* Flash: CS0 timings setup */
	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
	omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);

	/*
	 * Ethernet support through the debug board
	 * CS1 timings setup
	 */
	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
	omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);

	/*
	 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
	 * It is used as the Ethernet controller interrupt
	 */
	omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9);
}

MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
	/* Maintainer: Kevin Hilman <kjh@hilman.org> */
	.phys_io	= 0xfff00000,
	.io_pg_offst	= ((0xfef00000) >> 18) & 0xfffc,
	.boot_params	= 0x10000100,
	.map_io		= omap_perseus2_map_io,
	.init_irq	= omap_perseus2_init_irq,
	.init_machine	= omap_perseus2_init,
	.timer		= &omap_timer,
MACHINE_END
Commit	Line	Data
1da177e4	1	/*
dbdf9ced	2	* linux/arch/arm/mach-omap1/board-perseus2.c
1da177e4 LT	3	*
	4	* Modified from board-generic.c
	5	*
	6	* Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
	7	* Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/init.h>
d052d1be	16	#include <linux/platform_device.h>
1da177e4 LT	17	#include <linux/delay.h>
1da177e4 LT	18	#include <linux/mtd/mtd.h>
9b6553cd	19	#include <linux/mtd/nand.h>
1da177e4	20	#include <linux/mtd/partitions.h>
9b6553cd	21	#include <linux/input.h>
1da177e4	22
a09e64fb	23	#include <mach/hardware.h>
1da177e4 LT	24	#include <asm/mach-types.h>
	25	#include <asm/mach/arch.h>
	26	#include <asm/mach/flash.h>
	27	#include <asm/mach/map.h>
	28
a09e64fb RK	29	#include <mach/tc.h>
	30	#include <mach/gpio.h>
	31	#include <mach/mux.h>
	32	#include <mach/fpga.h>
	33	#include <mach/nand.h>
	34	#include <mach/keypad.h>
	35	#include <mach/common.h>
	36	#include <mach/board.h>
1da177e4	37
9b6553cd TL	38	static int p2_keymap[] = {
	39	KEY(0,0,KEY_UP),
	40	KEY(0,1,KEY_RIGHT),
	41	KEY(0,2,KEY_LEFT),
	42	KEY(0,3,KEY_DOWN),
496bcb81 VK	43	KEY(0,4,KEY_ENTER),
496bcb81 VK	44	KEY(1,0,KEY_F10),
9b6553cd TL	45	KEY(1,1,KEY_SEND),
	46	KEY(1,2,KEY_END),
	47	KEY(1,3,KEY_VOLUMEDOWN),
	48	KEY(1,4,KEY_VOLUMEUP),
	49	KEY(1,5,KEY_RECORD),
496bcb81	50	KEY(2,0,KEY_F9),
9b6553cd TL	51	KEY(2,1,KEY_3),
	52	KEY(2,2,KEY_6),
	53	KEY(2,3,KEY_9),
496bcb81	54	KEY(2,4,KEY_KPDOT),
9b6553cd TL	55	KEY(3,0,KEY_BACK),
	56	KEY(3,1,KEY_2),
	57	KEY(3,2,KEY_5),
	58	KEY(3,3,KEY_8),
	59	KEY(3,4,KEY_0),
496bcb81	60	KEY(3,5,KEY_KPSLASH),
9b6553cd TL	61	KEY(4,0,KEY_HOME),
	62	KEY(4,1,KEY_1),
	63	KEY(4,2,KEY_4),
	64	KEY(4,3,KEY_7),
496bcb81	65	KEY(4,4,KEY_KPASTERISK),
9b6553cd TL	66	KEY(4,5,KEY_POWER),
	67	0
	68	};
	69
1da177e4 LT	70	static struct resource smc91x_resources[] = {
	71	[0] = {
	72	.start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
	73	.end = H2P2_DBG_FPGA_ETHR_START + 0xf,
	74	.flags = IORESOURCE_MEM,
	75	},
	76	[1] = {
372b1c32	77	.start = INT_7XX_MPU_EXT_NIRQ,
1da177e4	78	.end = 0,
e7b3dc7e	79	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
1da177e4 LT	80	},
	81	};
	82
9b6553cd	83	static struct mtd_partition nor_partitions[] = {
1da177e4 LT	84	/* bootloader (U-Boot, etc) in first sector */
	85	{
	86	.name = "bootloader",
	87	.offset = 0,
	88	.size = SZ_128K,
	89	.mask_flags = MTD_WRITEABLE, /* force read-only */
	90	},
	91	/* bootloader params in the next sector */
	92	{
	93	.name = "params",
	94	.offset = MTDPART_OFS_APPEND,
	95	.size = SZ_128K,
	96	.mask_flags = 0,
	97	},
	98	/* kernel */
	99	{
	100	.name = "kernel",
	101	.offset = MTDPART_OFS_APPEND,
	102	.size = SZ_2M,
	103	.mask_flags = 0
	104	},
	105	/* rest of flash is a file system */
	106	{
	107	.name = "rootfs",
	108	.offset = MTDPART_OFS_APPEND,
	109	.size = MTDPART_SIZ_FULL,
	110	.mask_flags = 0
	111	},
	112	};
	113
9b6553cd	114	static struct flash_platform_data nor_data = {
1da177e4 LT	115	.map_name = "cfi_probe",
1da177e4 LT	116	.width = 2,
9b6553cd TL	117	.parts = nor_partitions,
9b6553cd TL	118	.nr_parts = ARRAY_SIZE(nor_partitions),
1da177e4 LT	119	};
1da177e4 LT	120
9b6553cd	121	static struct resource nor_resource = {
7c38cf02 TL	122	.start = OMAP_CS0_PHYS,
7c38cf02 TL	123	.end = OMAP_CS0_PHYS + SZ_32M - 1,
1da177e4 LT	124	.flags = IORESOURCE_MEM,
	125	};
	126
9b6553cd	127	static struct platform_device nor_device = {
1da177e4 LT	128	.name = "omapflash",
	129	.id = 0,
	130	.dev = {
9b6553cd TL	131	.platform_data = &nor_data,
	132	},
	133	.num_resources = 1,
	134	.resource = &nor_resource,
	135	};
	136
78be6325	137	static struct omap_nand_platform_data nand_data = {
9b6553cd TL	138	.options = NAND_SAMSUNG_LP_OPTIONS,
	139	};
	140
	141	static struct resource nand_resource = {
	142	.start = OMAP_CS3_PHYS,
	143	.end = OMAP_CS3_PHYS + SZ_4K - 1,
	144	.flags = IORESOURCE_MEM,
	145	};
	146
	147	static struct platform_device nand_device = {
	148	.name = "omapnand",
	149	.id = 0,
	150	.dev = {
	151	.platform_data = &nand_data,
1da177e4 LT	152	},
1da177e4 LT	153	.num_resources = 1,
9b6553cd	154	.resource = &nand_resource,
1da177e4 LT	155	};
	156
	157	static struct platform_device smc91x_device = {
	158	.name = "smc91x",
	159	.id = 0,
	160	.num_resources = ARRAY_SIZE(smc91x_resources),
	161	.resource = smc91x_resources,
	162	};
	163
9b6553cd TL	164	static struct resource kp_resources[] = {
9b6553cd TL	165	[0] = {
372b1c32 AB	166	.start = INT_7XX_MPUIO_KEYPAD,
372b1c32 AB	167	.end = INT_7XX_MPUIO_KEYPAD,
9b6553cd TL	168	.flags = IORESOURCE_IRQ,
	169	},
	170	};
	171
	172	static struct omap_kp_platform_data kp_data = {
4d24607b KS	173	.rows = 8,
	174	.cols = 8,
	175	.keymap = p2_keymap,
	176	.keymapsize = ARRAY_SIZE(p2_keymap),
	177	.delay = 4,
	178	.dbounce = 1,
9b6553cd TL	179	};
	180
	181	static struct platform_device kp_device = {
	182	.name = "omap-keypad",
	183	.id = -1,
	184	.dev = {
	185	.platform_data = &kp_data,
	186	},
	187	.num_resources = ARRAY_SIZE(kp_resources),
	188	.resource = kp_resources,
	189	};
	190
	191	static struct platform_device lcd_device = {
	192	.name = "lcd_p2",
	193	.id = -1,
	194	};
	195
1da177e4	196	static struct platform_device *devices[] __initdata = {
9b6553cd TL	197	&nor_device,
9b6553cd TL	198	&nand_device,
1da177e4	199	&smc91x_device,
9b6553cd TL	200	&kp_device,
9b6553cd TL	201	&lcd_device,
1da177e4 LT	202	};
1da177e4 LT	203
9b6553cd TL	204	#define P2_NAND_RB_GPIO_PIN 62
9b6553cd TL	205
78be6325	206	static int nand_dev_ready(struct omap_nand_platform_data *data)
9b6553cd	207	{
0b84b5ca	208	return gpio_get_value(P2_NAND_RB_GPIO_PIN);
9b6553cd TL	209	}
9b6553cd TL	210
3179a019	211	static struct omap_lcd_config perseus2_lcd_config __initdata = {
3179a019 TL	212	.ctrl_name = "internal",
	213	};
	214
e27a93a9	215	static struct omap_board_config_kernel perseus2_config[] __initdata = {
3179a019 TL	216	{ OMAP_TAG_LCD, &perseus2_lcd_config },
	217	};
	218
1da177e4 LT	219	static void __init omap_perseus2_init(void)
1da177e4 LT	220	{
f2d18fea JN	221	if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
	222	BUG();
	223	nand_data.dev_ready = nand_dev_ready;
9b6553cd TL	224
	225	omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
	226	omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
	227
	228	platform_add_devices(devices, ARRAY_SIZE(devices));
3179a019 TL	229
	230	omap_board_config = perseus2_config;
	231	omap_board_config_size = ARRAY_SIZE(perseus2_config);
	232	omap_serial_init();
1ed16a86	233	omap_register_i2c_bus(1, 100, NULL, 0);
1da177e4 LT	234	}
	235
	236	static void __init perseus2_init_smc91x(void)
	237	{
	238	fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
	239	mdelay(50);
	240	fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
	241	H2P2_DBG_FPGA_LAN_RESET);
	242	mdelay(50);
	243	}
	244
277d58ef	245	static void __init omap_perseus2_init_irq(void)
1da177e4	246	{
87bd63f6	247	omap1_init_common_hw();
1da177e4 LT	248	omap_init_irq();
	249	omap_gpio_init();
	250	perseus2_init_smc91x();
	251	}
1da177e4 LT	252	/* Only FPGA needs to be mapped here. All others are done with ioremap */
1da177e4 LT	253	static struct map_desc omap_perseus2_io_desc[] __initdata = {
9fe133b1 DS	254	{
	255	.virtual = H2P2_DBG_FPGA_BASE,
	256	.pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
	257	.length = H2P2_DBG_FPGA_SIZE,
	258	.type = MT_DEVICE
	259	}
1da177e4 LT	260	};
	261
	262	static void __init omap_perseus2_map_io(void)
	263	{
87bd63f6	264	omap1_map_common_io();
1da177e4 LT	265	iotable_init(omap_perseus2_io_desc,
	266	ARRAY_SIZE(omap_perseus2_io_desc));
	267
	268	/* Early, board-dependent init */
	269
	270	/*
	271	* Hold GSM Reset until needed
	272	*/
b51988db	273	omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
1da177e4 LT	274
	275	/*
	276	* UARTs -> done automagically by 8250 driver
	277	*/
	278
	279	/*
	280	* CSx timings, GPIO Mux ... setup
	281	*/
	282
	283	/* Flash: CS0 timings setup */
b51988db AB	284	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
b51988db AB	285	omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
1da177e4 LT	286
1da177e4 LT	287	/*
93b1fae4	288	* Ethernet support through the debug board
1da177e4 LT	289	* CS1 timings setup
1da177e4 LT	290	*/
b51988db AB	291	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
b51988db AB	292	omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
1da177e4 LT	293
	294	/*
	295	* Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
	296	* It is used as the Ethernet controller interrupt
	297	*/
b51988db	298	omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9);
1da177e4 LT	299	}
	300
	301	MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
e9dea0c6	302	/* Maintainer: Kevin Hilman <kjh@hilman.org> */
e9dea0c6 RK	303	.phys_io = 0xfff00000,
	304	.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
	305	.boot_params = 0x10000100,
	306	.map_io = omap_perseus2_map_io,
	307	.init_irq = omap_perseus2_init_irq,
	308	.init_machine = omap_perseus2_init,
1da177e4 LT	309	.timer = &omap_timer,
1da177e4 LT	310	MACHINE_END