smc91x: remove OMAP specific bits
[deliverable/linux.git] / arch / arm / mach-omap1 / board-perseus2.c
CommitLineData
1da177e4 1/*
dbdf9ced 2 * linux/arch/arm/mach-omap1/board-perseus2.c
1da177e4
LT
3 *
4 * Modified from board-generic.c
5 *
6 * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
7 * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
d052d1be 16#include <linux/platform_device.h>
1da177e4
LT
17#include <linux/delay.h>
18#include <linux/mtd/mtd.h>
9b6553cd 19#include <linux/mtd/nand.h>
1da177e4 20#include <linux/mtd/partitions.h>
9b6553cd 21#include <linux/input.h>
3bc48014 22#include <linux/smc91x.h>
1da177e4 23
a09e64fb 24#include <mach/hardware.h>
1da177e4
LT
25#include <asm/mach-types.h>
26#include <asm/mach/arch.h>
27#include <asm/mach/flash.h>
28#include <asm/mach/map.h>
29
ce491cf8 30#include <plat/tc.h>
a09e64fb 31#include <mach/gpio.h>
ce491cf8
TL
32#include <plat/mux.h>
33#include <plat/fpga.h>
34#include <plat/nand.h>
35#include <plat/keypad.h>
36#include <plat/common.h>
37#include <plat/board.h>
1da177e4 38
9b6553cd
TL
39static int p2_keymap[] = {
40 KEY(0,0,KEY_UP),
41 KEY(0,1,KEY_RIGHT),
42 KEY(0,2,KEY_LEFT),
43 KEY(0,3,KEY_DOWN),
496bcb81
VK
44 KEY(0,4,KEY_ENTER),
45 KEY(1,0,KEY_F10),
9b6553cd
TL
46 KEY(1,1,KEY_SEND),
47 KEY(1,2,KEY_END),
48 KEY(1,3,KEY_VOLUMEDOWN),
49 KEY(1,4,KEY_VOLUMEUP),
50 KEY(1,5,KEY_RECORD),
496bcb81 51 KEY(2,0,KEY_F9),
9b6553cd
TL
52 KEY(2,1,KEY_3),
53 KEY(2,2,KEY_6),
54 KEY(2,3,KEY_9),
496bcb81 55 KEY(2,4,KEY_KPDOT),
9b6553cd
TL
56 KEY(3,0,KEY_BACK),
57 KEY(3,1,KEY_2),
58 KEY(3,2,KEY_5),
59 KEY(3,3,KEY_8),
60 KEY(3,4,KEY_0),
496bcb81 61 KEY(3,5,KEY_KPSLASH),
9b6553cd
TL
62 KEY(4,0,KEY_HOME),
63 KEY(4,1,KEY_1),
64 KEY(4,2,KEY_4),
65 KEY(4,3,KEY_7),
496bcb81 66 KEY(4,4,KEY_KPASTERISK),
9b6553cd
TL
67 KEY(4,5,KEY_POWER),
68 0
69};
70
3bc48014
LM
71static struct smc91x_platdata smc91x_info = {
72 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
73 .leda = RPC_LED_100_10,
74 .ledb = RPC_LED_TX_RX,
75};
76
1da177e4
LT
77static struct resource smc91x_resources[] = {
78 [0] = {
79 .start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
80 .end = H2P2_DBG_FPGA_ETHR_START + 0xf,
81 .flags = IORESOURCE_MEM,
82 },
83 [1] = {
372b1c32 84 .start = INT_7XX_MPU_EXT_NIRQ,
1da177e4 85 .end = 0,
e7b3dc7e 86 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
1da177e4
LT
87 },
88};
89
9b6553cd 90static struct mtd_partition nor_partitions[] = {
1da177e4
LT
91 /* bootloader (U-Boot, etc) in first sector */
92 {
93 .name = "bootloader",
94 .offset = 0,
95 .size = SZ_128K,
96 .mask_flags = MTD_WRITEABLE, /* force read-only */
97 },
98 /* bootloader params in the next sector */
99 {
100 .name = "params",
101 .offset = MTDPART_OFS_APPEND,
102 .size = SZ_128K,
103 .mask_flags = 0,
104 },
105 /* kernel */
106 {
107 .name = "kernel",
108 .offset = MTDPART_OFS_APPEND,
109 .size = SZ_2M,
110 .mask_flags = 0
111 },
112 /* rest of flash is a file system */
113 {
114 .name = "rootfs",
115 .offset = MTDPART_OFS_APPEND,
116 .size = MTDPART_SIZ_FULL,
117 .mask_flags = 0
118 },
119};
120
9b6553cd 121static struct flash_platform_data nor_data = {
1da177e4
LT
122 .map_name = "cfi_probe",
123 .width = 2,
9b6553cd
TL
124 .parts = nor_partitions,
125 .nr_parts = ARRAY_SIZE(nor_partitions),
1da177e4
LT
126};
127
9b6553cd 128static struct resource nor_resource = {
7c38cf02
TL
129 .start = OMAP_CS0_PHYS,
130 .end = OMAP_CS0_PHYS + SZ_32M - 1,
1da177e4
LT
131 .flags = IORESOURCE_MEM,
132};
133
9b6553cd 134static struct platform_device nor_device = {
1da177e4
LT
135 .name = "omapflash",
136 .id = 0,
137 .dev = {
9b6553cd
TL
138 .platform_data = &nor_data,
139 },
140 .num_resources = 1,
141 .resource = &nor_resource,
142};
143
78be6325 144static struct omap_nand_platform_data nand_data = {
9b6553cd
TL
145 .options = NAND_SAMSUNG_LP_OPTIONS,
146};
147
148static struct resource nand_resource = {
149 .start = OMAP_CS3_PHYS,
150 .end = OMAP_CS3_PHYS + SZ_4K - 1,
151 .flags = IORESOURCE_MEM,
152};
153
154static struct platform_device nand_device = {
155 .name = "omapnand",
156 .id = 0,
157 .dev = {
158 .platform_data = &nand_data,
1da177e4
LT
159 },
160 .num_resources = 1,
9b6553cd 161 .resource = &nand_resource,
1da177e4
LT
162};
163
164static struct platform_device smc91x_device = {
165 .name = "smc91x",
166 .id = 0,
3bc48014
LM
167 .dev = {
168 .platform_data = &smc91x_info,
169 },
1da177e4
LT
170 .num_resources = ARRAY_SIZE(smc91x_resources),
171 .resource = smc91x_resources,
172};
173
9b6553cd
TL
174static struct resource kp_resources[] = {
175 [0] = {
372b1c32
AB
176 .start = INT_7XX_MPUIO_KEYPAD,
177 .end = INT_7XX_MPUIO_KEYPAD,
9b6553cd
TL
178 .flags = IORESOURCE_IRQ,
179 },
180};
181
182static struct omap_kp_platform_data kp_data = {
4d24607b
KS
183 .rows = 8,
184 .cols = 8,
185 .keymap = p2_keymap,
186 .keymapsize = ARRAY_SIZE(p2_keymap),
187 .delay = 4,
188 .dbounce = 1,
9b6553cd
TL
189};
190
191static struct platform_device kp_device = {
192 .name = "omap-keypad",
193 .id = -1,
194 .dev = {
195 .platform_data = &kp_data,
196 },
197 .num_resources = ARRAY_SIZE(kp_resources),
198 .resource = kp_resources,
199};
200
201static struct platform_device lcd_device = {
202 .name = "lcd_p2",
203 .id = -1,
204};
205
1da177e4 206static struct platform_device *devices[] __initdata = {
9b6553cd
TL
207 &nor_device,
208 &nand_device,
1da177e4 209 &smc91x_device,
9b6553cd
TL
210 &kp_device,
211 &lcd_device,
1da177e4
LT
212};
213
9b6553cd
TL
214#define P2_NAND_RB_GPIO_PIN 62
215
78be6325 216static int nand_dev_ready(struct omap_nand_platform_data *data)
9b6553cd 217{
0b84b5ca 218 return gpio_get_value(P2_NAND_RB_GPIO_PIN);
9b6553cd
TL
219}
220
3179a019 221static struct omap_lcd_config perseus2_lcd_config __initdata = {
3179a019
TL
222 .ctrl_name = "internal",
223};
224
e27a93a9 225static struct omap_board_config_kernel perseus2_config[] __initdata = {
3179a019
TL
226 { OMAP_TAG_LCD, &perseus2_lcd_config },
227};
228
1da177e4
LT
229static void __init omap_perseus2_init(void)
230{
f2d18fea
JN
231 if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
232 BUG();
233 nand_data.dev_ready = nand_dev_ready;
9b6553cd
TL
234
235 omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
236 omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
237
238 platform_add_devices(devices, ARRAY_SIZE(devices));
3179a019
TL
239
240 omap_board_config = perseus2_config;
241 omap_board_config_size = ARRAY_SIZE(perseus2_config);
242 omap_serial_init();
1ed16a86 243 omap_register_i2c_bus(1, 100, NULL, 0);
1da177e4
LT
244}
245
246static void __init perseus2_init_smc91x(void)
247{
248 fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
249 mdelay(50);
250 fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
251 H2P2_DBG_FPGA_LAN_RESET);
252 mdelay(50);
253}
254
277d58ef 255static void __init omap_perseus2_init_irq(void)
1da177e4 256{
87bd63f6 257 omap1_init_common_hw();
1da177e4
LT
258 omap_init_irq();
259 omap_gpio_init();
260 perseus2_init_smc91x();
261}
1da177e4
LT
262/* Only FPGA needs to be mapped here. All others are done with ioremap */
263static struct map_desc omap_perseus2_io_desc[] __initdata = {
9fe133b1
DS
264 {
265 .virtual = H2P2_DBG_FPGA_BASE,
266 .pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
267 .length = H2P2_DBG_FPGA_SIZE,
268 .type = MT_DEVICE
269 }
1da177e4
LT
270};
271
272static void __init omap_perseus2_map_io(void)
273{
87bd63f6 274 omap1_map_common_io();
1da177e4
LT
275 iotable_init(omap_perseus2_io_desc,
276 ARRAY_SIZE(omap_perseus2_io_desc));
277
278 /* Early, board-dependent init */
279
280 /*
281 * Hold GSM Reset until needed
282 */
b51988db 283 omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
1da177e4
LT
284
285 /*
286 * UARTs -> done automagically by 8250 driver
287 */
288
289 /*
290 * CSx timings, GPIO Mux ... setup
291 */
292
293 /* Flash: CS0 timings setup */
b51988db
AB
294 omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
295 omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
1da177e4
LT
296
297 /*
93b1fae4 298 * Ethernet support through the debug board
1da177e4
LT
299 * CS1 timings setup
300 */
b51988db
AB
301 omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
302 omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
1da177e4
LT
303
304 /*
305 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
306 * It is used as the Ethernet controller interrupt
307 */
b51988db 308 omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9);
1da177e4
LT
309}
310
311MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
e9dea0c6 312 /* Maintainer: Kevin Hilman <kjh@hilman.org> */
e9dea0c6
RK
313 .phys_io = 0xfff00000,
314 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
315 .boot_params = 0x10000100,
316 .map_io = omap_perseus2_map_io,
317 .init_irq = omap_perseus2_init_irq,
318 .init_machine = omap_perseus2_init,
1da177e4
LT
319 .timer = &omap_timer,
320MACHINE_END
This page took 0.436604 seconds and 5 git commands to generate.