[deliverable/linux.git] / arch / arm / mach-omap1 / board-perseus2.c

/*
 * linux/arch/arm/mach-omap1/board-perseus2.c
 *
 * Modified from board-generic.c
 *
 * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
 * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <linux/smc91x.h>

#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/map.h>

#include <plat/tc.h>
#include <mach/gpio.h>
#include <plat/mux.h>
#include <plat/fpga.h>
#include <plat/keypad.h>
#include <plat/common.h>
#include <plat/board.h>

static int p2_keymap[] = {
	KEY(0,0,KEY_UP),
	KEY(0,1,KEY_RIGHT),
	KEY(0,2,KEY_LEFT),
	KEY(0,3,KEY_DOWN),
	KEY(0,4,KEY_ENTER),
	KEY(1,0,KEY_F10),
	KEY(1,1,KEY_SEND),
	KEY(1,2,KEY_END),
	KEY(1,3,KEY_VOLUMEDOWN),
	KEY(1,4,KEY_VOLUMEUP),
	KEY(1,5,KEY_RECORD),
	KEY(2,0,KEY_F9),
	KEY(2,1,KEY_3),
	KEY(2,2,KEY_6),
	KEY(2,3,KEY_9),
	KEY(2,4,KEY_KPDOT),
	KEY(3,0,KEY_BACK),
	KEY(3,1,KEY_2),
	KEY(3,2,KEY_5),
	KEY(3,3,KEY_8),
	KEY(3,4,KEY_0),
	KEY(3,5,KEY_KPSLASH),
	KEY(4,0,KEY_HOME),
	KEY(4,1,KEY_1),
	KEY(4,2,KEY_4),
	KEY(4,3,KEY_7),
	KEY(4,4,KEY_KPASTERISK),
	KEY(4,5,KEY_POWER),
	0
};

static struct smc91x_platdata smc91x_info = {
	.flags	= SMC91X_USE_16BIT | SMC91X_NOWAIT,
	.leda	= RPC_LED_100_10,
	.ledb	= RPC_LED_TX_RX,
};

static struct resource smc91x_resources[] = {
	[0] = {
		.start	= H2P2_DBG_FPGA_ETHR_START,	/* Physical */
		.end	= H2P2_DBG_FPGA_ETHR_START + 0xf,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= INT_7XX_MPU_EXT_NIRQ,
		.end	= 0,
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
	},
};

static struct mtd_partition nor_partitions[] = {
	/* bootloader (U-Boot, etc) in first sector */
	{
	      .name		= "bootloader",
	      .offset		= 0,
	      .size		= SZ_128K,
	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
	},
	/* bootloader params in the next sector */
	{
	      .name		= "params",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_128K,
	      .mask_flags	= 0,
	},
	/* kernel */
	{
	      .name		= "kernel",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= SZ_2M,
	      .mask_flags	= 0
	},
	/* rest of flash is a file system */
	{
	      .name		= "rootfs",
	      .offset		= MTDPART_OFS_APPEND,
	      .size		= MTDPART_SIZ_FULL,
	      .mask_flags	= 0
	},
};

static struct flash_platform_data nor_data = {
	.map_name	= "cfi_probe",
	.width		= 2,
	.parts		= nor_partitions,
	.nr_parts	= ARRAY_SIZE(nor_partitions),
};

static struct resource nor_resource = {
	.start		= OMAP_CS0_PHYS,
	.end		= OMAP_CS0_PHYS + SZ_32M - 1,
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nor_device = {
	.name		= "omapflash",
	.id		= 0,
	.dev		= {
		.platform_data	= &nor_data,
	},
	.num_resources	= 1,
	.resource	= &nor_resource,
};

static void nand_cmd_ctl(struct mtd_info *mtd, int cmd,	unsigned int ctrl)
{
	struct nand_chip *this = mtd->priv;
	unsigned long mask;

	if (cmd == NAND_CMD_NONE)
		return;

	mask = (ctrl & NAND_CLE) ? 0x02 : 0;
	if (ctrl & NAND_ALE)
		mask |= 0x04;
	writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
}

#define P2_NAND_RB_GPIO_PIN	62

static int nand_dev_ready(struct mtd_info *mtd)
{
	return gpio_get_value(P2_NAND_RB_GPIO_PIN);
}

static const char *part_probes[] = { "cmdlinepart", NULL };

static struct platform_nand_data nand_data = {
	.chip	= {
		.nr_chips		= 1,
		.chip_offset		= 0,
		.options		= NAND_SAMSUNG_LP_OPTIONS,
		.part_probe_types	= part_probes,
	},
	.ctrl	= {
		.cmd_ctrl	= nand_cmd_ctl,
		.dev_ready	= nand_dev_ready,
	},
};

static struct resource nand_resource = {
	.start		= OMAP_CS3_PHYS,
	.end		= OMAP_CS3_PHYS + SZ_4K - 1,
	.flags		= IORESOURCE_MEM,
};

static struct platform_device nand_device = {
	.name		= "gen_nand",
	.id		= 0,
	.dev		= {
		.platform_data	= &nand_data,
	},
	.num_resources	= 1,
	.resource	= &nand_resource,
};

static struct platform_device smc91x_device = {
	.name		= "smc91x",
	.id		= 0,
	.dev	= {
		.platform_data	= &smc91x_info,
	},
	.num_resources	= ARRAY_SIZE(smc91x_resources),
	.resource	= smc91x_resources,
};

static struct resource kp_resources[] = {
	[0] = {
		.start	= INT_7XX_MPUIO_KEYPAD,
		.end	= INT_7XX_MPUIO_KEYPAD,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct omap_kp_platform_data kp_data = {
	.rows		= 8,
	.cols		= 8,
	.keymap		= p2_keymap,
	.keymapsize	= ARRAY_SIZE(p2_keymap),
	.delay		= 4,
	.dbounce	= 1,
};

static struct platform_device kp_device = {
	.name		= "omap-keypad",
	.id		= -1,
	.dev		= {
		.platform_data = &kp_data,
	},
	.num_resources	= ARRAY_SIZE(kp_resources),
	.resource	= kp_resources,
};

static struct platform_device lcd_device = {
	.name		= "lcd_p2",
	.id		= -1,
};

static struct platform_device *devices[] __initdata = {
	&nor_device,
	&nand_device,
	&smc91x_device,
	&kp_device,
	&lcd_device,
};

static struct omap_lcd_config perseus2_lcd_config __initdata = {
	.ctrl_name	= "internal",
};

static struct omap_board_config_kernel perseus2_config[] __initdata = {
	{ OMAP_TAG_LCD,		&perseus2_lcd_config },
};

static void __init omap_perseus2_init(void)
{
	if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
		BUG();
	gpio_direction_input(P2_NAND_RB_GPIO_PIN);

	omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
	omap_cfg_reg(M8_1610_FLASH_CS2B_WE);

	platform_add_devices(devices, ARRAY_SIZE(devices));

	omap_board_config = perseus2_config;
	omap_board_config_size = ARRAY_SIZE(perseus2_config);
	omap_serial_init();
	omap_register_i2c_bus(1, 100, NULL, 0);
}

static void __init perseus2_init_smc91x(void)
{
	fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
	mdelay(50);
	fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
		   H2P2_DBG_FPGA_LAN_RESET);
	mdelay(50);
}

static void __init omap_perseus2_init_irq(void)
{
	omap1_init_common_hw();
	omap_init_irq();
	omap_gpio_init();
	perseus2_init_smc91x();
}
/* Only FPGA needs to be mapped here. All others are done with ioremap */
static struct map_desc omap_perseus2_io_desc[] __initdata = {
	{
		.virtual	= H2P2_DBG_FPGA_BASE,
		.pfn		= __phys_to_pfn(H2P2_DBG_FPGA_START),
		.length		= H2P2_DBG_FPGA_SIZE,
		.type		= MT_DEVICE
	}
};

static void __init omap_perseus2_map_io(void)
{
	omap1_map_common_io();
	iotable_init(omap_perseus2_io_desc,
		     ARRAY_SIZE(omap_perseus2_io_desc));

	/* Early, board-dependent init */

	/*
	 * Hold GSM Reset until needed
	 */
	omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);

	/*
	 * UARTs -> done automagically by 8250 driver
	 */

	/*
	 * CSx timings, GPIO Mux ... setup
	 */

	/* Flash: CS0 timings setup */
	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
	omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);

	/*
	 * Ethernet support through the debug board
	 * CS1 timings setup
	 */
	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
	omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);

	/*
	 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
	 * It is used as the Ethernet controller interrupt
	 */
	omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9);
}

MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
	/* Maintainer: Kevin Hilman <kjh@hilman.org> */
	.phys_io	= 0xfff00000,
	.io_pg_offst	= ((0xfef00000) >> 18) & 0xfffc,
	.boot_params	= 0x10000100,
	.map_io		= omap_perseus2_map_io,
	.init_irq	= omap_perseus2_init_irq,
	.init_machine	= omap_perseus2_init,
	.timer		= &omap_timer,
MACHINE_END
Commit	Line	Data
1da177e4	1	/*
dbdf9ced	2	* linux/arch/arm/mach-omap1/board-perseus2.c
1da177e4 LT	3	*
	4	* Modified from board-generic.c
	5	*
	6	* Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
	7	* Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/init.h>
d052d1be	16	#include <linux/platform_device.h>
1da177e4 LT	17	#include <linux/delay.h>
1da177e4 LT	18	#include <linux/mtd/mtd.h>
9b6553cd	19	#include <linux/mtd/nand.h>
1da177e4	20	#include <linux/mtd/partitions.h>
9b6553cd	21	#include <linux/input.h>
3bc48014	22	#include <linux/smc91x.h>
1da177e4	23
a09e64fb	24	#include <mach/hardware.h>
1da177e4 LT	25	#include <asm/mach-types.h>
	26	#include <asm/mach/arch.h>
	27	#include <asm/mach/flash.h>
	28	#include <asm/mach/map.h>
	29
ce491cf8	30	#include <plat/tc.h>
a09e64fb	31	#include <mach/gpio.h>
ce491cf8 TL	32	#include <plat/mux.h>
ce491cf8 TL	33	#include <plat/fpga.h>
ce491cf8 TL	34	#include <plat/keypad.h>
	35	#include <plat/common.h>
	36	#include <plat/board.h>
1da177e4	37
9b6553cd TL	38	static int p2_keymap[] = {
	39	KEY(0,0,KEY_UP),
	40	KEY(0,1,KEY_RIGHT),
	41	KEY(0,2,KEY_LEFT),
	42	KEY(0,3,KEY_DOWN),
496bcb81 VK	43	KEY(0,4,KEY_ENTER),
496bcb81 VK	44	KEY(1,0,KEY_F10),
9b6553cd TL	45	KEY(1,1,KEY_SEND),
	46	KEY(1,2,KEY_END),
	47	KEY(1,3,KEY_VOLUMEDOWN),
	48	KEY(1,4,KEY_VOLUMEUP),
	49	KEY(1,5,KEY_RECORD),
496bcb81	50	KEY(2,0,KEY_F9),
9b6553cd TL	51	KEY(2,1,KEY_3),
	52	KEY(2,2,KEY_6),
	53	KEY(2,3,KEY_9),
496bcb81	54	KEY(2,4,KEY_KPDOT),
9b6553cd TL	55	KEY(3,0,KEY_BACK),
	56	KEY(3,1,KEY_2),
	57	KEY(3,2,KEY_5),
	58	KEY(3,3,KEY_8),
	59	KEY(3,4,KEY_0),
496bcb81	60	KEY(3,5,KEY_KPSLASH),
9b6553cd TL	61	KEY(4,0,KEY_HOME),
	62	KEY(4,1,KEY_1),
	63	KEY(4,2,KEY_4),
	64	KEY(4,3,KEY_7),
496bcb81	65	KEY(4,4,KEY_KPASTERISK),
9b6553cd TL	66	KEY(4,5,KEY_POWER),
	67	0
	68	};
	69
3bc48014 LM	70	static struct smc91x_platdata smc91x_info = {
	71	.flags = SMC91X_USE_16BIT \| SMC91X_NOWAIT,
	72	.leda = RPC_LED_100_10,
	73	.ledb = RPC_LED_TX_RX,
	74	};
	75
1da177e4 LT	76	static struct resource smc91x_resources[] = {
	77	[0] = {
	78	.start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
	79	.end = H2P2_DBG_FPGA_ETHR_START + 0xf,
	80	.flags = IORESOURCE_MEM,
	81	},
	82	[1] = {
372b1c32	83	.start = INT_7XX_MPU_EXT_NIRQ,
1da177e4	84	.end = 0,
e7b3dc7e	85	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHEDGE,
1da177e4 LT	86	},
	87	};
	88
9b6553cd	89	static struct mtd_partition nor_partitions[] = {
1da177e4 LT	90	/* bootloader (U-Boot, etc) in first sector */
	91	{
	92	.name = "bootloader",
	93	.offset = 0,
	94	.size = SZ_128K,
	95	.mask_flags = MTD_WRITEABLE, /* force read-only */
	96	},
	97	/* bootloader params in the next sector */
	98	{
	99	.name = "params",
	100	.offset = MTDPART_OFS_APPEND,
	101	.size = SZ_128K,
	102	.mask_flags = 0,
	103	},
	104	/* kernel */
	105	{
	106	.name = "kernel",
	107	.offset = MTDPART_OFS_APPEND,
	108	.size = SZ_2M,
	109	.mask_flags = 0
	110	},
	111	/* rest of flash is a file system */
	112	{
	113	.name = "rootfs",
	114	.offset = MTDPART_OFS_APPEND,
	115	.size = MTDPART_SIZ_FULL,
	116	.mask_flags = 0
	117	},
	118	};
	119
9b6553cd	120	static struct flash_platform_data nor_data = {
1da177e4 LT	121	.map_name = "cfi_probe",
1da177e4 LT	122	.width = 2,
9b6553cd TL	123	.parts = nor_partitions,
9b6553cd TL	124	.nr_parts = ARRAY_SIZE(nor_partitions),
1da177e4 LT	125	};
1da177e4 LT	126
9b6553cd	127	static struct resource nor_resource = {
7c38cf02 TL	128	.start = OMAP_CS0_PHYS,
7c38cf02 TL	129	.end = OMAP_CS0_PHYS + SZ_32M - 1,
1da177e4 LT	130	.flags = IORESOURCE_MEM,
	131	};
	132
9b6553cd	133	static struct platform_device nor_device = {
1da177e4 LT	134	.name = "omapflash",
	135	.id = 0,
	136	.dev = {
9b6553cd TL	137	.platform_data = &nor_data,
	138	},
	139	.num_resources = 1,
	140	.resource = &nor_resource,
	141	};
	142
414f552a LM	143	static void nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
	144	{
	145	struct nand_chip *this = mtd->priv;
	146	unsigned long mask;
	147
	148	if (cmd == NAND_CMD_NONE)
	149	return;
	150
	151	mask = (ctrl & NAND_CLE) ? 0x02 : 0;
	152	if (ctrl & NAND_ALE)
	153	mask \|= 0x04;
	154	writeb(cmd, (unsigned long)this->IO_ADDR_W \| mask);
	155	}
	156
	157	#define P2_NAND_RB_GPIO_PIN 62
	158
	159	static int nand_dev_ready(struct mtd_info *mtd)
	160	{
	161	return gpio_get_value(P2_NAND_RB_GPIO_PIN);
	162	}
	163
	164	static const char *part_probes[] = { "cmdlinepart", NULL };
	165
	166	static struct platform_nand_data nand_data = {
	167	.chip = {
	168	.nr_chips = 1,
	169	.chip_offset = 0,
	170	.options = NAND_SAMSUNG_LP_OPTIONS,
	171	.part_probe_types = part_probes,
	172	},
	173	.ctrl = {
	174	.cmd_ctrl = nand_cmd_ctl,
	175	.dev_ready = nand_dev_ready,
	176	},
9b6553cd TL	177	};
	178
	179	static struct resource nand_resource = {
	180	.start = OMAP_CS3_PHYS,
	181	.end = OMAP_CS3_PHYS + SZ_4K - 1,
	182	.flags = IORESOURCE_MEM,
	183	};
	184
	185	static struct platform_device nand_device = {
414f552a	186	.name = "gen_nand",
9b6553cd TL	187	.id = 0,
	188	.dev = {
	189	.platform_data = &nand_data,
1da177e4 LT	190	},
1da177e4 LT	191	.num_resources = 1,
9b6553cd	192	.resource = &nand_resource,
1da177e4 LT	193	};
	194
	195	static struct platform_device smc91x_device = {
	196	.name = "smc91x",
	197	.id = 0,
3bc48014 LM	198	.dev = {
	199	.platform_data = &smc91x_info,
	200	},
1da177e4 LT	201	.num_resources = ARRAY_SIZE(smc91x_resources),
	202	.resource = smc91x_resources,
	203	};
	204
9b6553cd TL	205	static struct resource kp_resources[] = {
9b6553cd TL	206	[0] = {
372b1c32 AB	207	.start = INT_7XX_MPUIO_KEYPAD,
372b1c32 AB	208	.end = INT_7XX_MPUIO_KEYPAD,
9b6553cd TL	209	.flags = IORESOURCE_IRQ,
	210	},
	211	};
	212
	213	static struct omap_kp_platform_data kp_data = {
4d24607b KS	214	.rows = 8,
	215	.cols = 8,
	216	.keymap = p2_keymap,
	217	.keymapsize = ARRAY_SIZE(p2_keymap),
	218	.delay = 4,
	219	.dbounce = 1,
9b6553cd TL	220	};
	221
	222	static struct platform_device kp_device = {
	223	.name = "omap-keypad",
	224	.id = -1,
	225	.dev = {
	226	.platform_data = &kp_data,
	227	},
	228	.num_resources = ARRAY_SIZE(kp_resources),
	229	.resource = kp_resources,
	230	};
	231
	232	static struct platform_device lcd_device = {
	233	.name = "lcd_p2",
	234	.id = -1,
	235	};
	236
1da177e4	237	static struct platform_device *devices[] __initdata = {
9b6553cd TL	238	&nor_device,
9b6553cd TL	239	&nand_device,
1da177e4	240	&smc91x_device,
9b6553cd TL	241	&kp_device,
9b6553cd TL	242	&lcd_device,
1da177e4 LT	243	};
1da177e4 LT	244
3179a019	245	static struct omap_lcd_config perseus2_lcd_config __initdata = {
3179a019 TL	246	.ctrl_name = "internal",
	247	};
	248
e27a93a9	249	static struct omap_board_config_kernel perseus2_config[] __initdata = {
3179a019 TL	250	{ OMAP_TAG_LCD, &perseus2_lcd_config },
	251	};
	252
1da177e4 LT	253	static void __init omap_perseus2_init(void)
1da177e4 LT	254	{
f2d18fea JN	255	if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
f2d18fea JN	256	BUG();
414f552a	257	gpio_direction_input(P2_NAND_RB_GPIO_PIN);
9b6553cd TL	258
	259	omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
	260	omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
	261
	262	platform_add_devices(devices, ARRAY_SIZE(devices));
3179a019 TL	263
	264	omap_board_config = perseus2_config;
	265	omap_board_config_size = ARRAY_SIZE(perseus2_config);
	266	omap_serial_init();
1ed16a86	267	omap_register_i2c_bus(1, 100, NULL, 0);
1da177e4 LT	268	}
	269
	270	static void __init perseus2_init_smc91x(void)
	271	{
	272	fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
	273	mdelay(50);
	274	fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
	275	H2P2_DBG_FPGA_LAN_RESET);
	276	mdelay(50);
	277	}
	278
277d58ef	279	static void __init omap_perseus2_init_irq(void)
1da177e4	280	{
87bd63f6	281	omap1_init_common_hw();
1da177e4 LT	282	omap_init_irq();
	283	omap_gpio_init();
	284	perseus2_init_smc91x();
	285	}
1da177e4 LT	286	/* Only FPGA needs to be mapped here. All others are done with ioremap */
1da177e4 LT	287	static struct map_desc omap_perseus2_io_desc[] __initdata = {
9fe133b1 DS	288	{
	289	.virtual = H2P2_DBG_FPGA_BASE,
	290	.pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
	291	.length = H2P2_DBG_FPGA_SIZE,
	292	.type = MT_DEVICE
	293	}
1da177e4 LT	294	};
	295
	296	static void __init omap_perseus2_map_io(void)
	297	{
87bd63f6	298	omap1_map_common_io();
1da177e4 LT	299	iotable_init(omap_perseus2_io_desc,
	300	ARRAY_SIZE(omap_perseus2_io_desc));
	301
	302	/* Early, board-dependent init */
	303
	304	/*
	305	* Hold GSM Reset until needed
	306	*/
b51988db	307	omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
1da177e4 LT	308
	309	/*
	310	* UARTs -> done automagically by 8250 driver
	311	*/
	312
	313	/*
	314	* CSx timings, GPIO Mux ... setup
	315	*/
	316
	317	/* Flash: CS0 timings setup */
b51988db AB	318	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
b51988db AB	319	omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
1da177e4 LT	320
1da177e4 LT	321	/*
93b1fae4	322	* Ethernet support through the debug board
1da177e4 LT	323	* CS1 timings setup
1da177e4 LT	324	*/
b51988db AB	325	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
b51988db AB	326	omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
1da177e4 LT	327
	328	/*
	329	* Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
	330	* It is used as the Ethernet controller interrupt
	331	*/
b51988db	332	omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9);
1da177e4 LT	333	}
	334
	335	MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
e9dea0c6	336	/* Maintainer: Kevin Hilman <kjh@hilman.org> */
e9dea0c6 RK	337	.phys_io = 0xfff00000,
	338	.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
	339	.boot_params = 0x10000100,
	340	.map_io = omap_perseus2_map_io,
	341	.init_irq = omap_perseus2_init_irq,
	342	.init_machine = omap_perseus2_init,
1da177e4 LT	343	.timer = &omap_timer,
1da177e4 LT	344	MACHINE_END