[deliverable/linux.git] / arch / arm / mach-omap1 / devices.c

/*
 * linux/arch/arm/mach-omap1/devices.c
 *
 * OMAP1 platform device setup/initialization
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/dma-mapping.h>
#include <linux/gpio.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>

#include <asm/mach/map.h>

#include <plat/tc.h>
#include <mach/mux.h>
#include <plat/dma.h>
#include <plat/mmc.h>

#include <mach/omap7xx.h>
#include <mach/camera.h>
#include <mach/hardware.h>

#include "common.h"
#include "clock.h"

#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)

static struct platform_device omap_pcm = {
	.name	= "omap-pcm-audio",
	.id	= -1,
};

static void omap_init_audio(void)
{
	platform_device_register(&omap_pcm);
}

#else
static inline void omap_init_audio(void) {}
#endif

/*-------------------------------------------------------------------------*/

#if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE)

#define	OMAP_RTC_BASE		0xfffb4800

static struct resource rtc_resources[] = {
	{
		.start		= OMAP_RTC_BASE,
		.end		= OMAP_RTC_BASE + 0x5f,
		.flags		= IORESOURCE_MEM,
	},
	{
		.start		= INT_RTC_TIMER,
		.flags		= IORESOURCE_IRQ,
	},
	{
		.start		= INT_RTC_ALARM,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct platform_device omap_rtc_device = {
	.name           = "omap_rtc",
	.id             = -1,
	.num_resources	= ARRAY_SIZE(rtc_resources),
	.resource	= rtc_resources,
};

static void omap_init_rtc(void)
{
	(void) platform_device_register(&omap_rtc_device);
}
#else
static inline void omap_init_rtc(void) {}
#endif

static inline void omap_init_mbox(void) { }

/*-------------------------------------------------------------------------*/

#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)

static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
			int controller_nr)
{
	if (controller_nr == 0) {
		if (cpu_is_omap7xx()) {
			omap_cfg_reg(MMC_7XX_CMD);
			omap_cfg_reg(MMC_7XX_CLK);
			omap_cfg_reg(MMC_7XX_DAT0);
		} else {
			omap_cfg_reg(MMC_CMD);
			omap_cfg_reg(MMC_CLK);
			omap_cfg_reg(MMC_DAT0);
		}

		if (cpu_is_omap1710()) {
			omap_cfg_reg(M15_1710_MMC_CLKI);
			omap_cfg_reg(P19_1710_MMC_CMDDIR);
			omap_cfg_reg(P20_1710_MMC_DATDIR0);
		}
		if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) {
			omap_cfg_reg(MMC_DAT1);
			/* NOTE: DAT2 can be on W10 (here) or M15 */
			if (!mmc_controller->slots[0].nomux)
				omap_cfg_reg(MMC_DAT2);
			omap_cfg_reg(MMC_DAT3);
		}
	}

	/* Block 2 is on newer chips, and has many pinout options */
	if (cpu_is_omap16xx() && controller_nr == 1) {
		if (!mmc_controller->slots[1].nomux) {
			omap_cfg_reg(Y8_1610_MMC2_CMD);
			omap_cfg_reg(Y10_1610_MMC2_CLK);
			omap_cfg_reg(R18_1610_MMC2_CLKIN);
			omap_cfg_reg(W8_1610_MMC2_DAT0);
			if (mmc_controller->slots[1].wires == 4) {
				omap_cfg_reg(V8_1610_MMC2_DAT1);
				omap_cfg_reg(W15_1610_MMC2_DAT2);
				omap_cfg_reg(R10_1610_MMC2_DAT3);
			}

			/* These are needed for the level shifter */
			omap_cfg_reg(V9_1610_MMC2_CMDDIR);
			omap_cfg_reg(V5_1610_MMC2_DATDIR0);
			omap_cfg_reg(W19_1610_MMC2_DATDIR1);
		}

		/* Feedback clock must be set on OMAP-1710 MMC2 */
		if (cpu_is_omap1710())
			omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
					MOD_CONF_CTRL_1);
	}
}

#define OMAP_MMC_NR_RES		4

/*
 * Register MMC devices.
 */
static int __init omap_mmc_add(const char *name, int id, unsigned long base,
				unsigned long size, unsigned int irq,
				unsigned rx_req, unsigned tx_req,
				struct omap_mmc_platform_data *data)
{
	struct platform_device *pdev;
	struct resource res[OMAP_MMC_NR_RES];
	int ret;

	pdev = platform_device_alloc(name, id);
	if (!pdev)
		return -ENOMEM;

	memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
	res[0].start = base;
	res[0].end = base + size - 1;
	res[0].flags = IORESOURCE_MEM;
	res[1].start = res[1].end = irq;
	res[1].flags = IORESOURCE_IRQ;
	res[2].start = rx_req;
	res[2].name = "rx";
	res[2].flags = IORESOURCE_DMA;
	res[3].start = tx_req;
	res[3].name = "tx";
	res[3].flags = IORESOURCE_DMA;

	ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
	if (ret == 0)
		ret = platform_device_add_data(pdev, data, sizeof(*data));
	if (ret)
		goto fail;

	ret = platform_device_add(pdev);
	if (ret)
		goto fail;

	/* return device handle to board setup code */
	data->dev = &pdev->dev;
	return 0;

fail:
	platform_device_put(pdev);
	return ret;
}

void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
			int nr_controllers)
{
	int i;

	for (i = 0; i < nr_controllers; i++) {
		unsigned long base, size;
		unsigned rx_req, tx_req;
		unsigned int irq = 0;

		if (!mmc_data[i])
			continue;

		omap1_mmc_mux(mmc_data[i], i);

		switch (i) {
		case 0:
			base = OMAP1_MMC1_BASE;
			irq = INT_MMC;
			rx_req = OMAP_DMA_MMC_RX;
			tx_req = OMAP_DMA_MMC_TX;
			break;
		case 1:
			if (!cpu_is_omap16xx())
				return;
			base = OMAP1_MMC2_BASE;
			irq = INT_1610_MMC2;
			rx_req = OMAP_DMA_MMC2_RX;
			tx_req = OMAP_DMA_MMC2_TX;
			break;
		default:
			continue;
		}
		size = OMAP1_MMC_SIZE;

		omap_mmc_add("mmci-omap", i, base, size, irq,
				rx_req, tx_req, mmc_data[i]);
	}
}

#endif

/*-------------------------------------------------------------------------*/

/* OMAP7xx SPI support */
#if defined(CONFIG_SPI_OMAP_100K) || defined(CONFIG_SPI_OMAP_100K_MODULE)

struct platform_device omap_spi1 = {
	.name           = "omap1_spi100k",
	.id             = 1,
};

struct platform_device omap_spi2 = {
	.name           = "omap1_spi100k",
	.id             = 2,
};

static void omap_init_spi100k(void)
{
	omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff);
	if (omap_spi1.dev.platform_data)
		platform_device_register(&omap_spi1);

	omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff);
	if (omap_spi2.dev.platform_data)
		platform_device_register(&omap_spi2);
}

#else
static inline void omap_init_spi100k(void)
{
}
#endif


#define OMAP1_CAMERA_BASE	0xfffb6800
#define OMAP1_CAMERA_IOSIZE	0x1c

static struct resource omap1_camera_resources[] = {
	[0] = {
		.start	= OMAP1_CAMERA_BASE,
		.end	= OMAP1_CAMERA_BASE + OMAP1_CAMERA_IOSIZE - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= INT_CAMERA,
		.flags	= IORESOURCE_IRQ,
	},
};

static u64 omap1_camera_dma_mask = DMA_BIT_MASK(32);

static struct platform_device omap1_camera_device = {
	.name		= "omap1-camera",
	.id		= 0, /* This is used to put cameras on this interface */
	.dev		= {
		.dma_mask		= &omap1_camera_dma_mask,
		.coherent_dma_mask	= DMA_BIT_MASK(32),
	},
	.num_resources	= ARRAY_SIZE(omap1_camera_resources),
	.resource	= omap1_camera_resources,
};

void __init omap1_camera_init(void *info)
{
	struct platform_device *dev = &omap1_camera_device;
	int ret;

	dev->dev.platform_data = info;

	ret = platform_device_register(dev);
	if (ret)
		dev_err(&dev->dev, "unable to register device: %d\n", ret);
}


/*-------------------------------------------------------------------------*/

static inline void omap_init_sti(void) {}

/* Numbering for the SPI-capable controllers when used for SPI:
 * spi		= 1
 * uwire	= 2
 * mmc1..2	= 3..4
 * mcbsp1..3	= 5..7
 */

#if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE)

#define	OMAP_UWIRE_BASE		0xfffb3000

static struct resource uwire_resources[] = {
	{
		.start		= OMAP_UWIRE_BASE,
		.end		= OMAP_UWIRE_BASE + 0x20,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device omap_uwire_device = {
	.name	   = "omap_uwire",
	.id	     = -1,
	.num_resources	= ARRAY_SIZE(uwire_resources),
	.resource	= uwire_resources,
};

static void omap_init_uwire(void)
{
	/* FIXME define and use a boot tag; not all boards will be hooking
	 * up devices to the microwire controller, and multi-board configs
	 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
	 */

	/* board-specific code must configure chipselects (only a few
	 * are normally used) and SCLK/SDI/SDO (each has two choices).
	 */
	(void) platform_device_register(&omap_uwire_device);
}
#else
static inline void omap_init_uwire(void) {}
#endif


#define OMAP1_RNG_BASE		0xfffe5000

static struct resource omap1_rng_resources[] = {
	{
		.start		= OMAP1_RNG_BASE,
		.end		= OMAP1_RNG_BASE + 0x4f,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device omap1_rng_device = {
	.name		= "omap_rng",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(omap1_rng_resources),
	.resource	= omap1_rng_resources,
};

static void omap1_init_rng(void)
{
	if (!cpu_is_omap16xx())
		return;

	(void) platform_device_register(&omap1_rng_device);
}

/*-------------------------------------------------------------------------*/

/*
 * This gets called after board-specific INIT_MACHINE, and initializes most
 * on-chip peripherals accessible on this board (except for few like USB):
 *
 *  (a) Does any "standard config" pin muxing needed.  Board-specific
 *	code will have muxed GPIO pins and done "nonstandard" setup;
 *	that code could live in the boot loader.
 *  (b) Populating board-specific platform_data with the data drivers
 *	rely on to handle wiring variations.
 *  (c) Creating platform devices as meaningful on this board and
 *	with this kernel configuration.
 *
 * Claiming GPIOs, and setting their direction and initial values, is the
 * responsibility of the device drivers.  So is responding to probe().
 *
 * Board-specific knowledge like creating devices or pin setup is to be
 * kept out of drivers as much as possible.  In particular, pin setup
 * may be handled by the boot loader, and drivers should expect it will
 * normally have been done by the time they're probed.
 */
static int __init omap1_init_devices(void)
{
	if (!cpu_class_is_omap1())
		return -ENODEV;

	omap_sram_init();
	omap1_clk_late_init();

	/* please keep these calls, and their implementations above,
	 * in alphabetical order so they're easier to sort through.
	 */

	omap_init_audio();
	omap_init_mbox();
	omap_init_rtc();
	omap_init_spi100k();
	omap_init_sti();
	omap_init_uwire();
	omap1_init_rng();

	return 0;
}
arch_initcall(omap1_init_devices);

#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)

static struct resource wdt_resources[] = {
	{
		.start		= 0xfffeb000,
		.end		= 0xfffeb07F,
		.flags		= IORESOURCE_MEM,
	},
};

static struct platform_device omap_wdt_device = {
	.name	   = "omap_wdt",
	.id	     = -1,
	.num_resources	= ARRAY_SIZE(wdt_resources),
	.resource	= wdt_resources,
};

static int __init omap_init_wdt(void)
{
	if (!cpu_is_omap16xx())
		return -ENODEV;

	return platform_device_register(&omap_wdt_device);
}
subsys_initcall(omap_init_wdt);
#endif
Commit	Line	Data
7c38cf02 TL	1	/*
	2	* linux/arch/arm/mach-omap1/devices.c
	3	*
	4	* OMAP1 platform device setup/initialization
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
1a96edd7	12	#include <linux/dma-mapping.h>
2f8163ba	13	#include <linux/gpio.h>
7c38cf02 TL	14	#include <linux/module.h>
	15	#include <linux/kernel.h>
	16	#include <linux/init.h>
d052d1be	17	#include <linux/platform_device.h>
c5c4dce4	18	#include <linux/spi/spi.h>
7c38cf02	19
7c38cf02 TL	20	#include <asm/mach/map.h>
7c38cf02 TL	21
ce491cf8	22	#include <plat/tc.h>
70c494c3	23	#include <mach/mux.h>
6c432f72	24	#include <plat/dma.h>
ce491cf8	25	#include <plat/mmc.h>
7c38cf02	26
68cb700c	27	#include <mach/omap7xx.h>
2e3ee9f4 TL	28	#include <mach/camera.h>
	29	#include <mach/hardware.h>
	30
	31	#include "common.h"
e9b7086b TL	32	#include "clock.h"
e9b7086b TL	33
fcc76a85 TL	34	#if defined(CONFIG_SND_SOC) \|\| defined(CONFIG_SND_SOC_MODULE)
	35
	36	static struct platform_device omap_pcm = {
	37	.name = "omap-pcm-audio",
	38	.id = -1,
	39	};
	40
	41	static void omap_init_audio(void)
	42	{
	43	platform_device_register(&omap_pcm);
	44	}
	45
	46	#else
	47	static inline void omap_init_audio(void) {}
	48	#endif
	49
7c38cf02 TL	50	/-------------------------------------------------------------------------/
7c38cf02 TL	51
db68b189	52	#if defined(CONFIG_RTC_DRV_OMAP) \|\| defined(CONFIG_RTC_DRV_OMAP_MODULE)
7c38cf02 TL	53
	54	#define OMAP_RTC_BASE 0xfffb4800
	55
	56	static struct resource rtc_resources[] = {
	57	{
	58	.start = OMAP_RTC_BASE,
	59	.end = OMAP_RTC_BASE + 0x5f,
	60	.flags = IORESOURCE_MEM,
	61	},
	62	{
	63	.start = INT_RTC_TIMER,
	64	.flags = IORESOURCE_IRQ,
	65	},
	66	{
	67	.start = INT_RTC_ALARM,
	68	.flags = IORESOURCE_IRQ,
	69	},
	70	};
	71
	72	static struct platform_device omap_rtc_device = {
	73	.name = "omap_rtc",
	74	.id = -1,
7c38cf02 TL	75	.num_resources = ARRAY_SIZE(rtc_resources),
	76	.resource = rtc_resources,
	77	};
	78
	79	static void omap_init_rtc(void)
	80	{
	81	(void) platform_device_register(&omap_rtc_device);
	82	}
	83	#else
	84	static inline void omap_init_rtc(void) {}
	85	#endif
	86
c40fae95	87	static inline void omap_init_mbox(void) { }
c40fae95	88
d8874665 TL	89	/-------------------------------------------------------------------------/
	90
	91	#if defined(CONFIG_MMC_OMAP) \|\| defined(CONFIG_MMC_OMAP_MODULE)
	92
	93	static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
	94	int controller_nr)
	95	{
	96	if (controller_nr == 0) {
490a5665 CM	97	if (cpu_is_omap7xx()) {
	98	omap_cfg_reg(MMC_7XX_CMD);
	99	omap_cfg_reg(MMC_7XX_CLK);
	100	omap_cfg_reg(MMC_7XX_DAT0);
	101	} else {
	102	omap_cfg_reg(MMC_CMD);
	103	omap_cfg_reg(MMC_CLK);
	104	omap_cfg_reg(MMC_DAT0);
	105	}
	106
d8874665 TL	107	if (cpu_is_omap1710()) {
	108	omap_cfg_reg(M15_1710_MMC_CLKI);
	109	omap_cfg_reg(P19_1710_MMC_CMDDIR);
	110	omap_cfg_reg(P20_1710_MMC_DATDIR0);
	111	}
490a5665	112	if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) {
d8874665 TL	113	omap_cfg_reg(MMC_DAT1);
	114	/* NOTE: DAT2 can be on W10 (here) or M15 */
	115	if (!mmc_controller->slots[0].nomux)
	116	omap_cfg_reg(MMC_DAT2);
	117	omap_cfg_reg(MMC_DAT3);
	118	}
	119	}
	120
	121	/* Block 2 is on newer chips, and has many pinout options */
	122	if (cpu_is_omap16xx() && controller_nr == 1) {
	123	if (!mmc_controller->slots[1].nomux) {
	124	omap_cfg_reg(Y8_1610_MMC2_CMD);
	125	omap_cfg_reg(Y10_1610_MMC2_CLK);
	126	omap_cfg_reg(R18_1610_MMC2_CLKIN);
	127	omap_cfg_reg(W8_1610_MMC2_DAT0);
90c62bf0	128	if (mmc_controller->slots[1].wires == 4) {
d8874665 TL	129	omap_cfg_reg(V8_1610_MMC2_DAT1);
	130	omap_cfg_reg(W15_1610_MMC2_DAT2);
	131	omap_cfg_reg(R10_1610_MMC2_DAT3);
	132	}
	133
	134	/* These are needed for the level shifter */
	135	omap_cfg_reg(V9_1610_MMC2_CMDDIR);
	136	omap_cfg_reg(V5_1610_MMC2_DATDIR0);
	137	omap_cfg_reg(W19_1610_MMC2_DATDIR1);
	138	}
	139
	140	/* Feedback clock must be set on OMAP-1710 MMC2 */
	141	if (cpu_is_omap1710())
	142	omap_writel(omap_readl(MOD_CONF_CTRL_1) \| (1 << 24),
	143	MOD_CONF_CTRL_1);
	144	}
	145	}
	146
6c432f72	147	#define OMAP_MMC_NR_RES 4
5ff391d8 TL	148
	149	/*
	150	* Register MMC devices.
	151	*/
	152	static int __init omap_mmc_add(const char *name, int id, unsigned long base,
	153	unsigned long size, unsigned int irq,
6c432f72	154	unsigned rx_req, unsigned tx_req,
5ff391d8 TL	155	struct omap_mmc_platform_data *data)
	156	{
	157	struct platform_device *pdev;
	158	struct resource res[OMAP_MMC_NR_RES];
	159	int ret;
	160
	161	pdev = platform_device_alloc(name, id);
	162	if (!pdev)
	163	return -ENOMEM;
	164
	165	memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
	166	res[0].start = base;
	167	res[0].end = base + size - 1;
	168	res[0].flags = IORESOURCE_MEM;
	169	res[1].start = res[1].end = irq;
	170	res[1].flags = IORESOURCE_IRQ;
6c432f72 TL	171	res[2].start = rx_req;
	172	res[2].name = "rx";
	173	res[2].flags = IORESOURCE_DMA;
	174	res[3].start = tx_req;
	175	res[3].name = "tx";
	176	res[3].flags = IORESOURCE_DMA;
5ff391d8 TL	177
	178	ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
	179	if (ret == 0)
	180	ret = platform_device_add_data(pdev, data, sizeof(*data));
	181	if (ret)
	182	goto fail;
	183
	184	ret = platform_device_add(pdev);
	185	if (ret)
	186	goto fail;
	187
	188	/* return device handle to board setup code */
	189	data->dev = &pdev->dev;
	190	return 0;
	191
	192	fail:
	193	platform_device_put(pdev);
	194	return ret;
	195	}
	196
d8874665 TL	197	void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
	198	int nr_controllers)
	199	{
	200	int i;
	201
	202	for (i = 0; i < nr_controllers; i++) {
	203	unsigned long base, size;
6c432f72	204	unsigned rx_req, tx_req;
d8874665 TL	205	unsigned int irq = 0;
	206
	207	if (!mmc_data[i])
	208	continue;
	209
	210	omap1_mmc_mux(mmc_data[i], i);
	211
	212	switch (i) {
	213	case 0:
	214	base = OMAP1_MMC1_BASE;
	215	irq = INT_MMC;
6c432f72 TL	216	rx_req = OMAP_DMA_MMC_RX;
6c432f72 TL	217	tx_req = OMAP_DMA_MMC_TX;
d8874665 TL	218	break;
	219	case 1:
	220	if (!cpu_is_omap16xx())
	221	return;
	222	base = OMAP1_MMC2_BASE;
	223	irq = INT_1610_MMC2;
6c432f72 TL	224	rx_req = OMAP_DMA_MMC2_RX;
6c432f72 TL	225	tx_req = OMAP_DMA_MMC2_TX;
d8874665 TL	226	break;
	227	default:
	228	continue;
	229	}
	230	size = OMAP1_MMC_SIZE;
	231
6c432f72 TL	232	omap_mmc_add("mmci-omap", i, base, size, irq,
6c432f72 TL	233	rx_req, tx_req, mmc_data[i]);
11eff278	234	}
d8874665 TL	235	}
	236
	237	#endif
	238
	239	/-------------------------------------------------------------------------/
	240
c5c4dce4 CM	241	/* OMAP7xx SPI support */
	242	#if defined(CONFIG_SPI_OMAP_100K) \|\| defined(CONFIG_SPI_OMAP_100K_MODULE)
	243
	244	struct platform_device omap_spi1 = {
	245	.name = "omap1_spi100k",
	246	.id = 1,
	247	};
	248
	249	struct platform_device omap_spi2 = {
	250	.name = "omap1_spi100k",
	251	.id = 2,
	252	};
	253
	254	static void omap_init_spi100k(void)
	255	{
	256	omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff);
	257	if (omap_spi1.dev.platform_data)
	258	platform_device_register(&omap_spi1);
	259
	260	omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff);
	261	if (omap_spi2.dev.platform_data)
	262	platform_device_register(&omap_spi2);
	263	}
	264
	265	#else
	266	static inline void omap_init_spi100k(void)
	267	{
	268	}
	269	#endif
	270
1a96edd7 JK	271
	272	#define OMAP1_CAMERA_BASE 0xfffb6800
	273	#define OMAP1_CAMERA_IOSIZE 0x1c
	274
	275	static struct resource omap1_camera_resources[] = {
	276	[0] = {
	277	.start = OMAP1_CAMERA_BASE,
	278	.end = OMAP1_CAMERA_BASE + OMAP1_CAMERA_IOSIZE - 1,
	279	.flags = IORESOURCE_MEM,
	280	},
	281	[1] = {
	282	.start = INT_CAMERA,
	283	.flags = IORESOURCE_IRQ,
	284	},
	285	};
	286
	287	static u64 omap1_camera_dma_mask = DMA_BIT_MASK(32);
	288
	289	static struct platform_device omap1_camera_device = {
	290	.name = "omap1-camera",
	291	.id = 0, /* This is used to put cameras on this interface */
	292	.dev = {
	293	.dma_mask = &omap1_camera_dma_mask,
	294	.coherent_dma_mask = DMA_BIT_MASK(32),
	295	},
	296	.num_resources = ARRAY_SIZE(omap1_camera_resources),
	297	.resource = omap1_camera_resources,
	298	};
	299
	300	void __init omap1_camera_init(void *info)
	301	{
	302	struct platform_device *dev = &omap1_camera_device;
	303	int ret;
	304
	305	dev->dev.platform_data = info;
	306
	307	ret = platform_device_register(dev);
	308	if (ret)
	309	dev_err(&dev->dev, "unable to register device: %d\n", ret);
	310	}
	311
	312
c5c4dce4 CM	313	/-------------------------------------------------------------------------/
c5c4dce4 CM	314
9b6553cd	315	static inline void omap_init_sti(void) {}
7c38cf02	316
49b1a616 TL	317	/* Numbering for the SPI-capable controllers when used for SPI:
	318	* spi = 1
	319	* uwire = 2
	320	* mmc1..2 = 3..4
	321	* mcbsp1..3 = 5..7
	322	*/
	323
	324	#if defined(CONFIG_SPI_OMAP_UWIRE) \|\| defined(CONFIG_SPI_OMAP_UWIRE_MODULE)
	325
	326	#define OMAP_UWIRE_BASE 0xfffb3000
	327
	328	static struct resource uwire_resources[] = {
	329	{
	330	.start = OMAP_UWIRE_BASE,
	331	.end = OMAP_UWIRE_BASE + 0x20,
	332	.flags = IORESOURCE_MEM,
	333	},
	334	};
	335
	336	static struct platform_device omap_uwire_device = {
	337	.name = "omap_uwire",
	338	.id = -1,
	339	.num_resources = ARRAY_SIZE(uwire_resources),
	340	.resource = uwire_resources,
	341	};
	342
	343	static void omap_init_uwire(void)
	344	{
	345	/* FIXME define and use a boot tag; not all boards will be hooking
	346	* up devices to the microwire controller, and multi-board configs
	347	* mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
	348	*/
	349
	350	/* board-specific code must configure chipselects (only a few
	351	* are normally used) and SCLK/SDI/SDO (each has two choices).
	352	*/
	353	(void) platform_device_register(&omap_uwire_device);
	354	}
	355	#else
	356	static inline void omap_init_uwire(void) {}
	357	#endif
	358
	359
4848d460 PW	360	#define OMAP1_RNG_BASE 0xfffe5000
	361
	362	static struct resource omap1_rng_resources[] = {
	363	{
	364	.start = OMAP1_RNG_BASE,
	365	.end = OMAP1_RNG_BASE + 0x4f,
	366	.flags = IORESOURCE_MEM,
	367	},
	368	};
	369
	370	static struct platform_device omap1_rng_device = {
	371	.name = "omap_rng",
	372	.id = -1,
	373	.num_resources = ARRAY_SIZE(omap1_rng_resources),
	374	.resource = omap1_rng_resources,
	375	};
	376
	377	static void omap1_init_rng(void)
	378	{
fe47c58b PW	379	if (!cpu_is_omap16xx())
	380	return;
	381
4848d460 PW	382	(void) platform_device_register(&omap1_rng_device);
	383	}
	384
	385	/-------------------------------------------------------------------------/
	386
7c38cf02 TL	387	/*
	388	* This gets called after board-specific INIT_MACHINE, and initializes most
	389	* on-chip peripherals accessible on this board (except for few like USB):
	390	*
	391	* (a) Does any "standard config" pin muxing needed. Board-specific
	392	* code will have muxed GPIO pins and done "nonstandard" setup;
	393	* that code could live in the boot loader.
	394	* (b) Populating board-specific platform_data with the data drivers
	395	* rely on to handle wiring variations.
	396	* (c) Creating platform devices as meaningful on this board and
	397	* with this kernel configuration.
	398	*
	399	* Claiming GPIOs, and setting their direction and initial values, is the
	400	* responsibility of the device drivers. So is responding to probe().
	401	*
25985edc	402	* Board-specific knowledge like creating devices or pin setup is to be
7c38cf02 TL	403	* kept out of drivers as much as possible. In particular, pin setup
	404	* may be handled by the boot loader, and drivers should expect it will
	405	* normally have been done by the time they're probed.
	406	*/
3179a019	407	static int __init omap1_init_devices(void)
7c38cf02	408	{
7f9187c2 TL	409	if (!cpu_class_is_omap1())
	410	return -ENODEV;
	411
a66cb345	412	omap_sram_init();
e9b7086b	413	omap1_clk_late_init();
a66cb345	414
7c38cf02 TL	415	/* please keep these calls, and their implementations above,
	416	* in alphabetical order so they're easier to sort through.
	417	*/
c40fae95	418
fcc76a85	419	omap_init_audio();
c40fae95	420	omap_init_mbox();
7c38cf02	421	omap_init_rtc();
c5c4dce4	422	omap_init_spi100k();
9b6553cd	423	omap_init_sti();
49b1a616	424	omap_init_uwire();
4848d460	425	omap1_init_rng();
7c38cf02 TL	426
	427	return 0;
	428	}
3179a019	429	arch_initcall(omap1_init_devices);
7c38cf02	430
f2ce6231 VC	431	#if defined(CONFIG_OMAP_WATCHDOG) \|\| defined(CONFIG_OMAP_WATCHDOG_MODULE)
	432
	433	static struct resource wdt_resources[] = {
	434	{
	435	.start = 0xfffeb000,
	436	.end = 0xfffeb07F,
	437	.flags = IORESOURCE_MEM,
	438	},
	439	};
	440
	441	static struct platform_device omap_wdt_device = {
	442	.name = "omap_wdt",
	443	.id = -1,
	444	.num_resources = ARRAY_SIZE(wdt_resources),
	445	.resource = wdt_resources,
	446	};
	447
	448	static int __init omap_init_wdt(void)
	449	{
	450	if (!cpu_is_omap16xx())
dfcccd3a	451	return -ENODEV;
f2ce6231	452
dfcccd3a	453	return platform_device_register(&omap_wdt_device);
f2ce6231 VC	454	}
	455	subsys_initcall(omap_init_wdt);
	456	#endif