Commit | Line | Data |
---|---|---|
f577ffd7 TL |
1 | /* |
2 | * linux/arch/arm/mach-omap1/io.c | |
3 | * | |
4 | * OMAP1 I/O mapping code | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
f577ffd7 TL |
11 | #include <linux/module.h> |
12 | #include <linux/kernel.h> | |
13 | #include <linux/init.h> | |
14 | ||
53d9cc73 | 15 | #include <asm/tlb.h> |
f577ffd7 TL |
16 | #include <asm/mach/map.h> |
17 | #include <asm/io.h> | |
3179a019 | 18 | #include <asm/arch/mux.h> |
f577ffd7 TL |
19 | #include <asm/arch/tc.h> |
20 | ||
3179a019 | 21 | extern int omap1_clk_init(void); |
f577ffd7 | 22 | extern void omap_check_revision(void); |
7c38cf02 | 23 | extern void omap_sram_init(void); |
b7cc6d46 | 24 | extern void omapfb_reserve_sdram(void); |
f577ffd7 TL |
25 | |
26 | /* | |
27 | * The machine specific code may provide the extra mapping besides the | |
28 | * default mapping provided here. | |
29 | */ | |
30 | static struct map_desc omap_io_desc[] __initdata = { | |
9fe133b1 DS |
31 | { |
32 | .virtual = IO_VIRT, | |
33 | .pfn = __phys_to_pfn(IO_PHYS), | |
34 | .length = IO_SIZE, | |
35 | .type = MT_DEVICE | |
36 | } | |
f577ffd7 TL |
37 | }; |
38 | ||
39 | #ifdef CONFIG_ARCH_OMAP730 | |
40 | static struct map_desc omap730_io_desc[] __initdata = { | |
9fe133b1 DS |
41 | { |
42 | .virtual = OMAP730_DSP_BASE, | |
43 | .pfn = __phys_to_pfn(OMAP730_DSP_START), | |
44 | .length = OMAP730_DSP_SIZE, | |
45 | .type = MT_DEVICE | |
46 | }, { | |
47 | .virtual = OMAP730_DSPREG_BASE, | |
48 | .pfn = __phys_to_pfn(OMAP730_DSPREG_START), | |
49 | .length = OMAP730_DSPREG_SIZE, | |
50 | .type = MT_DEVICE | |
51 | } | |
f577ffd7 TL |
52 | }; |
53 | #endif | |
54 | ||
3179a019 | 55 | #ifdef CONFIG_ARCH_OMAP15XX |
f577ffd7 | 56 | static struct map_desc omap1510_io_desc[] __initdata = { |
9fe133b1 DS |
57 | { |
58 | .virtual = OMAP1510_DSP_BASE, | |
59 | .pfn = __phys_to_pfn(OMAP1510_DSP_START), | |
60 | .length = OMAP1510_DSP_SIZE, | |
61 | .type = MT_DEVICE | |
62 | }, { | |
63 | .virtual = OMAP1510_DSPREG_BASE, | |
64 | .pfn = __phys_to_pfn(OMAP1510_DSPREG_START), | |
65 | .length = OMAP1510_DSPREG_SIZE, | |
66 | .type = MT_DEVICE | |
67 | } | |
f577ffd7 TL |
68 | }; |
69 | #endif | |
70 | ||
71 | #if defined(CONFIG_ARCH_OMAP16XX) | |
7c38cf02 | 72 | static struct map_desc omap16xx_io_desc[] __initdata = { |
9fe133b1 DS |
73 | { |
74 | .virtual = OMAP16XX_DSP_BASE, | |
75 | .pfn = __phys_to_pfn(OMAP16XX_DSP_START), | |
76 | .length = OMAP16XX_DSP_SIZE, | |
77 | .type = MT_DEVICE | |
78 | }, { | |
79 | .virtual = OMAP16XX_DSPREG_BASE, | |
80 | .pfn = __phys_to_pfn(OMAP16XX_DSPREG_START), | |
81 | .length = OMAP16XX_DSPREG_SIZE, | |
82 | .type = MT_DEVICE | |
83 | } | |
f577ffd7 TL |
84 | }; |
85 | #endif | |
86 | ||
53d9cc73 TL |
87 | /* |
88 | * Maps common IO regions for omap1. This should only get called from | |
89 | * board specific init. | |
90 | */ | |
91 | void __init omap1_map_common_io(void) | |
f577ffd7 | 92 | { |
f577ffd7 | 93 | iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc)); |
53d9cc73 TL |
94 | |
95 | /* Normally devicemaps_init() would flush caches and tlb after | |
96 | * mdesc->map_io(), but we must also do it here because of the CPU | |
97 | * revision check below. | |
98 | */ | |
99 | local_flush_tlb_all(); | |
100 | flush_cache_all(); | |
101 | ||
102 | /* We want to check CPU revision early for cpu_is_omapxxxx() macros. | |
103 | * IO space mapping must be initialized before we can do that. | |
104 | */ | |
f577ffd7 TL |
105 | omap_check_revision(); |
106 | ||
107 | #ifdef CONFIG_ARCH_OMAP730 | |
108 | if (cpu_is_omap730()) { | |
109 | iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc)); | |
110 | } | |
111 | #endif | |
3179a019 | 112 | #ifdef CONFIG_ARCH_OMAP15XX |
120db2cb | 113 | if (cpu_is_omap15xx()) { |
f577ffd7 TL |
114 | iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); |
115 | } | |
116 | #endif | |
117 | #if defined(CONFIG_ARCH_OMAP16XX) | |
7c38cf02 TL |
118 | if (cpu_is_omap16xx()) { |
119 | iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc)); | |
f577ffd7 TL |
120 | } |
121 | #endif | |
122 | ||
7c38cf02 | 123 | omap_sram_init(); |
b7cc6d46 | 124 | omapfb_reserve_sdram(); |
53d9cc73 | 125 | } |
7c38cf02 | 126 | |
53d9cc73 TL |
127 | /* |
128 | * Common low-level hardware init for omap1. This should only get called from | |
129 | * board specific init. | |
130 | */ | |
131 | void __init omap1_init_common_hw() | |
132 | { | |
f577ffd7 TL |
133 | /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort |
134 | * on a Posted Write in the TIPB Bridge". | |
135 | */ | |
136 | omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL); | |
137 | omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL); | |
138 | ||
139 | /* Must init clocks early to assure that timer interrupt works | |
140 | */ | |
3179a019 | 141 | omap1_clk_init(); |
f577ffd7 | 142 | |
53d9cc73 | 143 | omap1_mux_init(); |
f577ffd7 | 144 | } |
7c38cf02 | 145 |