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f577ffd7 TL |
1 | /* |
2 | * linux/arch/arm/mach-omap1/io.c | |
3 | * | |
4 | * OMAP1 I/O mapping code | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
f577ffd7 TL |
11 | #include <linux/module.h> |
12 | #include <linux/kernel.h> | |
13 | #include <linux/init.h> | |
fced80c7 | 14 | #include <linux/io.h> |
f577ffd7 | 15 | |
53d9cc73 | 16 | #include <asm/tlb.h> |
f577ffd7 | 17 | #include <asm/mach/map.h> |
ce491cf8 TL |
18 | #include <plat/mux.h> |
19 | #include <plat/tc.h> | |
f577ffd7 | 20 | |
52650505 PW |
21 | #include "clock.h" |
22 | ||
f577ffd7 | 23 | extern void omap_check_revision(void); |
7c38cf02 | 24 | extern void omap_sram_init(void); |
f577ffd7 TL |
25 | |
26 | /* | |
27 | * The machine specific code may provide the extra mapping besides the | |
28 | * default mapping provided here. | |
29 | */ | |
30 | static struct map_desc omap_io_desc[] __initdata = { | |
9fe133b1 | 31 | { |
db326be1 TL |
32 | .virtual = OMAP1_IO_VIRT, |
33 | .pfn = __phys_to_pfn(OMAP1_IO_PHYS), | |
34 | .length = OMAP1_IO_SIZE, | |
9fe133b1 DS |
35 | .type = MT_DEVICE |
36 | } | |
f577ffd7 TL |
37 | }; |
38 | ||
ab49df73 | 39 | #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) |
7c006926 | 40 | static struct map_desc omap7xx_io_desc[] __initdata = { |
9fe133b1 | 41 | { |
b51988db AB |
42 | .virtual = OMAP7XX_DSP_BASE, |
43 | .pfn = __phys_to_pfn(OMAP7XX_DSP_START), | |
44 | .length = OMAP7XX_DSP_SIZE, | |
9fe133b1 DS |
45 | .type = MT_DEVICE |
46 | }, { | |
b51988db AB |
47 | .virtual = OMAP7XX_DSPREG_BASE, |
48 | .pfn = __phys_to_pfn(OMAP7XX_DSPREG_START), | |
49 | .length = OMAP7XX_DSPREG_SIZE, | |
9fe133b1 DS |
50 | .type = MT_DEVICE |
51 | } | |
f577ffd7 TL |
52 | }; |
53 | #endif | |
54 | ||
3179a019 | 55 | #ifdef CONFIG_ARCH_OMAP15XX |
f577ffd7 | 56 | static struct map_desc omap1510_io_desc[] __initdata = { |
9fe133b1 DS |
57 | { |
58 | .virtual = OMAP1510_DSP_BASE, | |
59 | .pfn = __phys_to_pfn(OMAP1510_DSP_START), | |
60 | .length = OMAP1510_DSP_SIZE, | |
61 | .type = MT_DEVICE | |
62 | }, { | |
63 | .virtual = OMAP1510_DSPREG_BASE, | |
64 | .pfn = __phys_to_pfn(OMAP1510_DSPREG_START), | |
65 | .length = OMAP1510_DSPREG_SIZE, | |
66 | .type = MT_DEVICE | |
67 | } | |
f577ffd7 TL |
68 | }; |
69 | #endif | |
70 | ||
71 | #if defined(CONFIG_ARCH_OMAP16XX) | |
7c38cf02 | 72 | static struct map_desc omap16xx_io_desc[] __initdata = { |
9fe133b1 DS |
73 | { |
74 | .virtual = OMAP16XX_DSP_BASE, | |
75 | .pfn = __phys_to_pfn(OMAP16XX_DSP_START), | |
76 | .length = OMAP16XX_DSP_SIZE, | |
77 | .type = MT_DEVICE | |
78 | }, { | |
79 | .virtual = OMAP16XX_DSPREG_BASE, | |
80 | .pfn = __phys_to_pfn(OMAP16XX_DSPREG_START), | |
81 | .length = OMAP16XX_DSPREG_SIZE, | |
82 | .type = MT_DEVICE | |
83 | } | |
f577ffd7 TL |
84 | }; |
85 | #endif | |
86 | ||
53d9cc73 TL |
87 | /* |
88 | * Maps common IO regions for omap1. This should only get called from | |
89 | * board specific init. | |
90 | */ | |
91 | void __init omap1_map_common_io(void) | |
f577ffd7 | 92 | { |
f577ffd7 | 93 | iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc)); |
53d9cc73 TL |
94 | |
95 | /* Normally devicemaps_init() would flush caches and tlb after | |
96 | * mdesc->map_io(), but we must also do it here because of the CPU | |
97 | * revision check below. | |
98 | */ | |
99 | local_flush_tlb_all(); | |
100 | flush_cache_all(); | |
101 | ||
102 | /* We want to check CPU revision early for cpu_is_omapxxxx() macros. | |
103 | * IO space mapping must be initialized before we can do that. | |
104 | */ | |
f577ffd7 TL |
105 | omap_check_revision(); |
106 | ||
ab49df73 AB |
107 | #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850) |
108 | if (cpu_is_omap7xx()) { | |
7c006926 | 109 | iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc)); |
f577ffd7 TL |
110 | } |
111 | #endif | |
3179a019 | 112 | #ifdef CONFIG_ARCH_OMAP15XX |
120db2cb | 113 | if (cpu_is_omap15xx()) { |
f577ffd7 TL |
114 | iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); |
115 | } | |
116 | #endif | |
117 | #if defined(CONFIG_ARCH_OMAP16XX) | |
7c38cf02 TL |
118 | if (cpu_is_omap16xx()) { |
119 | iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc)); | |
f577ffd7 TL |
120 | } |
121 | #endif | |
122 | ||
7c38cf02 | 123 | omap_sram_init(); |
53d9cc73 | 124 | } |
7c38cf02 | 125 | |
53d9cc73 TL |
126 | /* |
127 | * Common low-level hardware init for omap1. This should only get called from | |
128 | * board specific init. | |
129 | */ | |
020f9706 | 130 | void __init omap1_init_common_hw(void) |
53d9cc73 | 131 | { |
f577ffd7 TL |
132 | /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort |
133 | * on a Posted Write in the TIPB Bridge". | |
134 | */ | |
135 | omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL); | |
136 | omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL); | |
137 | ||
138 | /* Must init clocks early to assure that timer interrupt works | |
139 | */ | |
3179a019 | 140 | omap1_clk_init(); |
f577ffd7 | 141 | |
53d9cc73 | 142 | omap1_mux_init(); |
f577ffd7 | 143 | } |
7c38cf02 | 144 | |
df1e9d1c TL |
145 | /* |
146 | * NOTE: Please use ioremap + __raw_read/write where possible instead of these | |
147 | */ | |
148 | ||
149 | u8 omap_readb(u32 pa) | |
150 | { | |
151 | return __raw_readb(OMAP1_IO_ADDRESS(pa)); | |
152 | } | |
153 | EXPORT_SYMBOL(omap_readb); | |
154 | ||
155 | u16 omap_readw(u32 pa) | |
156 | { | |
157 | return __raw_readw(OMAP1_IO_ADDRESS(pa)); | |
158 | } | |
159 | EXPORT_SYMBOL(omap_readw); | |
160 | ||
161 | u32 omap_readl(u32 pa) | |
162 | { | |
163 | return __raw_readl(OMAP1_IO_ADDRESS(pa)); | |
164 | } | |
165 | EXPORT_SYMBOL(omap_readl); | |
166 | ||
167 | void omap_writeb(u8 v, u32 pa) | |
168 | { | |
169 | __raw_writeb(v, OMAP1_IO_ADDRESS(pa)); | |
170 | } | |
171 | EXPORT_SYMBOL(omap_writeb); | |
172 | ||
173 | void omap_writew(u16 v, u32 pa) | |
174 | { | |
175 | __raw_writew(v, OMAP1_IO_ADDRESS(pa)); | |
176 | } | |
177 | EXPORT_SYMBOL(omap_writew); | |
178 | ||
179 | void omap_writel(u32 v, u32 pa) | |
180 | { | |
181 | __raw_writel(v, OMAP1_IO_ADDRESS(pa)); | |
182 | } | |
183 | EXPORT_SYMBOL(omap_writel); |