[deliverable/linux.git] / arch / arm / mach-omap1 / lcd_dma.c

/*
 * linux/arch/arm/mach-omap1/lcd_dma.c
 *
 * Extracted from arch/arm/plat-omap/dma.c
 * Copyright (C) 2003 - 2008 Nokia Corporation
 * Author: Juha Yrjölä <juha.yrjola@nokia.com>
 * DMA channel linking for 1610 by Samuel Ortiz <samuel.ortiz@nokia.com>
 * Graphics DMA and LCD DMA graphics tranformations
 * by Imre Deak <imre.deak@nokia.com>
 * OMAP2/3 support Copyright (C) 2004-2007 Texas Instruments, Inc.
 * Merged to support both OMAP1 and OMAP2 by Tony Lindgren <tony@atomide.com>
 * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
 *
 * Copyright (C) 2009 Texas Instruments
 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
 *
 * Support functions for the OMAP internal DMA channels.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 */

#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/io.h>

#include <plat/dma.h>

#include <mach/hardware.h>
#include <mach/lcdc.h>

int omap_lcd_dma_running(void)
{
	/*
	 * On OMAP1510, internal LCD controller will start the transfer
	 * when it gets enabled, so assume DMA running if LCD enabled.
	 */
	if (cpu_is_omap15xx())
		if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN)
			return 1;

	/* Check if LCD DMA is running */
	if (cpu_is_omap16xx())
		if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)
			return 1;

	return 0;
}

static struct lcd_dma_info {
	spinlock_t lock;
	int reserved;
	void (*callback)(u16 status, void *data);
	void *cb_data;

	int active;
	unsigned long addr, size;
	int rotate, data_type, xres, yres;
	int vxres;
	int mirror;
	int xscale, yscale;
	int ext_ctrl;
	int src_port;
	int single_transfer;
} lcd_dma;

void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres,
			 int data_type)
{
	lcd_dma.addr = addr;
	lcd_dma.data_type = data_type;
	lcd_dma.xres = fb_xres;
	lcd_dma.yres = fb_yres;
}
EXPORT_SYMBOL(omap_set_lcd_dma_b1);

void omap_set_lcd_dma_src_port(int port)
{
	lcd_dma.src_port = port;
}

void omap_set_lcd_dma_ext_controller(int external)
{
	lcd_dma.ext_ctrl = external;
}
EXPORT_SYMBOL(omap_set_lcd_dma_ext_controller);

void omap_set_lcd_dma_single_transfer(int single)
{
	lcd_dma.single_transfer = single;
}
EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer);

void omap_set_lcd_dma_b1_rotation(int rotate)
{
	if (cpu_is_omap15xx()) {
		printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n");
		BUG();
		return;
	}
	lcd_dma.rotate = rotate;
}
EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation);

void omap_set_lcd_dma_b1_mirror(int mirror)
{
	if (cpu_is_omap15xx()) {
		printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n");
		BUG();
	}
	lcd_dma.mirror = mirror;
}
EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);

void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
{
	if (cpu_is_omap15xx()) {
		printk(KERN_ERR "DMA virtual resolution is not supported "
				"in 1510 mode\n");
		BUG();
	}
	lcd_dma.vxres = vxres;
}
EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres);

void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale)
{
	if (cpu_is_omap15xx()) {
		printk(KERN_ERR "DMA scale is not supported in 1510 mode\n");
		BUG();
	}
	lcd_dma.xscale = xscale;
	lcd_dma.yscale = yscale;
}
EXPORT_SYMBOL(omap_set_lcd_dma_b1_scale);

static void set_b1_regs(void)
{
	unsigned long top, bottom;
	int es;
	u16 w;
	unsigned long en, fn;
	long ei, fi;
	unsigned long vxres;
	unsigned int xscale, yscale;

	switch (lcd_dma.data_type) {
	case OMAP_DMA_DATA_TYPE_S8:
		es = 1;
		break;
	case OMAP_DMA_DATA_TYPE_S16:
		es = 2;
		break;
	case OMAP_DMA_DATA_TYPE_S32:
		es = 4;
		break;
	default:
		BUG();
		return;
	}

	vxres = lcd_dma.vxres ? lcd_dma.vxres : lcd_dma.xres;
	xscale = lcd_dma.xscale ? lcd_dma.xscale : 1;
	yscale = lcd_dma.yscale ? lcd_dma.yscale : 1;
	BUG_ON(vxres < lcd_dma.xres);

#define PIXADDR(x, y) (lcd_dma.addr +					\
		((y) * vxres * yscale + (x) * xscale) * es)
#define PIXSTEP(sx, sy, dx, dy) (PIXADDR(dx, dy) - PIXADDR(sx, sy) - es + 1)

	switch (lcd_dma.rotate) {
	case 0:
		if (!lcd_dma.mirror) {
			top = PIXADDR(0, 0);
			bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
			/* 1510 DMA requires the bottom address to be 2 more
			 * than the actual last memory access location. */
			if (cpu_is_omap15xx() &&
				lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32)
					bottom += 2;
			ei = PIXSTEP(0, 0, 1, 0);
			fi = PIXSTEP(lcd_dma.xres - 1, 0, 0, 1);
		} else {
			top = PIXADDR(lcd_dma.xres - 1, 0);
			bottom = PIXADDR(0, lcd_dma.yres - 1);
			ei = PIXSTEP(1, 0, 0, 0);
			fi = PIXSTEP(0, 0, lcd_dma.xres - 1, 1);
		}
		en = lcd_dma.xres;
		fn = lcd_dma.yres;
		break;
	case 90:
		if (!lcd_dma.mirror) {
			top = PIXADDR(0, lcd_dma.yres - 1);
			bottom = PIXADDR(lcd_dma.xres - 1, 0);
			ei = PIXSTEP(0, 1, 0, 0);
			fi = PIXSTEP(0, 0, 1, lcd_dma.yres - 1);
		} else {
			top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
			bottom = PIXADDR(0, 0);
			ei = PIXSTEP(0, 1, 0, 0);
			fi = PIXSTEP(1, 0, 0, lcd_dma.yres - 1);
		}
		en = lcd_dma.yres;
		fn = lcd_dma.xres;
		break;
	case 180:
		if (!lcd_dma.mirror) {
			top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
			bottom = PIXADDR(0, 0);
			ei = PIXSTEP(1, 0, 0, 0);
			fi = PIXSTEP(0, 1, lcd_dma.xres - 1, 0);
		} else {
			top = PIXADDR(0, lcd_dma.yres - 1);
			bottom = PIXADDR(lcd_dma.xres - 1, 0);
			ei = PIXSTEP(0, 0, 1, 0);
			fi = PIXSTEP(lcd_dma.xres - 1, 1, 0, 0);
		}
		en = lcd_dma.xres;
		fn = lcd_dma.yres;
		break;
	case 270:
		if (!lcd_dma.mirror) {
			top = PIXADDR(lcd_dma.xres - 1, 0);
			bottom = PIXADDR(0, lcd_dma.yres - 1);
			ei = PIXSTEP(0, 0, 0, 1);
			fi = PIXSTEP(1, lcd_dma.yres - 1, 0, 0);
		} else {
			top = PIXADDR(0, 0);
			bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
			ei = PIXSTEP(0, 0, 0, 1);
			fi = PIXSTEP(0, lcd_dma.yres - 1, 1, 0);
		}
		en = lcd_dma.yres;
		fn = lcd_dma.xres;
		break;
	default:
		BUG();
		return;	/* Suppress warning about uninitialized vars */
	}

	if (cpu_is_omap15xx()) {
		omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U);
		omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L);
		omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U);
		omap_writew(bottom, OMAP1510_DMA_LCD_BOT_F1_L);

		return;
	}

	/* 1610 regs */
	omap_writew(top >> 16, OMAP1610_DMA_LCD_TOP_B1_U);
	omap_writew(top, OMAP1610_DMA_LCD_TOP_B1_L);
	omap_writew(bottom >> 16, OMAP1610_DMA_LCD_BOT_B1_U);
	omap_writew(bottom, OMAP1610_DMA_LCD_BOT_B1_L);

	omap_writew(en, OMAP1610_DMA_LCD_SRC_EN_B1);
	omap_writew(fn, OMAP1610_DMA_LCD_SRC_FN_B1);

	w = omap_readw(OMAP1610_DMA_LCD_CSDP);
	w &= ~0x03;
	w |= lcd_dma.data_type;
	omap_writew(w, OMAP1610_DMA_LCD_CSDP);

	w = omap_readw(OMAP1610_DMA_LCD_CTRL);
	/* Always set the source port as SDRAM for now*/
	w &= ~(0x03 << 6);
	if (lcd_dma.callback != NULL)
		w |= 1 << 1;		/* Block interrupt enable */
	else
		w &= ~(1 << 1);
	omap_writew(w, OMAP1610_DMA_LCD_CTRL);

	if (!(lcd_dma.rotate || lcd_dma.mirror ||
	      lcd_dma.vxres || lcd_dma.xscale || lcd_dma.yscale))
		return;

	w = omap_readw(OMAP1610_DMA_LCD_CCR);
	/* Set the double-indexed addressing mode */
	w |= (0x03 << 12);
	omap_writew(w, OMAP1610_DMA_LCD_CCR);

	omap_writew(ei, OMAP1610_DMA_LCD_SRC_EI_B1);
	omap_writew(fi >> 16, OMAP1610_DMA_LCD_SRC_FI_B1_U);
	omap_writew(fi, OMAP1610_DMA_LCD_SRC_FI_B1_L);
}

static irqreturn_t lcd_dma_irq_handler(int irq, void *dev_id)
{
	u16 w;

	w = omap_readw(OMAP1610_DMA_LCD_CTRL);
	if (unlikely(!(w & (1 << 3)))) {
		printk(KERN_WARNING "Spurious LCD DMA IRQ\n");
		return IRQ_NONE;
	}
	/* Ack the IRQ */
	w |= (1 << 3);
	omap_writew(w, OMAP1610_DMA_LCD_CTRL);
	lcd_dma.active = 0;
	if (lcd_dma.callback != NULL)
		lcd_dma.callback(w, lcd_dma.cb_data);

	return IRQ_HANDLED;
}

int omap_request_lcd_dma(void (*callback)(u16 status, void *data),
			 void *data)
{
	spin_lock_irq(&lcd_dma.lock);
	if (lcd_dma.reserved) {
		spin_unlock_irq(&lcd_dma.lock);
		printk(KERN_ERR "LCD DMA channel already reserved\n");
		BUG();
		return -EBUSY;
	}
	lcd_dma.reserved = 1;
	spin_unlock_irq(&lcd_dma.lock);
	lcd_dma.callback = callback;
	lcd_dma.cb_data = data;
	lcd_dma.active = 0;
	lcd_dma.single_transfer = 0;
	lcd_dma.rotate = 0;
	lcd_dma.vxres = 0;
	lcd_dma.mirror = 0;
	lcd_dma.xscale = 0;
	lcd_dma.yscale = 0;
	lcd_dma.ext_ctrl = 0;
	lcd_dma.src_port = 0;

	return 0;
}
EXPORT_SYMBOL(omap_request_lcd_dma);

void omap_free_lcd_dma(void)
{
	spin_lock(&lcd_dma.lock);
	if (!lcd_dma.reserved) {
		spin_unlock(&lcd_dma.lock);
		printk(KERN_ERR "LCD DMA is not reserved\n");
		BUG();
		return;
	}
	if (!cpu_is_omap15xx())
		omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1,
			    OMAP1610_DMA_LCD_CCR);
	lcd_dma.reserved = 0;
	spin_unlock(&lcd_dma.lock);
}
EXPORT_SYMBOL(omap_free_lcd_dma);

void omap_enable_lcd_dma(void)
{
	u16 w;

	/*
	 * Set the Enable bit only if an external controller is
	 * connected. Otherwise the OMAP internal controller will
	 * start the transfer when it gets enabled.
	 */
	if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
		return;

	w = omap_readw(OMAP1610_DMA_LCD_CTRL);
	w |= 1 << 8;
	omap_writew(w, OMAP1610_DMA_LCD_CTRL);

	lcd_dma.active = 1;

	w = omap_readw(OMAP1610_DMA_LCD_CCR);
	w |= 1 << 7;
	omap_writew(w, OMAP1610_DMA_LCD_CCR);
}
EXPORT_SYMBOL(omap_enable_lcd_dma);

void omap_setup_lcd_dma(void)
{
	BUG_ON(lcd_dma.active);
	if (!cpu_is_omap15xx()) {
		/* Set some reasonable defaults */
		omap_writew(0x5440, OMAP1610_DMA_LCD_CCR);
		omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP);
		omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL);
	}
	set_b1_regs();
	if (!cpu_is_omap15xx()) {
		u16 w;

		w = omap_readw(OMAP1610_DMA_LCD_CCR);
		/*
		 * If DMA was already active set the end_prog bit to have
		 * the programmed register set loaded into the active
		 * register set.
		 */
		w |= 1 << 11;		/* End_prog */
		if (!lcd_dma.single_transfer)
			w |= (3 << 8);	/* Auto_init, repeat */
		omap_writew(w, OMAP1610_DMA_LCD_CCR);
	}
}
EXPORT_SYMBOL(omap_setup_lcd_dma);

void omap_stop_lcd_dma(void)
{
	u16 w;

	lcd_dma.active = 0;
	if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
		return;

	w = omap_readw(OMAP1610_DMA_LCD_CCR);
	w &= ~(1 << 7);
	omap_writew(w, OMAP1610_DMA_LCD_CCR);

	w = omap_readw(OMAP1610_DMA_LCD_CTRL);
	w &= ~(1 << 8);
	omap_writew(w, OMAP1610_DMA_LCD_CTRL);
}
EXPORT_SYMBOL(omap_stop_lcd_dma);

static int __init omap_init_lcd_dma(void)
{
	int r;

	if (!cpu_class_is_omap1())
		return -ENODEV;

	if (cpu_is_omap16xx()) {
		u16 w;

		/* this would prevent OMAP sleep */
		w = omap_readw(OMAP1610_DMA_LCD_CTRL);
		w &= ~(1 << 8);
		omap_writew(w, OMAP1610_DMA_LCD_CTRL);
	}

	spin_lock_init(&lcd_dma.lock);

	r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0,
			"LCD DMA", NULL);
	if (r != 0)
		printk(KERN_ERR "unable to request IRQ for LCD DMA "
			       "(error %d)\n", r);

	return r;
}

arch_initcall(omap_init_lcd_dma);
Commit	Line	Data
f8e9e984 JK	1	/*
	2	* linux/arch/arm/mach-omap1/lcd_dma.c
	3	*
	4	* Extracted from arch/arm/plat-omap/dma.c
	5	* Copyright (C) 2003 - 2008 Nokia Corporation
	6	* Author: Juha Yrjölä <juha.yrjola@nokia.com>
	7	* DMA channel linking for 1610 by Samuel Ortiz <samuel.ortiz@nokia.com>
	8	* Graphics DMA and LCD DMA graphics tranformations
	9	* by Imre Deak <imre.deak@nokia.com>
	10	* OMAP2/3 support Copyright (C) 2004-2007 Texas Instruments, Inc.
	11	* Merged to support both OMAP1 and OMAP2 by Tony Lindgren <tony@atomide.com>
	12	* Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
	13	*
	14	* Copyright (C) 2009 Texas Instruments
	15	* Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
	16	*
	17	* Support functions for the OMAP internal DMA channels.
	18	*
	19	* This program is free software; you can redistribute it and/or modify
	20	* it under the terms of the GNU General Public License version 2 as
	21	* published by the Free Software Foundation.
	22	*
	23	*/
	24
	25	#include <linux/module.h>
	26	#include <linux/spinlock.h>
	27	#include <linux/interrupt.h>
	28	#include <linux/io.h>
	29
2e3ee9f4 TL	30	#include <plat/dma.h>
2e3ee9f4 TL	31
f8e9e984	32	#include <mach/hardware.h>
8d72c796	33	#include <mach/lcdc.h>
f8e9e984 JK	34
	35	int omap_lcd_dma_running(void)
	36	{
	37	/*
	38	* On OMAP1510, internal LCD controller will start the transfer
	39	* when it gets enabled, so assume DMA running if LCD enabled.
	40	*/
719078a6	41	if (cpu_is_omap15xx())
8d72c796	42	if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN)
f8e9e984 JK	43	return 1;
	44
	45	/* Check if LCD DMA is running */
	46	if (cpu_is_omap16xx())
	47	if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)
	48	return 1;
	49
	50	return 0;
	51	}
	52
	53	static struct lcd_dma_info {
	54	spinlock_t lock;
	55	int reserved;
	56	void (callback)(u16 status, void data);
	57	void *cb_data;
	58
	59	int active;
	60	unsigned long addr, size;
	61	int rotate, data_type, xres, yres;
	62	int vxres;
	63	int mirror;
	64	int xscale, yscale;
	65	int ext_ctrl;
	66	int src_port;
	67	int single_transfer;
	68	} lcd_dma;
	69
	70	void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres,
	71	int data_type)
	72	{
	73	lcd_dma.addr = addr;
	74	lcd_dma.data_type = data_type;
	75	lcd_dma.xres = fb_xres;
	76	lcd_dma.yres = fb_yres;
	77	}
	78	EXPORT_SYMBOL(omap_set_lcd_dma_b1);
	79
	80	void omap_set_lcd_dma_src_port(int port)
	81	{
	82	lcd_dma.src_port = port;
	83	}
	84
	85	void omap_set_lcd_dma_ext_controller(int external)
	86	{
	87	lcd_dma.ext_ctrl = external;
	88	}
	89	EXPORT_SYMBOL(omap_set_lcd_dma_ext_controller);
	90
	91	void omap_set_lcd_dma_single_transfer(int single)
	92	{
	93	lcd_dma.single_transfer = single;
	94	}
	95	EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer);
	96
	97	void omap_set_lcd_dma_b1_rotation(int rotate)
	98	{
719078a6	99	if (cpu_is_omap15xx()) {
f8e9e984 JK	100	printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n");
	101	BUG();
	102	return;
	103	}
	104	lcd_dma.rotate = rotate;
	105	}
	106	EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation);
	107
	108	void omap_set_lcd_dma_b1_mirror(int mirror)
	109	{
719078a6	110	if (cpu_is_omap15xx()) {
f8e9e984 JK	111	printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n");
	112	BUG();
	113	}
	114	lcd_dma.mirror = mirror;
	115	}
	116	EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);
	117
	118	void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
	119	{
719078a6	120	if (cpu_is_omap15xx()) {
6bd1d586	121	printk(KERN_ERR "DMA virtual resolution is not supported "
f8e9e984 JK	122	"in 1510 mode\n");
	123	BUG();
	124	}
	125	lcd_dma.vxres = vxres;
	126	}
	127	EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres);
	128
	129	void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale)
	130	{
719078a6	131	if (cpu_is_omap15xx()) {
f8e9e984 JK	132	printk(KERN_ERR "DMA scale is not supported in 1510 mode\n");
	133	BUG();
	134	}
	135	lcd_dma.xscale = xscale;
	136	lcd_dma.yscale = yscale;
	137	}
	138	EXPORT_SYMBOL(omap_set_lcd_dma_b1_scale);
	139
	140	static void set_b1_regs(void)
	141	{
	142	unsigned long top, bottom;
	143	int es;
	144	u16 w;
	145	unsigned long en, fn;
	146	long ei, fi;
	147	unsigned long vxres;
	148	unsigned int xscale, yscale;
	149
	150	switch (lcd_dma.data_type) {
	151	case OMAP_DMA_DATA_TYPE_S8:
	152	es = 1;
	153	break;
	154	case OMAP_DMA_DATA_TYPE_S16:
	155	es = 2;
	156	break;
	157	case OMAP_DMA_DATA_TYPE_S32:
	158	es = 4;
	159	break;
	160	default:
	161	BUG();
	162	return;
	163	}
	164
	165	vxres = lcd_dma.vxres ? lcd_dma.vxres : lcd_dma.xres;
	166	xscale = lcd_dma.xscale ? lcd_dma.xscale : 1;
	167	yscale = lcd_dma.yscale ? lcd_dma.yscale : 1;
	168	BUG_ON(vxres < lcd_dma.xres);
	169
	170	#define PIXADDR(x, y) (lcd_dma.addr + \
	171	((y) * vxres * yscale + (x) * xscale) * es)
	172	#define PIXSTEP(sx, sy, dx, dy) (PIXADDR(dx, dy) - PIXADDR(sx, sy) - es + 1)
	173
	174	switch (lcd_dma.rotate) {
	175	case 0:
	176	if (!lcd_dma.mirror) {
	177	top = PIXADDR(0, 0);
	178	bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
	179	/* 1510 DMA requires the bottom address to be 2 more
	180	* than the actual last memory access location. */
719078a6	181	if (cpu_is_omap15xx() &&
f8e9e984 JK	182	lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32)
	183	bottom += 2;
	184	ei = PIXSTEP(0, 0, 1, 0);
	185	fi = PIXSTEP(lcd_dma.xres - 1, 0, 0, 1);
	186	} else {
	187	top = PIXADDR(lcd_dma.xres - 1, 0);
	188	bottom = PIXADDR(0, lcd_dma.yres - 1);
	189	ei = PIXSTEP(1, 0, 0, 0);
	190	fi = PIXSTEP(0, 0, lcd_dma.xres - 1, 1);
	191	}
	192	en = lcd_dma.xres;
	193	fn = lcd_dma.yres;
	194	break;
	195	case 90:
	196	if (!lcd_dma.mirror) {
	197	top = PIXADDR(0, lcd_dma.yres - 1);
	198	bottom = PIXADDR(lcd_dma.xres - 1, 0);
	199	ei = PIXSTEP(0, 1, 0, 0);
	200	fi = PIXSTEP(0, 0, 1, lcd_dma.yres - 1);
	201	} else {
	202	top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
	203	bottom = PIXADDR(0, 0);
	204	ei = PIXSTEP(0, 1, 0, 0);
	205	fi = PIXSTEP(1, 0, 0, lcd_dma.yres - 1);
	206	}
	207	en = lcd_dma.yres;
	208	fn = lcd_dma.xres;
	209	break;
	210	case 180:
	211	if (!lcd_dma.mirror) {
	212	top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
	213	bottom = PIXADDR(0, 0);
	214	ei = PIXSTEP(1, 0, 0, 0);
	215	fi = PIXSTEP(0, 1, lcd_dma.xres - 1, 0);
	216	} else {
	217	top = PIXADDR(0, lcd_dma.yres - 1);
	218	bottom = PIXADDR(lcd_dma.xres - 1, 0);
	219	ei = PIXSTEP(0, 0, 1, 0);
	220	fi = PIXSTEP(lcd_dma.xres - 1, 1, 0, 0);
	221	}
	222	en = lcd_dma.xres;
	223	fn = lcd_dma.yres;
	224	break;
	225	case 270:
	226	if (!lcd_dma.mirror) {
	227	top = PIXADDR(lcd_dma.xres - 1, 0);
	228	bottom = PIXADDR(0, lcd_dma.yres - 1);
	229	ei = PIXSTEP(0, 0, 0, 1);
	230	fi = PIXSTEP(1, lcd_dma.yres - 1, 0, 0);
	231	} else {
	232	top = PIXADDR(0, 0);
	233	bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
	234	ei = PIXSTEP(0, 0, 0, 1);
	235	fi = PIXSTEP(0, lcd_dma.yres - 1, 1, 0);
	236	}
	237	en = lcd_dma.yres;
	238	fn = lcd_dma.xres;
	239	break;
	240	default:
	241	BUG();
	242	return; /* Suppress warning about uninitialized vars */
	243	}
	244
719078a6	245	if (cpu_is_omap15xx()) {
f8e9e984 JK	246	omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U);
	247	omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L);
	248	omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U);
	249	omap_writew(bottom, OMAP1510_DMA_LCD_BOT_F1_L);
	250
	251	return;
	252	}
	253
	254	/* 1610 regs */
	255	omap_writew(top >> 16, OMAP1610_DMA_LCD_TOP_B1_U);
	256	omap_writew(top, OMAP1610_DMA_LCD_TOP_B1_L);
	257	omap_writew(bottom >> 16, OMAP1610_DMA_LCD_BOT_B1_U);
	258	omap_writew(bottom, OMAP1610_DMA_LCD_BOT_B1_L);
	259
	260	omap_writew(en, OMAP1610_DMA_LCD_SRC_EN_B1);
	261	omap_writew(fn, OMAP1610_DMA_LCD_SRC_FN_B1);
	262
	263	w = omap_readw(OMAP1610_DMA_LCD_CSDP);
	264	w &= ~0x03;
	265	w \|= lcd_dma.data_type;
	266	omap_writew(w, OMAP1610_DMA_LCD_CSDP);
	267
	268	w = omap_readw(OMAP1610_DMA_LCD_CTRL);
	269	/* Always set the source port as SDRAM for now*/
	270	w &= ~(0x03 << 6);
	271	if (lcd_dma.callback != NULL)
	272	w \|= 1 << 1; /* Block interrupt enable */
	273	else
	274	w &= ~(1 << 1);
	275	omap_writew(w, OMAP1610_DMA_LCD_CTRL);
	276
	277	if (!(lcd_dma.rotate \|\| lcd_dma.mirror \|\|
	278	lcd_dma.vxres \|\| lcd_dma.xscale \|\| lcd_dma.yscale))
	279	return;
	280
	281	w = omap_readw(OMAP1610_DMA_LCD_CCR);
	282	/* Set the double-indexed addressing mode */
	283	w \|= (0x03 << 12);
	284	omap_writew(w, OMAP1610_DMA_LCD_CCR);
	285
	286	omap_writew(ei, OMAP1610_DMA_LCD_SRC_EI_B1);
	287	omap_writew(fi >> 16, OMAP1610_DMA_LCD_SRC_FI_B1_U);
	288	omap_writew(fi, OMAP1610_DMA_LCD_SRC_FI_B1_L);
	289	}
	290
	291	static irqreturn_t lcd_dma_irq_handler(int irq, void *dev_id)
	292	{
	293	u16 w;
	294
	295	w = omap_readw(OMAP1610_DMA_LCD_CTRL);
	296	if (unlikely(!(w & (1 << 3)))) {
	297	printk(KERN_WARNING "Spurious LCD DMA IRQ\n");
	298	return IRQ_NONE;
	299	}
	300	/* Ack the IRQ */
	301	w \|= (1 << 3);
	302	omap_writew(w, OMAP1610_DMA_LCD_CTRL);
	303	lcd_dma.active = 0;
	304	if (lcd_dma.callback != NULL)
	305	lcd_dma.callback(w, lcd_dma.cb_data);
	306
	307	return IRQ_HANDLED;
	308	}
	309
310	int omap_request_lcd_dma(void (callback)(u16 status, void data),
311	void *data)
312	{
313	spin_lock_irq(&lcd_dma.lock);
314	if (lcd_dma.reserved) {
315	spin_unlock_irq(&lcd_dma.lock);
316	printk(KERN_ERR "LCD DMA channel already reserved\n");
317	BUG();
318	return -EBUSY;
319	}
320	lcd_dma.reserved = 1;
321	spin_unlock_irq(&lcd_dma.lock);
322	lcd_dma.callback = callback;
323	lcd_dma.cb_data = data;
324	lcd_dma.active = 0;
325	lcd_dma.single_transfer = 0;
326	lcd_dma.rotate = 0;
327	lcd_dma.vxres = 0;
328	lcd_dma.mirror = 0;
329	lcd_dma.xscale = 0;
330	lcd_dma.yscale = 0;
331	lcd_dma.ext_ctrl = 0;
332	lcd_dma.src_port = 0;
333
334	return 0;
335	}
336	EXPORT_SYMBOL(omap_request_lcd_dma);
337
338	void omap_free_lcd_dma(void)
339	{
340	spin_lock(&lcd_dma.lock);
341	if (!lcd_dma.reserved) {
342	spin_unlock(&lcd_dma.lock);
343	printk(KERN_ERR "LCD DMA is not reserved\n");
344	BUG();
345	return;
346	}
719078a6	347	if (!cpu_is_omap15xx())
f8e9e984 JK	348	omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1,
	349	OMAP1610_DMA_LCD_CCR);
	350	lcd_dma.reserved = 0;
	351	spin_unlock(&lcd_dma.lock);
	352	}
	353	EXPORT_SYMBOL(omap_free_lcd_dma);
	354
	355	void omap_enable_lcd_dma(void)
	356	{
	357	u16 w;
	358
	359	/*
	360	* Set the Enable bit only if an external controller is
	361	* connected. Otherwise the OMAP internal controller will
	362	* start the transfer when it gets enabled.
	363	*/
719078a6	364	if (cpu_is_omap15xx() \|\| !lcd_dma.ext_ctrl)
f8e9e984 JK	365	return;
	366
	367	w = omap_readw(OMAP1610_DMA_LCD_CTRL);
	368	w \|= 1 << 8;
	369	omap_writew(w, OMAP1610_DMA_LCD_CTRL);
	370
	371	lcd_dma.active = 1;
	372
	373	w = omap_readw(OMAP1610_DMA_LCD_CCR);
	374	w \|= 1 << 7;
	375	omap_writew(w, OMAP1610_DMA_LCD_CCR);
	376	}
	377	EXPORT_SYMBOL(omap_enable_lcd_dma);
	378
	379	void omap_setup_lcd_dma(void)
	380	{
	381	BUG_ON(lcd_dma.active);
719078a6	382	if (!cpu_is_omap15xx()) {
f8e9e984 JK	383	/* Set some reasonable defaults */
	384	omap_writew(0x5440, OMAP1610_DMA_LCD_CCR);
	385	omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP);
	386	omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL);
	387	}
	388	set_b1_regs();
719078a6	389	if (!cpu_is_omap15xx()) {
f8e9e984 JK	390	u16 w;
	391
	392	w = omap_readw(OMAP1610_DMA_LCD_CCR);
	393	/*
	394	* If DMA was already active set the end_prog bit to have
	395	* the programmed register set loaded into the active
	396	* register set.
	397	*/
	398	w \|= 1 << 11; /* End_prog */
	399	if (!lcd_dma.single_transfer)
	400	w \|= (3 << 8); /* Auto_init, repeat */
	401	omap_writew(w, OMAP1610_DMA_LCD_CCR);
	402	}
	403	}
	404	EXPORT_SYMBOL(omap_setup_lcd_dma);
	405
	406	void omap_stop_lcd_dma(void)
	407	{
	408	u16 w;
	409
	410	lcd_dma.active = 0;
719078a6	411	if (cpu_is_omap15xx() \|\| !lcd_dma.ext_ctrl)
f8e9e984 JK	412	return;
	413
	414	w = omap_readw(OMAP1610_DMA_LCD_CCR);
	415	w &= ~(1 << 7);
	416	omap_writew(w, OMAP1610_DMA_LCD_CCR);
	417
	418	w = omap_readw(OMAP1610_DMA_LCD_CTRL);
	419	w &= ~(1 << 8);
	420	omap_writew(w, OMAP1610_DMA_LCD_CTRL);
	421	}
	422	EXPORT_SYMBOL(omap_stop_lcd_dma);
	423
	424	static int __init omap_init_lcd_dma(void)
	425	{
	426	int r;
	427
7f9187c2 TL	428	if (!cpu_class_is_omap1())
	429	return -ENODEV;
	430
f8e9e984 JK	431	if (cpu_is_omap16xx()) {
	432	u16 w;
	433
	434	/* this would prevent OMAP sleep */
	435	w = omap_readw(OMAP1610_DMA_LCD_CTRL);
	436	w &= ~(1 << 8);
	437	omap_writew(w, OMAP1610_DMA_LCD_CTRL);
	438	}
	439
	440	spin_lock_init(&lcd_dma.lock);
	441
	442	r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0,
	443	"LCD DMA", NULL);
	444	if (r != 0)
	445	printk(KERN_ERR "unable to request IRQ for LCD DMA "
	446	"(error %d)\n", r);
	447
	448	return r;
	449	}
	450
	451	arch_initcall(omap_init_lcd_dma);
	452