Commit | Line | Data |
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dd0cdd88 TL |
1 | /* |
2 | * Platform level USB initialization for FS USB OTG controller on omap1 and 24xx | |
3 | * | |
4 | * Copyright (C) 2004 Texas Instruments, Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
21 | #include <linux/module.h> | |
22 | #include <linux/kernel.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/platform_device.h> | |
25 | #include <linux/io.h> | |
26 | ||
27 | #include <asm/irq.h> | |
28 | ||
70c494c3 | 29 | #include <mach/mux.h> |
b924b204 TL |
30 | |
31 | #include <mach/usb.h> | |
dd0cdd88 | 32 | |
d3645d39 PW |
33 | #include "common.h" |
34 | ||
dd0cdd88 TL |
35 | /* These routines should handle the standard chip-specific modes |
36 | * for usb0/1/2 ports, covering basic mux and transceiver setup. | |
37 | * | |
38 | * Some board-*.c files will need to set up additional mux options, | |
39 | * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup. | |
40 | */ | |
41 | ||
42 | /* TESTED ON: | |
43 | * - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables | |
44 | * - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables | |
45 | * - 5912 OSK UDC, with *nonstandard* A-to-A cable | |
46 | * - 1510 Innovator UDC with bundled usb0 cable | |
47 | * - 1510 Innovator OHCI with bundled usb1/usb2 cable | |
48 | * - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS | |
49 | * - 1710 custom development board using alternate pin group | |
50 | * - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables | |
51 | */ | |
52 | ||
53 | #define INT_USB_IRQ_GEN IH2_BASE + 20 | |
54 | #define INT_USB_IRQ_NISO IH2_BASE + 30 | |
55 | #define INT_USB_IRQ_ISO IH2_BASE + 29 | |
56 | #define INT_USB_IRQ_HGEN INT_USB_HHC_1 | |
57 | #define INT_USB_IRQ_OTG IH2_BASE + 8 | |
58 | ||
b924b204 TL |
59 | #ifdef CONFIG_ARCH_OMAP_OTG |
60 | ||
61 | void __init | |
62 | omap_otg_init(struct omap_usb_config *config) | |
63 | { | |
64 | u32 syscon; | |
65 | int alt_pingroup = 0; | |
66 | ||
67 | /* NOTE: no bus or clock setup (yet?) */ | |
68 | ||
69 | syscon = omap_readl(OTG_SYSCON_1) & 0xffff; | |
70 | if (!(syscon & OTG_RESET_DONE)) | |
71 | pr_debug("USB resets not complete?\n"); | |
72 | ||
73 | //omap_writew(0, OTG_IRQ_EN); | |
74 | ||
75 | /* pin muxing and transceiver pinouts */ | |
76 | if (config->pins[0] > 2) /* alt pingroup 2 */ | |
77 | alt_pingroup = 1; | |
78 | syscon |= config->usb0_init(config->pins[0], is_usb0_device(config)); | |
79 | syscon |= config->usb1_init(config->pins[1]); | |
80 | syscon |= config->usb2_init(config->pins[2], alt_pingroup); | |
81 | pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); | |
82 | omap_writel(syscon, OTG_SYSCON_1); | |
83 | ||
84 | syscon = config->hmc_mode; | |
85 | syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */; | |
86 | #ifdef CONFIG_USB_OTG | |
87 | if (config->otg) | |
88 | syscon |= OTG_EN; | |
89 | #endif | |
90 | if (cpu_class_is_omap1()) | |
91 | pr_debug("USB_TRANSCEIVER_CTRL = %03x\n", | |
92 | omap_readl(USB_TRANSCEIVER_CTRL)); | |
93 | pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2)); | |
94 | omap_writel(syscon, OTG_SYSCON_2); | |
95 | ||
96 | printk("USB: hmc %d", config->hmc_mode); | |
97 | if (!alt_pingroup) | |
98 | printk(", usb2 alt %d wires", config->pins[2]); | |
99 | else if (config->pins[0]) | |
100 | printk(", usb0 %d wires%s", config->pins[0], | |
101 | is_usb0_device(config) ? " (dev)" : ""); | |
102 | if (config->pins[1]) | |
103 | printk(", usb1 %d wires", config->pins[1]); | |
104 | if (!alt_pingroup && config->pins[2]) | |
105 | printk(", usb2 %d wires", config->pins[2]); | |
106 | if (config->otg) | |
107 | printk(", Mini-AB on usb%d", config->otg - 1); | |
108 | printk("\n"); | |
109 | ||
110 | if (cpu_class_is_omap1()) { | |
111 | u16 w; | |
112 | ||
113 | /* leave USB clocks/controllers off until needed */ | |
114 | w = omap_readw(ULPD_SOFT_REQ); | |
115 | w &= ~SOFT_USB_CLK_REQ; | |
116 | omap_writew(w, ULPD_SOFT_REQ); | |
117 | ||
118 | w = omap_readw(ULPD_CLOCK_CTRL); | |
119 | w &= ~USB_MCLK_EN; | |
120 | w |= DIS_USB_PVCI_CLK; | |
121 | omap_writew(w, ULPD_CLOCK_CTRL); | |
122 | } | |
123 | syscon = omap_readl(OTG_SYSCON_1); | |
124 | syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN; | |
125 | ||
0345a1e3 | 126 | #if IS_ENABLED(CONFIG_USB_OMAP) |
b924b204 TL |
127 | if (config->otg || config->register_dev) { |
128 | struct platform_device *udc_device = config->udc_device; | |
129 | int status; | |
130 | ||
131 | syscon &= ~DEV_IDLE_EN; | |
132 | udc_device->dev.platform_data = config; | |
133 | status = platform_device_register(udc_device); | |
134 | if (status) | |
135 | pr_debug("can't register UDC device, %d\n", status); | |
136 | } | |
137 | #endif | |
138 | ||
139 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | |
140 | if (config->otg || config->register_host) { | |
141 | struct platform_device *ohci_device = config->ohci_device; | |
142 | int status; | |
143 | ||
144 | syscon &= ~HST_IDLE_EN; | |
145 | ohci_device->dev.platform_data = config; | |
146 | status = platform_device_register(ohci_device); | |
147 | if (status) | |
148 | pr_debug("can't register OHCI device, %d\n", status); | |
149 | } | |
150 | #endif | |
151 | ||
152 | #ifdef CONFIG_USB_OTG | |
153 | if (config->otg) { | |
154 | struct platform_device *otg_device = config->otg_device; | |
155 | int status; | |
156 | ||
157 | syscon &= ~OTG_IDLE_EN; | |
158 | otg_device->dev.platform_data = config; | |
159 | status = platform_device_register(otg_device); | |
160 | if (status) | |
161 | pr_debug("can't register OTG device, %d\n", status); | |
162 | } | |
163 | #endif | |
164 | pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); | |
165 | omap_writel(syscon, OTG_SYSCON_1); | |
166 | } | |
167 | ||
168 | #else | |
169 | void omap_otg_init(struct omap_usb_config *config) {} | |
170 | #endif | |
171 | ||
0345a1e3 | 172 | #if IS_ENABLED(CONFIG_USB_OMAP) |
dd0cdd88 TL |
173 | |
174 | static struct resource udc_resources[] = { | |
175 | /* order is significant! */ | |
176 | { /* registers */ | |
177 | .start = UDC_BASE, | |
178 | .end = UDC_BASE + 0xff, | |
179 | .flags = IORESOURCE_MEM, | |
180 | }, { /* general IRQ */ | |
181 | .start = INT_USB_IRQ_GEN, | |
182 | .flags = IORESOURCE_IRQ, | |
183 | }, { /* PIO IRQ */ | |
184 | .start = INT_USB_IRQ_NISO, | |
185 | .flags = IORESOURCE_IRQ, | |
186 | }, { /* SOF IRQ */ | |
187 | .start = INT_USB_IRQ_ISO, | |
188 | .flags = IORESOURCE_IRQ, | |
189 | }, | |
190 | }; | |
191 | ||
192 | static u64 udc_dmamask = ~(u32)0; | |
193 | ||
194 | static struct platform_device udc_device = { | |
195 | .name = "omap_udc", | |
196 | .id = -1, | |
197 | .dev = { | |
198 | .dma_mask = &udc_dmamask, | |
199 | .coherent_dma_mask = 0xffffffff, | |
200 | }, | |
201 | .num_resources = ARRAY_SIZE(udc_resources), | |
202 | .resource = udc_resources, | |
203 | }; | |
204 | ||
205 | static inline void udc_device_init(struct omap_usb_config *pdata) | |
206 | { | |
207 | /* IRQ numbers for omap7xx */ | |
208 | if(cpu_is_omap7xx()) { | |
209 | udc_resources[1].start = INT_7XX_USB_GENI; | |
210 | udc_resources[2].start = INT_7XX_USB_NON_ISO; | |
211 | udc_resources[3].start = INT_7XX_USB_ISO; | |
212 | } | |
213 | pdata->udc_device = &udc_device; | |
214 | } | |
215 | ||
216 | #else | |
217 | ||
218 | static inline void udc_device_init(struct omap_usb_config *pdata) | |
219 | { | |
220 | } | |
221 | ||
222 | #endif | |
223 | ||
224 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | |
225 | ||
226 | /* The dmamask must be set for OHCI to work */ | |
227 | static u64 ohci_dmamask = ~(u32)0; | |
228 | ||
229 | static struct resource ohci_resources[] = { | |
230 | { | |
231 | .start = OMAP_OHCI_BASE, | |
232 | .end = OMAP_OHCI_BASE + 0xff, | |
233 | .flags = IORESOURCE_MEM, | |
234 | }, | |
235 | { | |
236 | .start = INT_USB_IRQ_HGEN, | |
237 | .flags = IORESOURCE_IRQ, | |
238 | }, | |
239 | }; | |
240 | ||
241 | static struct platform_device ohci_device = { | |
242 | .name = "ohci", | |
243 | .id = -1, | |
244 | .dev = { | |
245 | .dma_mask = &ohci_dmamask, | |
246 | .coherent_dma_mask = 0xffffffff, | |
247 | }, | |
248 | .num_resources = ARRAY_SIZE(ohci_resources), | |
249 | .resource = ohci_resources, | |
250 | }; | |
251 | ||
252 | static inline void ohci_device_init(struct omap_usb_config *pdata) | |
253 | { | |
254 | if (cpu_is_omap7xx()) | |
255 | ohci_resources[1].start = INT_7XX_USB_HHC_1; | |
256 | pdata->ohci_device = &ohci_device; | |
d3645d39 | 257 | pdata->ocpi_enable = &ocpi_enable; |
dd0cdd88 TL |
258 | } |
259 | ||
260 | #else | |
261 | ||
262 | static inline void ohci_device_init(struct omap_usb_config *pdata) | |
263 | { | |
264 | } | |
265 | ||
266 | #endif | |
267 | ||
268 | #if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG) | |
269 | ||
270 | static struct resource otg_resources[] = { | |
271 | /* order is significant! */ | |
272 | { | |
273 | .start = OTG_BASE, | |
274 | .end = OTG_BASE + 0xff, | |
275 | .flags = IORESOURCE_MEM, | |
276 | }, { | |
277 | .start = INT_USB_IRQ_OTG, | |
278 | .flags = IORESOURCE_IRQ, | |
279 | }, | |
280 | }; | |
281 | ||
282 | static struct platform_device otg_device = { | |
283 | .name = "omap_otg", | |
284 | .id = -1, | |
285 | .num_resources = ARRAY_SIZE(otg_resources), | |
286 | .resource = otg_resources, | |
287 | }; | |
288 | ||
289 | static inline void otg_device_init(struct omap_usb_config *pdata) | |
290 | { | |
291 | if (cpu_is_omap7xx()) | |
292 | otg_resources[1].start = INT_7XX_USB_OTG; | |
293 | pdata->otg_device = &otg_device; | |
294 | } | |
295 | ||
296 | #else | |
297 | ||
298 | static inline void otg_device_init(struct omap_usb_config *pdata) | |
299 | { | |
300 | } | |
301 | ||
302 | #endif | |
303 | ||
eba36d77 | 304 | static u32 __init omap1_usb0_init(unsigned nwires, unsigned is_device) |
dd0cdd88 TL |
305 | { |
306 | u32 syscon1 = 0; | |
307 | ||
308 | if (nwires == 0) { | |
309 | if (!cpu_is_omap15xx()) { | |
310 | u32 l; | |
311 | ||
312 | /* pulldown D+/D- */ | |
313 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
314 | l &= ~(3 << 1); | |
315 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
316 | } | |
317 | return 0; | |
318 | } | |
319 | ||
320 | if (is_device) { | |
321 | if (cpu_is_omap7xx()) { | |
322 | omap_cfg_reg(AA17_7XX_USB_DM); | |
323 | omap_cfg_reg(W16_7XX_USB_PU_EN); | |
324 | omap_cfg_reg(W17_7XX_USB_VBUSI); | |
325 | omap_cfg_reg(W18_7XX_USB_DMCK_OUT); | |
326 | omap_cfg_reg(W19_7XX_USB_DCRST); | |
327 | } else | |
328 | omap_cfg_reg(W4_USB_PUEN); | |
329 | } | |
330 | ||
331 | if (nwires == 2) { | |
332 | u32 l; | |
333 | ||
334 | // omap_cfg_reg(P9_USB_DP); | |
335 | // omap_cfg_reg(R8_USB_DM); | |
336 | ||
337 | if (cpu_is_omap15xx()) { | |
338 | /* This works on 1510-Innovator */ | |
339 | return 0; | |
340 | } | |
341 | ||
342 | /* NOTES: | |
343 | * - peripheral should configure VBUS detection! | |
344 | * - only peripherals may use the internal D+/D- pulldowns | |
345 | * - OTG support on this port not yet written | |
346 | */ | |
347 | ||
348 | /* Don't do this for omap7xx -- it causes USB to not work correctly */ | |
349 | if (!cpu_is_omap7xx()) { | |
350 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
351 | l &= ~(7 << 4); | |
352 | if (!is_device) | |
353 | l |= (3 << 1); | |
354 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
355 | } | |
356 | ||
357 | return 3 << 16; | |
358 | } | |
359 | ||
360 | /* alternate pin config, external transceiver */ | |
361 | if (cpu_is_omap15xx()) { | |
362 | printk(KERN_ERR "no usb0 alt pin config on 15xx\n"); | |
363 | return 0; | |
364 | } | |
365 | ||
366 | omap_cfg_reg(V6_USB0_TXD); | |
367 | omap_cfg_reg(W9_USB0_TXEN); | |
368 | omap_cfg_reg(W5_USB0_SE0); | |
369 | if (nwires != 3) | |
370 | omap_cfg_reg(Y5_USB0_RCV); | |
371 | ||
372 | /* NOTE: SPEED and SUSP aren't configured here. OTG hosts | |
373 | * may be able to use I2C requests to set those bits along | |
374 | * with VBUS switching and overcurrent detection. | |
375 | */ | |
376 | ||
377 | if (nwires != 6) { | |
378 | u32 l; | |
379 | ||
380 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
381 | l &= ~CONF_USB2_UNI_R; | |
382 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
383 | } | |
384 | ||
385 | switch (nwires) { | |
386 | case 3: | |
387 | syscon1 = 2; | |
388 | break; | |
389 | case 4: | |
390 | syscon1 = 1; | |
391 | break; | |
392 | case 6: | |
393 | syscon1 = 3; | |
394 | { | |
395 | u32 l; | |
396 | ||
397 | omap_cfg_reg(AA9_USB0_VP); | |
398 | omap_cfg_reg(R9_USB0_VM); | |
399 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
400 | l |= CONF_USB2_UNI_R; | |
401 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
402 | } | |
403 | break; | |
404 | default: | |
405 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", | |
406 | 0, nwires); | |
407 | } | |
408 | ||
409 | return syscon1 << 16; | |
410 | } | |
411 | ||
eba36d77 | 412 | static u32 __init omap1_usb1_init(unsigned nwires) |
dd0cdd88 TL |
413 | { |
414 | u32 syscon1 = 0; | |
415 | ||
416 | if (!cpu_is_omap15xx() && nwires != 6) { | |
417 | u32 l; | |
418 | ||
419 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
420 | l &= ~CONF_USB1_UNI_R; | |
421 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
422 | } | |
423 | if (nwires == 0) | |
424 | return 0; | |
425 | ||
426 | /* external transceiver */ | |
427 | omap_cfg_reg(USB1_TXD); | |
428 | omap_cfg_reg(USB1_TXEN); | |
429 | if (nwires != 3) | |
430 | omap_cfg_reg(USB1_RCV); | |
431 | ||
432 | if (cpu_is_omap15xx()) { | |
433 | omap_cfg_reg(USB1_SEO); | |
434 | omap_cfg_reg(USB1_SPEED); | |
435 | // SUSP | |
436 | } else if (cpu_is_omap1610() || cpu_is_omap5912()) { | |
437 | omap_cfg_reg(W13_1610_USB1_SE0); | |
438 | omap_cfg_reg(R13_1610_USB1_SPEED); | |
439 | // SUSP | |
440 | } else if (cpu_is_omap1710()) { | |
441 | omap_cfg_reg(R13_1710_USB1_SE0); | |
442 | // SUSP | |
443 | } else { | |
444 | pr_debug("usb%d cpu unrecognized\n", 1); | |
445 | return 0; | |
446 | } | |
447 | ||
448 | switch (nwires) { | |
449 | case 2: | |
450 | goto bad; | |
451 | case 3: | |
452 | syscon1 = 2; | |
453 | break; | |
454 | case 4: | |
455 | syscon1 = 1; | |
456 | break; | |
457 | case 6: | |
458 | syscon1 = 3; | |
459 | omap_cfg_reg(USB1_VP); | |
460 | omap_cfg_reg(USB1_VM); | |
461 | if (!cpu_is_omap15xx()) { | |
462 | u32 l; | |
463 | ||
464 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
465 | l |= CONF_USB1_UNI_R; | |
466 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
467 | } | |
468 | break; | |
469 | default: | |
470 | bad: | |
471 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", | |
472 | 1, nwires); | |
473 | } | |
474 | ||
475 | return syscon1 << 20; | |
476 | } | |
477 | ||
eba36d77 | 478 | static u32 __init omap1_usb2_init(unsigned nwires, unsigned alt_pingroup) |
dd0cdd88 TL |
479 | { |
480 | u32 syscon1 = 0; | |
481 | ||
482 | /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */ | |
483 | if (alt_pingroup || nwires == 0) | |
484 | return 0; | |
485 | ||
486 | if (!cpu_is_omap15xx() && nwires != 6) { | |
487 | u32 l; | |
488 | ||
489 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
490 | l &= ~CONF_USB2_UNI_R; | |
491 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
492 | } | |
493 | ||
494 | /* external transceiver */ | |
495 | if (cpu_is_omap15xx()) { | |
496 | omap_cfg_reg(USB2_TXD); | |
497 | omap_cfg_reg(USB2_TXEN); | |
498 | omap_cfg_reg(USB2_SEO); | |
499 | if (nwires != 3) | |
500 | omap_cfg_reg(USB2_RCV); | |
501 | /* there is no USB2_SPEED */ | |
502 | } else if (cpu_is_omap16xx()) { | |
503 | omap_cfg_reg(V6_USB2_TXD); | |
504 | omap_cfg_reg(W9_USB2_TXEN); | |
505 | omap_cfg_reg(W5_USB2_SE0); | |
506 | if (nwires != 3) | |
507 | omap_cfg_reg(Y5_USB2_RCV); | |
508 | // FIXME omap_cfg_reg(USB2_SPEED); | |
509 | } else { | |
510 | pr_debug("usb%d cpu unrecognized\n", 1); | |
511 | return 0; | |
512 | } | |
513 | ||
514 | // omap_cfg_reg(USB2_SUSP); | |
515 | ||
516 | switch (nwires) { | |
517 | case 2: | |
518 | goto bad; | |
519 | case 3: | |
520 | syscon1 = 2; | |
521 | break; | |
522 | case 4: | |
523 | syscon1 = 1; | |
524 | break; | |
525 | case 5: | |
526 | goto bad; | |
527 | case 6: | |
528 | syscon1 = 3; | |
529 | if (cpu_is_omap15xx()) { | |
530 | omap_cfg_reg(USB2_VP); | |
531 | omap_cfg_reg(USB2_VM); | |
532 | } else { | |
533 | u32 l; | |
534 | ||
535 | omap_cfg_reg(AA9_USB2_VP); | |
536 | omap_cfg_reg(R9_USB2_VM); | |
537 | l = omap_readl(USB_TRANSCEIVER_CTRL); | |
538 | l |= CONF_USB2_UNI_R; | |
539 | omap_writel(l, USB_TRANSCEIVER_CTRL); | |
540 | } | |
541 | break; | |
542 | default: | |
543 | bad: | |
544 | printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", | |
545 | 2, nwires); | |
546 | } | |
547 | ||
548 | return syscon1 << 24; | |
549 | } | |
550 | ||
551 | #ifdef CONFIG_ARCH_OMAP15XX | |
552 | ||
553 | /* ULPD_DPLL_CTRL */ | |
554 | #define DPLL_IOB (1 << 13) | |
555 | #define DPLL_PLL_ENABLE (1 << 4) | |
556 | #define DPLL_LOCK (1 << 0) | |
557 | ||
558 | /* ULPD_APLL_CTRL */ | |
559 | #define APLL_NDPLL_SWITCH (1 << 0) | |
560 | ||
561 | static void __init omap_1510_usb_init(struct omap_usb_config *config) | |
562 | { | |
563 | unsigned int val; | |
564 | u16 w; | |
565 | ||
566 | config->usb0_init(config->pins[0], is_usb0_device(config)); | |
567 | config->usb1_init(config->pins[1]); | |
568 | config->usb2_init(config->pins[2], 0); | |
569 | ||
570 | val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1); | |
571 | val |= (config->hmc_mode << 1); | |
572 | omap_writel(val, MOD_CONF_CTRL_0); | |
573 | ||
574 | printk("USB: hmc %d", config->hmc_mode); | |
575 | if (config->pins[0]) | |
576 | printk(", usb0 %d wires%s", config->pins[0], | |
577 | is_usb0_device(config) ? " (dev)" : ""); | |
578 | if (config->pins[1]) | |
579 | printk(", usb1 %d wires", config->pins[1]); | |
580 | if (config->pins[2]) | |
581 | printk(", usb2 %d wires", config->pins[2]); | |
582 | printk("\n"); | |
583 | ||
584 | /* use DPLL for 48 MHz function clock */ | |
585 | pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL), | |
586 | omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ)); | |
587 | ||
588 | w = omap_readw(ULPD_APLL_CTRL); | |
589 | w &= ~APLL_NDPLL_SWITCH; | |
590 | omap_writew(w, ULPD_APLL_CTRL); | |
591 | ||
592 | w = omap_readw(ULPD_DPLL_CTRL); | |
593 | w |= DPLL_IOB | DPLL_PLL_ENABLE; | |
594 | omap_writew(w, ULPD_DPLL_CTRL); | |
595 | ||
596 | w = omap_readw(ULPD_SOFT_REQ); | |
597 | w |= SOFT_UDC_REQ | SOFT_DPLL_REQ; | |
598 | omap_writew(w, ULPD_SOFT_REQ); | |
599 | ||
600 | while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK)) | |
601 | cpu_relax(); | |
602 | ||
0345a1e3 | 603 | #if IS_ENABLED(CONFIG_USB_OMAP) |
dd0cdd88 TL |
604 | if (config->register_dev) { |
605 | int status; | |
606 | ||
607 | udc_device.dev.platform_data = config; | |
608 | status = platform_device_register(&udc_device); | |
609 | if (status) | |
610 | pr_debug("can't register UDC device, %d\n", status); | |
611 | /* udc driver gates 48MHz by D+ pullup */ | |
612 | } | |
613 | #endif | |
614 | ||
615 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | |
616 | if (config->register_host) { | |
617 | int status; | |
618 | ||
619 | ohci_device.dev.platform_data = config; | |
620 | status = platform_device_register(&ohci_device); | |
621 | if (status) | |
622 | pr_debug("can't register OHCI device, %d\n", status); | |
623 | /* hcd explicitly gates 48MHz */ | |
624 | } | |
625 | #endif | |
626 | } | |
627 | ||
628 | #else | |
629 | static inline void omap_1510_usb_init(struct omap_usb_config *config) {} | |
630 | #endif | |
631 | ||
07fd296d | 632 | void __init omap1_usb_init(struct omap_usb_config *_pdata) |
dd0cdd88 | 633 | { |
07fd296d AK |
634 | struct omap_usb_config *pdata; |
635 | ||
636 | pdata = kmemdup(_pdata, sizeof(*pdata), GFP_KERNEL); | |
637 | if (!pdata) | |
638 | return; | |
639 | ||
dd0cdd88 TL |
640 | pdata->usb0_init = omap1_usb0_init; |
641 | pdata->usb1_init = omap1_usb1_init; | |
642 | pdata->usb2_init = omap1_usb2_init; | |
643 | udc_device_init(pdata); | |
644 | ohci_device_init(pdata); | |
645 | otg_device_init(pdata); | |
646 | ||
647 | if (cpu_is_omap7xx() || cpu_is_omap16xx()) | |
648 | omap_otg_init(pdata); | |
649 | else if (cpu_is_omap15xx()) | |
650 | omap_1510_usb_init(pdata); | |
651 | else | |
652 | printk(KERN_ERR "USB: No init for your chip yet\n"); | |
653 | } |