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omap3sdp: Fix regulator mapping for ads7846 TS controller
[deliverable/linux.git] / arch / arm / mach-omap2 / board-3430sdp.c
CommitLineData
6fdc29e2
SMK		 1/*
2 * linux/arch/arm/mach-omap2/board-3430sdp.c
3 *
4 * Copyright (C) 2007 Texas Instruments
5 *
6 * Modified from mach-omap2/board-generic.c
7 *
8 * Initial code: Syed Mohammed Khasim
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/platform_device.h>
18#include <linux/delay.h>
19#include <linux/input.h>
6135434a 20#include <linux/input/matrix_keypad.h>
6fdc29e2
SMK		 21#include <linux/spi/spi.h>
22#include <linux/spi/ads7846.h>
b07682b6 23#include <linux/i2c/twl.h>
6fdc29e2
SMK		 24#include <linux/regulator/machine.h>
25#include <linux/io.h>
26#include <linux/gpio.h>
3a63833e 27#include <linux/mmc/host.h>
6fdc29e2
SMK		 28
29#include <mach/hardware.h>
30#include <asm/mach-types.h>
31#include <asm/mach/arch.h>
32#include <asm/mach/map.h>
33
ce491cf8 34#include <plat/mcspi.h>
ce491cf8
TL		 35#include <plat/board.h>
36#include <plat/usb.h>
37#include <plat/common.h>
38#include <plat/dma.h>
39#include <plat/gpmc.h>
d9056ce2 40#include <plat/display.h>
89747c91 41#include <plat/panel-generic-dpi.h>
6fdc29e2 42
ce491cf8 43#include <plat/gpmc-smc91x.h>
6fdc29e2 44
04aeae77 45#include "board-flash.h"
ca5742bd 46#include "mux.h"
17a722ca 47#include "sdram-qimonda-hyb18m512160af-6.h"
d02a900b 48#include "hsmmc.h"
bb4de3df 49#include "pm.h"
4814ced5 50#include "control.h"
6fdc29e2
SMK		 51
52#define CONFIG_DISABLE_HFCLK 1
53
6fdc29e2
SMK		 54#define SDP3430_TS_GPIO_IRQ_SDPV1 3
55#define SDP3430_TS_GPIO_IRQ_SDPV2 2
56
57#define ENABLE_VAUX3_DEDICATED 0x03
58#define ENABLE_VAUX3_DEV_GRP 0x20
59
60#define TWL4030_MSECURE_GPIO 22
61
bb4de3df
KH		 62/* FIXME: These values need to be updated based on more profiling on 3430sdp*/
63static struct cpuidle_params omap3_cpuidle_params_table[] = {
64 /* C1 */
709731bb 65 {1, 2, 2, 5},
bb4de3df 66 /* C2 */
709731bb 67 {1, 10, 10, 30},
bb4de3df 68 /* C3 */
709731bb 69 {1, 50, 50, 300},
bb4de3df 70 /* C4 */
709731bb 71 {1, 1500, 1800, 4000},
bb4de3df 72 /* C5 */
709731bb 73 {1, 2500, 7500, 12000},
bb4de3df 74 /* C6 */
709731bb 75 {1, 3000, 8500, 15000},
bb4de3df 76 /* C7 */
709731bb 77 {1, 10000, 30000, 300000},
bb4de3df
KH		 78};
79
bead4375 80static uint32_t board_keymap[] = {
6fdc29e2
SMK		 81 KEY(0, 0, KEY_LEFT),
82 KEY(0, 1, KEY_RIGHT),
83 KEY(0, 2, KEY_A),
84 KEY(0, 3, KEY_B),
85 KEY(0, 4, KEY_C),
86 KEY(1, 0, KEY_DOWN),
87 KEY(1, 1, KEY_UP),
88 KEY(1, 2, KEY_E),
89 KEY(1, 3, KEY_F),
90 KEY(1, 4, KEY_G),
91 KEY(2, 0, KEY_ENTER),
92 KEY(2, 1, KEY_I),
93 KEY(2, 2, KEY_J),
94 KEY(2, 3, KEY_K),
95 KEY(2, 4, KEY_3),
96 KEY(3, 0, KEY_M),
97 KEY(3, 1, KEY_N),
98 KEY(3, 2, KEY_O),
99 KEY(3, 3, KEY_P),
100 KEY(3, 4, KEY_Q),
101 KEY(4, 0, KEY_R),
102 KEY(4, 1, KEY_4),
103 KEY(4, 2, KEY_T),
104 KEY(4, 3, KEY_U),
105 KEY(4, 4, KEY_D),
106 KEY(5, 0, KEY_V),
107 KEY(5, 1, KEY_W),
108 KEY(5, 2, KEY_L),
109 KEY(5, 3, KEY_S),
110 KEY(5, 4, KEY_H),
111 0
112};
113
4f543332
TL		 114static struct matrix_keymap_data board_map_data = {
115 .keymap = board_keymap,
116 .keymap_size = ARRAY_SIZE(board_keymap),
117};
118
6fdc29e2 119static struct twl4030_keypad_data sdp3430_kp_data = {
4f543332 120 .keymap_data = &board_map_data,
6fdc29e2
SMK		 121 .rows = 5,
122 .cols = 6,
6fdc29e2
SMK		 123 .rep = 1,
124};
125
126static int ts_gpio; /* Needed for ads7846_get_pendown_state */
127
128/**
129 * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq
130 *
131 * @return - void. If request gpio fails then Flag KERN_ERR.
132 */
133static void ads7846_dev_init(void)
134{
135 if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) {
136 printk(KERN_ERR "can't get ads746 pen down GPIO\n");
137 return;
138 }
139
140 gpio_direction_input(ts_gpio);
48feb337 141 gpio_set_debounce(ts_gpio, 310);
6fdc29e2
SMK		 142}
143
144static int ads7846_get_pendown_state(void)
145{
146 return !gpio_get_value(ts_gpio);
147}
148
149static struct ads7846_platform_data tsc2046_config __initdata = {
150 .get_pendown_state = ads7846_get_pendown_state,
151 .keep_vref_on = 1,
7a44ad2f 152 .wakeup = true,
6fdc29e2
SMK		 153};
154
155
156static struct omap2_mcspi_device_config tsc2046_mcspi_config = {
157 .turbo_mode = 0,
158 .single_channel = 1, /* 0: slave, 1: master */
159};
160
161static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
162 [0] = {
163 /*
164 * TSC2046 operates at a max freqency of 2MHz, so
165 * operate slightly below at 1.5MHz
166 */
167 .modalias = "ads7846",
168 .bus_num = 1,
169 .chip_select = 0,
170 .max_speed_hz = 1500000,
171 .controller_data = &tsc2046_mcspi_config,
172 .irq = 0,
173 .platform_data = &tsc2046_config,
174 },
175};
176
d9056ce2
TV		 177
178#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
179#define SDP3430_LCD_PANEL_ENABLE_GPIO 5
180
181static unsigned backlight_gpio;
182static unsigned enable_gpio;
183static int lcd_enabled;
184static int dvi_enabled;
185
186static void __init sdp3430_display_init(void)
187{
188 int r;
189
190 enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO;
191 backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO;
192
193 r = gpio_request(enable_gpio, "LCD reset");
194 if (r) {
195 printk(KERN_ERR "failed to get LCD reset GPIO\n");
196 goto err0;
197 }
198
199 r = gpio_request(backlight_gpio, "LCD Backlight");
200 if (r) {
201 printk(KERN_ERR "failed to get LCD backlight GPIO\n");
202 goto err1;
203 }
204
205 gpio_direction_output(enable_gpio, 0);
206 gpio_direction_output(backlight_gpio, 0);
207
208 return;
209err1:
210 gpio_free(enable_gpio);
211err0:
212 return;
213}
214
215static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
216{
217 if (dvi_enabled) {
218 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
219 return -EINVAL;
220 }
221
222 gpio_direction_output(enable_gpio, 1);
223 gpio_direction_output(backlight_gpio, 1);
224
225 lcd_enabled = 1;
226
227 return 0;
228}
229
230static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
231{
232 lcd_enabled = 0;
233
234 gpio_direction_output(enable_gpio, 0);
235 gpio_direction_output(backlight_gpio, 0);
236}
237
238static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
239{
240 if (lcd_enabled) {
241 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
242 return -EINVAL;
243 }
244
245 dvi_enabled = 1;
246
247 return 0;
248}
249
250static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
251{
252 dvi_enabled = 0;
253}
254
255static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
256{
257 return 0;
258}
259
260static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
261{
262}
263
264
265static struct omap_dss_device sdp3430_lcd_device = {
266 .name = "lcd",
267 .driver_name = "sharp_ls_panel",
268 .type = OMAP_DISPLAY_TYPE_DPI,
269 .phy.dpi.data_lines = 16,
270 .platform_enable = sdp3430_panel_enable_lcd,
271 .platform_disable = sdp3430_panel_disable_lcd,
6fdc29e2
SMK		 272};
273
89747c91
BW		 274static struct panel_generic_dpi_data dvi_panel = {
275 .name = "generic",
276 .platform_enable = sdp3430_panel_enable_dvi,
277 .platform_disable = sdp3430_panel_disable_dvi,
278};
279
d9056ce2
TV		 280static struct omap_dss_device sdp3430_dvi_device = {
281 .name = "dvi",
d9056ce2 282 .type = OMAP_DISPLAY_TYPE_DPI,
89747c91
BW		 283 .driver_name = "generic_dpi_panel",
284 .data = &dvi_panel,
d9056ce2 285 .phy.dpi.data_lines = 24,
6fdc29e2
SMK		 286};
287
d9056ce2
TV		 288static struct omap_dss_device sdp3430_tv_device = {
289 .name = "tv",
290 .driver_name = "venc",
291 .type = OMAP_DISPLAY_TYPE_VENC,
292 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
293 .platform_enable = sdp3430_panel_enable_tv,
294 .platform_disable = sdp3430_panel_disable_tv,
6fdc29e2
SMK		 295};
296
d9056ce2
TV		 297
298static struct omap_dss_device *sdp3430_dss_devices[] = {
6fdc29e2 299 &sdp3430_lcd_device,
d9056ce2
TV		 300 &sdp3430_dvi_device,
301 &sdp3430_tv_device,
6fdc29e2
SMK		 302};
303
d9056ce2
TV		 304static struct omap_dss_board_info sdp3430_dss_data = {
305 .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
306 .devices = sdp3430_dss_devices,
307 .default_device = &sdp3430_lcd_device,
308};
309
310static struct platform_device sdp3430_dss_device = {
311 .name = "omapdss",
312 .id = -1,
313 .dev = {
314 .platform_data = &sdp3430_dss_data,
315 },
316};
317
318static struct regulator_consumer_supply sdp3430_vdda_dac_supply = {
319 .supply = "vdda_dac",
320 .dev = &sdp3430_dss_device.dev,
321};
322
323static struct platform_device *sdp3430_devices[] __initdata = {
324 &sdp3430_dss_device,
6fdc29e2
SMK		 325};
326
327static struct omap_board_config_kernel sdp3430_config[] __initdata = {
6fdc29e2
SMK		 328};
329
3dc3bad6 330static void __init omap_3430sdp_init_early(void)
b3c6df3a
PW		 331{
332 omap_board_config = sdp3430_config;
333 omap_board_config_size = ARRAY_SIZE(sdp3430_config);
bb4de3df 334 omap3_pm_init_cpuidle(omap3_cpuidle_params_table);
4805734b
PW		 335 omap2_init_common_infrastructure();
336 omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
b3c6df3a
PW		 337}
338
6fdc29e2
SMK		 339static int sdp3430_batt_table[] = {
340/* 0 C*/
34130800, 29500, 28300, 27100,
34226000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
34317200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
34411600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
3458020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
3465640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
3474040, 3910, 3790, 3670, 3550
348};
349
350static struct twl4030_bci_platform_data sdp3430_bci_data = {
351 .battery_tmp_tbl = sdp3430_batt_table,
352 .tblsize = ARRAY_SIZE(sdp3430_batt_table),
353};
354
68ff0423 355static struct omap2_hsmmc_info mmc[] = {
6fdc29e2
SMK		 356 {
357 .mmc = 1,
358 /* 8 bits (default) requires S6.3 == ON,
359 * so the SIM card isn't used; else 4 bits.
360 */
3a63833e 361 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
6fdc29e2
SMK		 362 .gpio_wp = 4,
363 },
364 {
365 .mmc = 2,
3a63833e 366 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
6fdc29e2
SMK		 367 .gpio_wp = 7,
368 },
369 {} /* Terminator */
370};
371
372static struct regulator_consumer_supply sdp3430_vmmc1_supply = {
373 .supply = "vmmc",
374};
375
376static struct regulator_consumer_supply sdp3430_vsim_supply = {
377 .supply = "vmmc_aux",
378};
379
380static struct regulator_consumer_supply sdp3430_vmmc2_supply = {
381 .supply = "vmmc",
382};
383
384static int sdp3430_twl_gpio_setup(struct device *dev,
385 unsigned gpio, unsigned ngpio)
386{
387 /* gpio + 0 is "mmc0_cd" (input/IRQ),
388 * gpio + 1 is "mmc1_cd" (input/IRQ)
389 */
390 mmc[0].gpio_cd = gpio + 0;
391 mmc[1].gpio_cd = gpio + 1;
68ff0423 392 omap2_hsmmc_init(mmc);
6fdc29e2
SMK		 393
394 /* link regulators to MMC adapters ... we "know" the
395 * regulators will be set up only *after* we return.
396 */
397 sdp3430_vmmc1_supply.dev = mmc[0].dev;
398 sdp3430_vsim_supply.dev = mmc[0].dev;
399 sdp3430_vmmc2_supply.dev = mmc[1].dev;
400
401 /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
402 gpio_request(gpio + 7, "sub_lcd_en_bkl");
403 gpio_direction_output(gpio + 7, 0);
404
405 /* gpio + 15 is "sub_lcd_nRST" (output) */
406 gpio_request(gpio + 15, "sub_lcd_nRST");
407 gpio_direction_output(gpio + 15, 0);
408
409 return 0;
410}
411
412static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
413 .gpio_base = OMAP_MAX_GPIO_LINES,
414 .irq_base = TWL4030_GPIO_IRQ_BASE,
415 .irq_end = TWL4030_GPIO_IRQ_END,
416 .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
417 | BIT(16) | BIT(17),
418 .setup = sdp3430_twl_gpio_setup,
419};
420
421static struct twl4030_usb_data sdp3430_usb_data = {
422 .usb_mode = T2_USB_MODE_ULPI,
423};
424
425static struct twl4030_madc_platform_data sdp3430_madc_data = {
426 .irq_line = 1,
427};
428
4b087ff8
RN		 429/* ads7846 on SPI */
430static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
431 REGULATOR_SUPPLY("vcc", "spi1.0"),
432};
433
6fdc29e2
SMK		 434/*
435 * Apply all the fixed voltages since most versions of U-Boot
436 * don't bother with that initialization.
437 */
438
439/* VAUX1 for mainboard (irda and sub-lcd) */
440static struct regulator_init_data sdp3430_vaux1 = {
441 .constraints = {
442 .min_uV = 2800000,
443 .max_uV = 2800000,
444 .apply_uV = true,
445 .valid_modes_mask = REGULATOR_MODE_NORMAL
446 | REGULATOR_MODE_STANDBY,
447 .valid_ops_mask = REGULATOR_CHANGE_MODE
448 | REGULATOR_CHANGE_STATUS,
449 },
450};
451
452/* VAUX2 for camera module */
453static struct regulator_init_data sdp3430_vaux2 = {
454 .constraints = {
455 .min_uV = 2800000,
456 .max_uV = 2800000,
457 .apply_uV = true,
458 .valid_modes_mask = REGULATOR_MODE_NORMAL
459 | REGULATOR_MODE_STANDBY,
460 .valid_ops_mask = REGULATOR_CHANGE_MODE
461 | REGULATOR_CHANGE_STATUS,
462 },
463};
464
465/* VAUX3 for LCD board */
466static struct regulator_init_data sdp3430_vaux3 = {
467 .constraints = {
468 .min_uV = 2800000,
469 .max_uV = 2800000,
470 .apply_uV = true,
471 .valid_modes_mask = REGULATOR_MODE_NORMAL
472 | REGULATOR_MODE_STANDBY,
473 .valid_ops_mask = REGULATOR_CHANGE_MODE
474 | REGULATOR_CHANGE_STATUS,
475 },
4b087ff8
RN		 476 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
477 .consumer_supplies = sdp3430_vaux3_supplies,
6fdc29e2
SMK		 478};
479
480/* VAUX4 for OMAP VDD_CSI2 (camera) */
481static struct regulator_init_data sdp3430_vaux4 = {
482 .constraints = {
483 .min_uV = 1800000,
484 .max_uV = 1800000,
485 .apply_uV = true,
486 .valid_modes_mask = REGULATOR_MODE_NORMAL
487 | REGULATOR_MODE_STANDBY,
488 .valid_ops_mask = REGULATOR_CHANGE_MODE
489 | REGULATOR_CHANGE_STATUS,
490 },
491};
492
493/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
494static struct regulator_init_data sdp3430_vmmc1 = {
495 .constraints = {
496 .min_uV = 1850000,
497 .max_uV = 3150000,
498 .valid_modes_mask = REGULATOR_MODE_NORMAL
499 | REGULATOR_MODE_STANDBY,
500 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
501 | REGULATOR_CHANGE_MODE
502 | REGULATOR_CHANGE_STATUS,
503 },
504 .num_consumer_supplies = 1,
505 .consumer_supplies = &sdp3430_vmmc1_supply,
506};
507
508/* VMMC2 for MMC2 card */
509static struct regulator_init_data sdp3430_vmmc2 = {
510 .constraints = {
511 .min_uV = 1850000,
512 .max_uV = 1850000,
513 .apply_uV = true,
514 .valid_modes_mask = REGULATOR_MODE_NORMAL
515 | REGULATOR_MODE_STANDBY,
516 .valid_ops_mask = REGULATOR_CHANGE_MODE
517 | REGULATOR_CHANGE_STATUS,
518 },
519 .num_consumer_supplies = 1,
520 .consumer_supplies = &sdp3430_vmmc2_supply,
521};
522
523/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
524static struct regulator_init_data sdp3430_vsim = {
525 .constraints = {
526 .min_uV = 1800000,
527 .max_uV = 3000000,
528 .valid_modes_mask = REGULATOR_MODE_NORMAL
529 | REGULATOR_MODE_STANDBY,
530 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
531 | REGULATOR_CHANGE_MODE
532 | REGULATOR_CHANGE_STATUS,
533 },
534 .num_consumer_supplies = 1,
535 .consumer_supplies = &sdp3430_vsim_supply,
536};
537
538/* VDAC for DSS driving S-Video */
539static struct regulator_init_data sdp3430_vdac = {
540 .constraints = {
541 .min_uV = 1800000,
542 .max_uV = 1800000,
543 .apply_uV = true,
544 .valid_modes_mask = REGULATOR_MODE_NORMAL
545 | REGULATOR_MODE_STANDBY,
546 .valid_ops_mask = REGULATOR_CHANGE_MODE
547 | REGULATOR_CHANGE_STATUS,
548 },
549 .num_consumer_supplies = 1,
d9056ce2 550 .consumer_supplies = &sdp3430_vdda_dac_supply,
6fdc29e2
SMK		 551};
552
553/* VPLL2 for digital video outputs */
d9056ce2 554static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
d9056ce2
TV		 555 {
556 .supply = "vdds_dsi",
557 .dev = &sdp3430_dss_device.dev,
558 }
559};
560
6fdc29e2
SMK		 561static struct regulator_init_data sdp3430_vpll2 = {
562 .constraints = {
563 .name = "VDVI",
564 .min_uV = 1800000,
565 .max_uV = 1800000,
d9056ce2 566 .apply_uV = true,
6fdc29e2
SMK		 567 .valid_modes_mask = REGULATOR_MODE_NORMAL
568 | REGULATOR_MODE_STANDBY,
569 .valid_ops_mask = REGULATOR_CHANGE_MODE
570 | REGULATOR_CHANGE_STATUS,
571 },
d9056ce2
TV		 572 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies),
573 .consumer_supplies = sdp3430_vpll2_supplies,
6fdc29e2
SMK		 574};
575
e86fa0b4
PU		 576static struct twl4030_codec_audio_data sdp3430_audio = {
577 .audio_mclk = 26000000,
578};
579
580static struct twl4030_codec_data sdp3430_codec = {
6df74efb 581 .audio_mclk = 26000000,
e86fa0b4
PU		 582 .audio = &sdp3430_audio,
583};
584
6fdc29e2
SMK		 585static struct twl4030_platform_data sdp3430_twldata = {
586 .irq_base = TWL4030_IRQ_BASE,
587 .irq_end = TWL4030_IRQ_END,
588
589 /* platform_data for children goes here */
590 .bci = &sdp3430_bci_data,
591 .gpio = &sdp3430_gpio_data,
592 .madc = &sdp3430_madc_data,
593 .keypad = &sdp3430_kp_data,
594 .usb = &sdp3430_usb_data,
e86fa0b4 595 .codec = &sdp3430_codec,
6fdc29e2
SMK		 596
597 .vaux1 = &sdp3430_vaux1,
598 .vaux2 = &sdp3430_vaux2,
599 .vaux3 = &sdp3430_vaux3,
600 .vaux4 = &sdp3430_vaux4,
601 .vmmc1 = &sdp3430_vmmc1,
602 .vmmc2 = &sdp3430_vmmc2,
603 .vsim = &sdp3430_vsim,
604 .vdac = &sdp3430_vdac,
605 .vpll2 = &sdp3430_vpll2,
606};
607
608static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = {
609 {
610 I2C_BOARD_INFO("twl4030", 0x48),
611 .flags = I2C_CLIENT_WAKE,
612 .irq = INT_34XX_SYS_NIRQ,
613 .platform_data = &sdp3430_twldata,
614 },
615};
616
617static int __init omap3430_i2c_init(void)
618{
619 /* i2c1 for PMIC only */
620 omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo,
621 ARRAY_SIZE(sdp3430_i2c_boardinfo));
622 /* i2c2 on camera connector (for sensor control) and optional isp1301 */
623 omap_register_i2c_bus(2, 400, NULL, 0);
624 /* i2c3 on display connector (for DVI, tfp410) */
625 omap_register_i2c_bus(3, 400, NULL, 0);
626 return 0;
627}
628
1a48e157
TL		 629#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
630
631static struct omap_smc91x_platform_data board_smc91x_data = {
632 .cs = 3,
633 .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
634 IORESOURCE_IRQ_LOWLEVEL,
635};
636
637static void __init board_smc91x_init(void)
638{
639 if (omap_rev() > OMAP3430_REV_ES1_0)
640 board_smc91x_data.gpio_irq = 6;
641 else
642 board_smc91x_data.gpio_irq = 29;
643
644 gpmc_smc91x_init(&board_smc91x_data);
645}
646
647#else
648
649static inline void board_smc91x_init(void)
650{
651}
652
653#endif
654
5110b298
RT		 655static void enable_board_wakeup_source(void)
656{
4896e394
TL		 657 /* T2 interrupt line (keypad) */
658 omap_mux_init_signal("sys_nirq",
659 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
5110b298
RT		 660}
661
6f69a181 662static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
58a5491c
FB		 663
664 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
665 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
666 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
667
668 .phy_reset = true,
669 .reset_gpio_port[0] = 57,
670 .reset_gpio_port[1] = 61,
671 .reset_gpio_port[2] = -EINVAL
672};
673
ca5742bd
TL		 674#ifdef CONFIG_OMAP_MUX
675static struct omap_board_mux board_mux[] __initdata = {
676 { .reg_offset = OMAP_MUX_TERMINATOR },
677};
ca5742bd
TL		 678#endif
679
13d6b73c
SG		 680/*
681 * SDP3430 V2 Board CS organization
682 * Different from SDP3430 V1. Now 4 switches used to specify CS
683 *
684 * See also the Switch S8 settings in the comments.
685 */
686static char chip_sel_3430[][GPMC_CS_NUM] = {
687 {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
688 {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
689 {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
690};
691
88c8460a
VS		 692static struct mtd_partition sdp_nor_partitions[] = {
693 /* bootloader (U-Boot, etc) in first sector */
694 {
695 .name = "Bootloader-NOR",
696 .offset = 0,
697 .size = SZ_256K,
698 .mask_flags = MTD_WRITEABLE, /* force read-only */
699 },
700 /* bootloader params in the next sector */
701 {
702 .name = "Params-NOR",
703 .offset = MTDPART_OFS_APPEND,
704 .size = SZ_256K,
705 .mask_flags = 0,
706 },
707 /* kernel */
708 {
709 .name = "Kernel-NOR",
710 .offset = MTDPART_OFS_APPEND,
711 .size = SZ_2M,
712 .mask_flags = 0
713 },
714 /* file system */
715 {
716 .name = "Filesystem-NOR",
717 .offset = MTDPART_OFS_APPEND,
718 .size = MTDPART_SIZ_FULL,
719 .mask_flags = 0
720 }
721};
722
723static struct mtd_partition sdp_onenand_partitions[] = {
724 {
725 .name = "X-Loader-OneNAND",
726 .offset = 0,
727 .size = 4 * (64 * 2048),
728 .mask_flags = MTD_WRITEABLE /* force read-only */
729 },
730 {
731 .name = "U-Boot-OneNAND",
732 .offset = MTDPART_OFS_APPEND,
733 .size = 2 * (64 * 2048),
734 .mask_flags = MTD_WRITEABLE /* force read-only */
735 },
736 {
737 .name = "U-Boot Environment-OneNAND",
738 .offset = MTDPART_OFS_APPEND,
739 .size = 1 * (64 * 2048),
740 },
741 {
742 .name = "Kernel-OneNAND",
743 .offset = MTDPART_OFS_APPEND,
744 .size = 16 * (64 * 2048),
745 },
746 {
747 .name = "File System-OneNAND",
748 .offset = MTDPART_OFS_APPEND,
749 .size = MTDPART_SIZ_FULL,
750 },
751};
752
753static struct mtd_partition sdp_nand_partitions[] = {
754 /* All the partition sizes are listed in terms of NAND block size */
755 {
756 .name = "X-Loader-NAND",
757 .offset = 0,
758 .size = 4 * (64 * 2048),
759 .mask_flags = MTD_WRITEABLE, /* force read-only */
760 },
761 {
762 .name = "U-Boot-NAND",
763 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
764 .size = 10 * (64 * 2048),
765 .mask_flags = MTD_WRITEABLE, /* force read-only */
766 },
767 {
768 .name = "Boot Env-NAND",
769
770 .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
771 .size = 6 * (64 * 2048),
772 },
773 {
774 .name = "Kernel-NAND",
775 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
776 .size = 40 * (64 * 2048),
777 },
778 {
779 .name = "File System - NAND",
780 .size = MTDPART_SIZ_FULL,
781 .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
782 },
783};
784
785static struct flash_partitions sdp_flash_partitions[] = {
786 {
787 .parts = sdp_nor_partitions,
788 .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
789 },
790 {
791 .parts = sdp_onenand_partitions,
792 .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
793 },
794 {
795 .parts = sdp_nand_partitions,
796 .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
797 },
798};
799
884b8369
MM		 800static struct omap_musb_board_data musb_board_data = {
801 .interface_type = MUSB_INTERFACE_ULPI,
802 .mode = MUSB_OTG,
803 .power = 100,
804};
805
6fdc29e2
SMK		 806static void __init omap_3430sdp_init(void)
807{
ca5742bd 808 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
6fdc29e2
SMK		 809 omap3430_i2c_init();
810 platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
6fdc29e2
SMK		 811 if (omap_rev() > OMAP3430_REV_ES1_0)
812 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
813 else
814 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1;
815 sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
816 spi_register_board_info(sdp3430_spi_board_info,
817 ARRAY_SIZE(sdp3430_spi_board_info));
818 ads7846_dev_init();
819 omap_serial_init();
884b8369 820 usb_musb_init(&musb_board_data);
1a48e157 821 board_smc91x_init();
13d6b73c 822 board_flash_init(sdp_flash_partitions, chip_sel_3430);
d9056ce2 823 sdp3430_display_init();
5110b298 824 enable_board_wakeup_source();
58a5491c 825 usb_ehci_init(&ehci_pdata);
6fdc29e2
SMK		 826}
827
6fdc29e2
SMK		 828MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
829 /* Maintainer: Syed Khasim - Texas Instruments Inc */
6fdc29e2 830 .boot_params = 0x80000100,
71ee7dad 831 .reserve = omap_reserve,
3dc3bad6
RKAL		 832 .map_io = omap3_map_io,
833 .init_early = omap_3430sdp_init_early,
834 .init_irq = omap_init_irq,
6fdc29e2
SMK		 835 .init_machine = omap_3430sdp_init,
836 .timer = &omap_timer,
837MACHINE_END
Linux kernel - Deliverables
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