Commit | Line | Data |
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58e11162 EBS |
1 | /* |
2 | * Copyright (C) 2009 Integration Software and Electronic Engineering. | |
3 | * | |
4 | * Modified from mach-omap2/board-generic.c | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/err.h> | |
16 | #include <linux/clk.h> | |
17 | #include <linux/io.h> | |
18 | #include <linux/gpio.h> | |
19 | #include <linux/interrupt.h> | |
18cbc7d9 | 20 | #include <linux/input.h> |
58e11162 EBS |
21 | |
22 | #include <linux/regulator/machine.h> | |
da07c0cf | 23 | #include <linux/regulator/fixed.h> |
ebeb53e1 | 24 | #include <linux/i2c/twl.h> |
3a63833e | 25 | #include <linux/mmc/host.h> |
58e11162 | 26 | |
a42cf2c6 JMC |
27 | #include <linux/mtd/nand.h> |
28 | ||
58e11162 EBS |
29 | #include <asm/mach-types.h> |
30 | #include <asm/mach/arch.h> | |
31 | ||
a0b38cc4 | 32 | #include <video/omapdss.h> |
dac8eb5f | 33 | #include <video/omap-panel-tfp410.h> |
2203747c | 34 | #include <linux/platform_data/mtd-onenand-omap2.h> |
58e11162 | 35 | |
6d02643d TL |
36 | #include "common.h" |
37 | #include "gpmc.h" | |
ca5742bd | 38 | #include "mux.h" |
d02a900b | 39 | #include "hsmmc.h" |
22f1baac | 40 | #include "sdram-numonyx-m65kxxxxam.h" |
fbd8071c | 41 | #include "common-board-devices.h" |
a42cf2c6 JMC |
42 | #include "board-flash.h" |
43 | #include "control.h" | |
b6ab13e7 | 44 | #include "gpmc-onenand.h" |
58e11162 EBS |
45 | |
46 | #define IGEP2_SMSC911X_CS 5 | |
47 | #define IGEP2_SMSC911X_GPIO 176 | |
48 | #define IGEP2_GPIO_USBH_NRESET 24 | |
5a9fcc99 EBS |
49 | #define IGEP2_GPIO_LED0_GREEN 26 |
50 | #define IGEP2_GPIO_LED0_RED 27 | |
51 | #define IGEP2_GPIO_LED1_RED 28 | |
52 | #define IGEP2_GPIO_DVI_PUP 170 | |
53 | ||
54 | #define IGEP2_RB_GPIO_WIFI_NPD 94 | |
55 | #define IGEP2_RB_GPIO_WIFI_NRESET 95 | |
56 | #define IGEP2_RB_GPIO_BT_NRESET 137 | |
57 | #define IGEP2_RC_GPIO_WIFI_NPD 138 | |
58 | #define IGEP2_RC_GPIO_WIFI_NRESET 139 | |
59 | #define IGEP2_RC_GPIO_BT_NRESET 137 | |
58e11162 | 60 | |
2a60997a MR |
61 | #define IGEP3_GPIO_LED0_GREEN 54 |
62 | #define IGEP3_GPIO_LED0_RED 53 | |
63 | #define IGEP3_GPIO_LED1_RED 16 | |
64 | #define IGEP3_GPIO_USBH_NRESET 183 | |
65 | ||
a42cf2c6 JMC |
66 | #define IGEP_SYSBOOT_MASK 0x1f |
67 | #define IGEP_SYSBOOT_NAND 0x0f | |
68 | #define IGEP_SYSBOOT_ONENAND 0x10 | |
69 | ||
3f8c48d9 EBS |
70 | /* |
71 | * IGEP2 Hardware Revision Table | |
72 | * | |
5a9fcc99 EBS |
73 | * -------------------------------------------------------------------------- |
74 | * | Id. | Hw Rev. | HW0 (28) | WIFI_NPD | WIFI_NRESET | BT_NRESET | | |
75 | * -------------------------------------------------------------------------- | |
76 | * | 0 | B | high | gpio94 | gpio95 | - | | |
77 | * | 0 | B/C (B-compatible) | high | gpio94 | gpio95 | gpio137 | | |
78 | * | 1 | C | low | gpio138 | gpio139 | gpio137 | | |
79 | * -------------------------------------------------------------------------- | |
3f8c48d9 EBS |
80 | */ |
81 | ||
82 | #define IGEP2_BOARD_HWREV_B 0 | |
83 | #define IGEP2_BOARD_HWREV_C 1 | |
2a60997a | 84 | #define IGEP3_BOARD_HWREV 2 |
3f8c48d9 EBS |
85 | |
86 | static u8 hwrev; | |
87 | ||
88 | static void __init igep2_get_revision(void) | |
89 | { | |
90 | u8 ret; | |
91 | ||
2a60997a MR |
92 | if (machine_is_igep0030()) { |
93 | hwrev = IGEP3_BOARD_HWREV; | |
94 | return; | |
95 | } | |
96 | ||
3f8c48d9 EBS |
97 | omap_mux_init_gpio(IGEP2_GPIO_LED1_RED, OMAP_PIN_INPUT); |
98 | ||
bc593f5d | 99 | if (gpio_request_one(IGEP2_GPIO_LED1_RED, GPIOF_IN, "GPIO_HW0_REV")) { |
3f8c48d9 EBS |
100 | pr_warning("IGEP2: Could not obtain gpio GPIO_HW0_REV\n"); |
101 | pr_err("IGEP2: Unknown Hardware Revision\n"); | |
bc593f5d IG |
102 | return; |
103 | } | |
104 | ||
105 | ret = gpio_get_value(IGEP2_GPIO_LED1_RED); | |
106 | if (ret == 0) { | |
107 | pr_info("IGEP2: Hardware Revision C (B-NON compatible)\n"); | |
108 | hwrev = IGEP2_BOARD_HWREV_C; | |
109 | } else if (ret == 1) { | |
110 | pr_info("IGEP2: Hardware Revision B/C (B compatible)\n"); | |
111 | hwrev = IGEP2_BOARD_HWREV_B; | |
112 | } else { | |
113 | pr_err("IGEP2: Unknown Hardware Revision\n"); | |
114 | hwrev = -1; | |
3f8c48d9 EBS |
115 | } |
116 | ||
117 | gpio_free(IGEP2_GPIO_LED1_RED); | |
118 | } | |
58e11162 | 119 | |
a42cf2c6 JMC |
120 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ |
121 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) || \ | |
122 | defined(CONFIG_MTD_NAND_OMAP2) || \ | |
123 | defined(CONFIG_MTD_NAND_OMAP2_MODULE) | |
cddb483a EBS |
124 | |
125 | #define ONENAND_MAP 0x20000000 | |
126 | ||
127 | /* NAND04GR4E1A ( x2 Flash built-in COMBO POP MEMORY ) | |
128 | * Since the device is equipped with two DataRAMs, and two-plane NAND | |
129 | * Flash memory array, these two component enables simultaneous program | |
130 | * of 4KiB. Plane1 has only even blocks such as block0, block2, block4 | |
131 | * while Plane2 has only odd blocks such as block1, block3, block5. | |
132 | * So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048) | |
133 | */ | |
134 | ||
a42cf2c6 | 135 | static struct mtd_partition igep_flash_partitions[] = { |
cddb483a EBS |
136 | { |
137 | .name = "X-Loader", | |
138 | .offset = 0, | |
139 | .size = 2 * (64*(2*2048)) | |
140 | }, | |
141 | { | |
142 | .name = "U-Boot", | |
143 | .offset = MTDPART_OFS_APPEND, | |
144 | .size = 6 * (64*(2*2048)), | |
145 | }, | |
146 | { | |
147 | .name = "Environment", | |
148 | .offset = MTDPART_OFS_APPEND, | |
149 | .size = 2 * (64*(2*2048)), | |
150 | }, | |
151 | { | |
152 | .name = "Kernel", | |
153 | .offset = MTDPART_OFS_APPEND, | |
154 | .size = 12 * (64*(2*2048)), | |
155 | }, | |
156 | { | |
157 | .name = "File System", | |
158 | .offset = MTDPART_OFS_APPEND, | |
159 | .size = MTDPART_SIZ_FULL, | |
160 | }, | |
161 | }; | |
162 | ||
a42cf2c6 JMC |
163 | static inline u32 igep_get_sysboot_value(void) |
164 | { | |
165 | return omap_ctrl_readl(OMAP343X_CONTROL_STATUS) & IGEP_SYSBOOT_MASK; | |
166 | } | |
cddb483a | 167 | |
fdfb03ba | 168 | static void __init igep_flash_init(void) |
cddb483a | 169 | { |
a42cf2c6 JMC |
170 | u32 mux; |
171 | mux = igep_get_sysboot_value(); | |
172 | ||
173 | if (mux == IGEP_SYSBOOT_NAND) { | |
174 | pr_info("IGEP: initializing NAND memory device\n"); | |
175 | board_nand_init(igep_flash_partitions, | |
176 | ARRAY_SIZE(igep_flash_partitions), | |
2e618261 | 177 | 0, NAND_BUSWIDTH_16, nand_default_timings); |
a42cf2c6 JMC |
178 | } else if (mux == IGEP_SYSBOOT_ONENAND) { |
179 | pr_info("IGEP: initializing OneNAND memory device\n"); | |
180 | board_onenand_init(igep_flash_partitions, | |
181 | ARRAY_SIZE(igep_flash_partitions), 0); | |
182 | } else { | |
183 | pr_err("IGEP: Flash: unsupported sysboot sequence found\n"); | |
cddb483a | 184 | } |
cddb483a EBS |
185 | } |
186 | ||
187 | #else | |
fdfb03ba | 188 | static void __init igep_flash_init(void) {} |
cddb483a EBS |
189 | #endif |
190 | ||
58e11162 EBS |
191 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
192 | ||
193 | #include <linux/smsc911x.h> | |
ac839b3c | 194 | #include "gpmc-smsc911x.h" |
58e11162 | 195 | |
21b42731 MR |
196 | static struct omap_smsc911x_platform_data smsc911x_cfg = { |
197 | .cs = IGEP2_SMSC911X_CS, | |
198 | .gpio_irq = IGEP2_SMSC911X_GPIO, | |
199 | .gpio_reset = -EINVAL, | |
200 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS, | |
58e11162 EBS |
201 | }; |
202 | ||
203 | static inline void __init igep2_init_smsc911x(void) | |
204 | { | |
21b42731 | 205 | gpmc_smsc911x_init(&smsc911x_cfg); |
58e11162 EBS |
206 | } |
207 | ||
208 | #else | |
209 | static inline void __init igep2_init_smsc911x(void) { } | |
210 | #endif | |
211 | ||
786b01a8 OD |
212 | static struct regulator_consumer_supply igep_vmmc1_supply[] = { |
213 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | |
214 | }; | |
58e11162 EBS |
215 | |
216 | /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ | |
fdfb03ba | 217 | static struct regulator_init_data igep_vmmc1 = { |
58e11162 EBS |
218 | .constraints = { |
219 | .min_uV = 1850000, | |
220 | .max_uV = 3150000, | |
221 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
222 | | REGULATOR_MODE_STANDBY, | |
223 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
224 | | REGULATOR_CHANGE_MODE | |
225 | | REGULATOR_CHANGE_STATUS, | |
226 | }, | |
786b01a8 OD |
227 | .num_consumer_supplies = ARRAY_SIZE(igep_vmmc1_supply), |
228 | .consumer_supplies = igep_vmmc1_supply, | |
58e11162 EBS |
229 | }; |
230 | ||
786b01a8 OD |
231 | static struct regulator_consumer_supply igep_vio_supply[] = { |
232 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"), | |
233 | }; | |
da07c0cf | 234 | |
fdfb03ba | 235 | static struct regulator_init_data igep_vio = { |
da07c0cf MZ |
236 | .constraints = { |
237 | .min_uV = 1800000, | |
238 | .max_uV = 1800000, | |
239 | .apply_uV = 1, | |
240 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
241 | | REGULATOR_MODE_STANDBY, | |
242 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
243 | | REGULATOR_CHANGE_MODE | |
244 | | REGULATOR_CHANGE_STATUS, | |
245 | }, | |
786b01a8 OD |
246 | .num_consumer_supplies = ARRAY_SIZE(igep_vio_supply), |
247 | .consumer_supplies = igep_vio_supply, | |
da07c0cf MZ |
248 | }; |
249 | ||
786b01a8 OD |
250 | static struct regulator_consumer_supply igep_vmmc2_supply[] = { |
251 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), | |
252 | }; | |
da07c0cf | 253 | |
fdfb03ba | 254 | static struct regulator_init_data igep_vmmc2 = { |
da07c0cf MZ |
255 | .constraints = { |
256 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | |
257 | .always_on = 1, | |
258 | }, | |
786b01a8 OD |
259 | .num_consumer_supplies = ARRAY_SIZE(igep_vmmc2_supply), |
260 | .consumer_supplies = igep_vmmc2_supply, | |
da07c0cf MZ |
261 | }; |
262 | ||
fdfb03ba | 263 | static struct fixed_voltage_config igep_vwlan = { |
da07c0cf MZ |
264 | .supply_name = "vwlan", |
265 | .microvolts = 3300000, | |
266 | .gpio = -EINVAL, | |
267 | .enabled_at_boot = 1, | |
fdfb03ba | 268 | .init_data = &igep_vmmc2, |
da07c0cf MZ |
269 | }; |
270 | ||
fdfb03ba | 271 | static struct platform_device igep_vwlan_device = { |
da07c0cf MZ |
272 | .name = "reg-fixed-voltage", |
273 | .id = 0, | |
274 | .dev = { | |
fdfb03ba | 275 | .platform_data = &igep_vwlan, |
da07c0cf MZ |
276 | }, |
277 | }; | |
278 | ||
68ff0423 | 279 | static struct omap2_hsmmc_info mmc[] = { |
58e11162 EBS |
280 | { |
281 | .mmc = 1, | |
3a63833e | 282 | .caps = MMC_CAP_4_BIT_DATA, |
58e11162 EBS |
283 | .gpio_cd = -EINVAL, |
284 | .gpio_wp = -EINVAL, | |
3b972bf0 | 285 | .deferred = true, |
58e11162 | 286 | }, |
5a9fcc99 | 287 | #if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE) |
58e11162 EBS |
288 | { |
289 | .mmc = 2, | |
3a63833e | 290 | .caps = MMC_CAP_4_BIT_DATA, |
58e11162 EBS |
291 | .gpio_cd = -EINVAL, |
292 | .gpio_wp = -EINVAL, | |
293 | }, | |
5a9fcc99 | 294 | #endif |
58e11162 EBS |
295 | {} /* Terminator */ |
296 | }; | |
297 | ||
bee15390 EBS |
298 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) |
299 | #include <linux/leds.h> | |
300 | ||
fdfb03ba | 301 | static struct gpio_led igep_gpio_leds[] = { |
bee15390 EBS |
302 | [0] = { |
303 | .name = "gpio-led:red:d0", | |
bee15390 EBS |
304 | .default_trigger = "default-off" |
305 | }, | |
306 | [1] = { | |
307 | .name = "gpio-led:green:d0", | |
bee15390 EBS |
308 | .default_trigger = "default-off", |
309 | }, | |
310 | [2] = { | |
311 | .name = "gpio-led:red:d1", | |
bee15390 EBS |
312 | .default_trigger = "default-off", |
313 | }, | |
314 | [3] = { | |
315 | .name = "gpio-led:green:d1", | |
316 | .default_trigger = "heartbeat", | |
317 | .gpio = -EINVAL, /* gets replaced */ | |
70e77760 | 318 | .active_low = 1, |
bee15390 EBS |
319 | }, |
320 | }; | |
321 | ||
fdfb03ba MR |
322 | static struct gpio_led_platform_data igep_led_pdata = { |
323 | .leds = igep_gpio_leds, | |
324 | .num_leds = ARRAY_SIZE(igep_gpio_leds), | |
bee15390 EBS |
325 | }; |
326 | ||
fdfb03ba | 327 | static struct platform_device igep_led_device = { |
bee15390 EBS |
328 | .name = "leds-gpio", |
329 | .id = -1, | |
330 | .dev = { | |
fdfb03ba | 331 | .platform_data = &igep_led_pdata, |
bee15390 EBS |
332 | }, |
333 | }; | |
334 | ||
fdfb03ba | 335 | static void __init igep_leds_init(void) |
bee15390 | 336 | { |
2a60997a MR |
337 | if (machine_is_igep0020()) { |
338 | igep_gpio_leds[0].gpio = IGEP2_GPIO_LED0_RED; | |
339 | igep_gpio_leds[1].gpio = IGEP2_GPIO_LED0_GREEN; | |
340 | igep_gpio_leds[2].gpio = IGEP2_GPIO_LED1_RED; | |
341 | } else { | |
342 | igep_gpio_leds[0].gpio = IGEP3_GPIO_LED0_RED; | |
343 | igep_gpio_leds[1].gpio = IGEP3_GPIO_LED0_GREEN; | |
344 | igep_gpio_leds[2].gpio = IGEP3_GPIO_LED1_RED; | |
345 | } | |
0d4ab9a5 | 346 | |
fdfb03ba | 347 | platform_device_register(&igep_led_device); |
bee15390 EBS |
348 | } |
349 | ||
350 | #else | |
fdfb03ba | 351 | static struct gpio igep_gpio_leds[] __initdata = { |
2a60997a MR |
352 | { -EINVAL, GPIOF_OUT_INIT_LOW, "gpio-led:red:d0" }, |
353 | { -EINVAL, GPIOF_OUT_INIT_LOW, "gpio-led:green:d0" }, | |
354 | { -EINVAL, GPIOF_OUT_INIT_LOW, "gpio-led:red:d1" }, | |
bc593f5d IG |
355 | }; |
356 | ||
fdfb03ba | 357 | static inline void igep_leds_init(void) |
bee15390 | 358 | { |
0d4ab9a5 | 359 | int i; |
bee15390 | 360 | |
2a60997a MR |
361 | if (machine_is_igep0020()) { |
362 | igep_gpio_leds[0].gpio = IGEP2_GPIO_LED0_RED; | |
363 | igep_gpio_leds[1].gpio = IGEP2_GPIO_LED0_GREEN; | |
364 | igep_gpio_leds[2].gpio = IGEP2_GPIO_LED1_RED; | |
365 | } else { | |
366 | igep_gpio_leds[0].gpio = IGEP3_GPIO_LED0_RED; | |
367 | igep_gpio_leds[1].gpio = IGEP3_GPIO_LED0_GREEN; | |
368 | igep_gpio_leds[2].gpio = IGEP3_GPIO_LED1_RED; | |
369 | } | |
bee15390 | 370 | |
fdfb03ba | 371 | if (gpio_request_array(igep_gpio_leds, ARRAY_SIZE(igep_gpio_leds))) { |
bc593f5d IG |
372 | pr_warning("IGEP v2: Could not obtain leds gpios\n"); |
373 | return; | |
374 | } | |
bee15390 | 375 | |
0d4ab9a5 MR |
376 | for (i = 0; i < ARRAY_SIZE(igep_gpio_leds); i++) |
377 | gpio_export(igep_gpio_leds[i].gpio, 0); | |
bee15390 EBS |
378 | } |
379 | #endif | |
380 | ||
bc593f5d IG |
381 | static struct gpio igep2_twl_gpios[] = { |
382 | { -EINVAL, GPIOF_IN, "GPIO_EHCI_NOC" }, | |
383 | { -EINVAL, GPIOF_OUT_INIT_LOW, "GPIO_USBH_CPEN" }, | |
384 | }; | |
385 | ||
fdfb03ba | 386 | static int igep_twl_gpio_setup(struct device *dev, |
58e11162 EBS |
387 | unsigned gpio, unsigned ngpio) |
388 | { | |
bc593f5d IG |
389 | int ret; |
390 | ||
58e11162 EBS |
391 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ |
392 | mmc[0].gpio_cd = gpio + 0; | |
3b972bf0 | 393 | omap_hsmmc_late_init(mmc); |
58e11162 | 394 | |
bee15390 EBS |
395 | /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */ |
396 | #if !defined(CONFIG_LEDS_GPIO) && !defined(CONFIG_LEDS_GPIO_MODULE) | |
0d4ab9a5 MR |
397 | ret = gpio_request_one(gpio + TWL4030_GPIO_MAX + 1, GPIOF_OUT_INIT_HIGH, |
398 | "gpio-led:green:d1"); | |
399 | if (ret == 0) | |
bee15390 | 400 | gpio_export(gpio + TWL4030_GPIO_MAX + 1, 0); |
62d8e9e2 | 401 | else |
0d4ab9a5 | 402 | pr_warning("IGEP: Could not obtain gpio GPIO_LED1_GREEN\n"); |
bee15390 | 403 | #else |
0d4ab9a5 | 404 | igep_gpio_leds[3].gpio = gpio + TWL4030_GPIO_MAX + 1; |
bee15390 | 405 | #endif |
58e11162 | 406 | |
2a60997a MR |
407 | if (machine_is_igep0030()) |
408 | return 0; | |
409 | ||
61e118dd EBS |
410 | /* |
411 | * REVISIT: need ehci-omap hooks for external VBUS | |
412 | * power switch and overcurrent detect | |
413 | */ | |
bc593f5d | 414 | igep2_twl_gpios[0].gpio = gpio + 1; |
61e118dd | 415 | |
bc593f5d IG |
416 | /* TWL4030_GPIO_MAX + 0 == ledA, GPIO_USBH_CPEN (out, active low) */ |
417 | igep2_twl_gpios[1].gpio = gpio + TWL4030_GPIO_MAX; | |
418 | ||
419 | ret = gpio_request_array(igep2_twl_gpios, ARRAY_SIZE(igep2_twl_gpios)); | |
420 | if (ret < 0) | |
61e118dd EBS |
421 | pr_err("IGEP2: Could not obtain gpio for USBH_CPEN"); |
422 | ||
58e11162 EBS |
423 | return 0; |
424 | }; | |
425 | ||
fdfb03ba | 426 | static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = { |
bee15390 | 427 | .use_leds = true, |
fdfb03ba | 428 | .setup = igep_twl_gpio_setup, |
58e11162 EBS |
429 | }; |
430 | ||
2e6f2ee7 | 431 | static struct tfp410_platform_data dvi_panel = { |
e813a55e TV |
432 | .i2c_bus_num = 3, |
433 | .power_down_gpio = IGEP2_GPIO_DVI_PUP, | |
89747c91 BW |
434 | }; |
435 | ||
691de27f EBS |
436 | static struct omap_dss_device igep2_dvi_device = { |
437 | .type = OMAP_DISPLAY_TYPE_DPI, | |
438 | .name = "dvi", | |
2e6f2ee7 | 439 | .driver_name = "tfp410", |
89747c91 | 440 | .data = &dvi_panel, |
691de27f | 441 | .phy.dpi.data_lines = 24, |
691de27f EBS |
442 | }; |
443 | ||
444 | static struct omap_dss_device *igep2_dss_devices[] = { | |
445 | &igep2_dvi_device | |
446 | }; | |
447 | ||
448 | static struct omap_dss_board_info igep2_dss_data = { | |
449 | .num_devices = ARRAY_SIZE(igep2_dss_devices), | |
450 | .devices = igep2_dss_devices, | |
451 | .default_device = &igep2_dvi_device, | |
452 | }; | |
453 | ||
fdfb03ba MR |
454 | static struct platform_device *igep_devices[] __initdata = { |
455 | &igep_vwlan_device, | |
691de27f EBS |
456 | }; |
457 | ||
18cbc7d9 EBS |
458 | static int igep2_keymap[] = { |
459 | KEY(0, 0, KEY_LEFT), | |
460 | KEY(0, 1, KEY_RIGHT), | |
461 | KEY(0, 2, KEY_A), | |
462 | KEY(0, 3, KEY_B), | |
463 | KEY(1, 0, KEY_DOWN), | |
464 | KEY(1, 1, KEY_UP), | |
465 | KEY(1, 2, KEY_E), | |
466 | KEY(1, 3, KEY_F), | |
467 | KEY(2, 0, KEY_ENTER), | |
468 | KEY(2, 1, KEY_I), | |
469 | KEY(2, 2, KEY_J), | |
470 | KEY(2, 3, KEY_K), | |
471 | KEY(3, 0, KEY_M), | |
472 | KEY(3, 1, KEY_N), | |
473 | KEY(3, 2, KEY_O), | |
474 | KEY(3, 3, KEY_P) | |
475 | }; | |
476 | ||
477 | static struct matrix_keymap_data igep2_keymap_data = { | |
478 | .keymap = igep2_keymap, | |
479 | .keymap_size = ARRAY_SIZE(igep2_keymap), | |
480 | }; | |
481 | ||
482 | static struct twl4030_keypad_data igep2_keypad_pdata = { | |
483 | .keymap_data = &igep2_keymap_data, | |
484 | .rows = 4, | |
485 | .cols = 4, | |
486 | .rep = 1, | |
487 | }; | |
488 | ||
fdfb03ba | 489 | static struct twl4030_platform_data igep_twldata = { |
58e11162 | 490 | /* platform_data for children goes here */ |
fdfb03ba | 491 | .gpio = &igep_twl4030_gpio_pdata, |
fdfb03ba | 492 | .vmmc1 = &igep_vmmc1, |
fdfb03ba | 493 | .vio = &igep_vio, |
58e11162 EBS |
494 | }; |
495 | ||
91d139cf EBS |
496 | static struct i2c_board_info __initdata igep2_i2c3_boardinfo[] = { |
497 | { | |
498 | I2C_BOARD_INFO("eeprom", 0x50), | |
499 | }, | |
500 | }; | |
501 | ||
fdfb03ba | 502 | static void __init igep_i2c_init(void) |
58e11162 | 503 | { |
91d139cf EBS |
504 | int ret; |
505 | ||
b2f44dc2 LP |
506 | omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_USB, |
507 | TWL_COMMON_REGULATOR_VPLL2); | |
508 | igep_twldata.vpll2->constraints.apply_uV = true; | |
509 | igep_twldata.vpll2->constraints.name = "VDVI"; | |
827ed9ae | 510 | |
2a60997a MR |
511 | if (machine_is_igep0020()) { |
512 | /* | |
513 | * Bus 3 is attached to the DVI port where devices like the | |
514 | * pico DLP projector don't work reliably with 400kHz | |
515 | */ | |
516 | ret = omap_register_i2c_bus(3, 100, igep2_i2c3_boardinfo, | |
517 | ARRAY_SIZE(igep2_i2c3_boardinfo)); | |
518 | if (ret) | |
519 | pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret); | |
520 | ||
2a60997a | 521 | igep_twldata.keypad = &igep2_keypad_pdata; |
b252b0ef | 522 | /* Get common pmic data */ |
b2f44dc2 | 523 | omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO, 0); |
2a60997a | 524 | } |
91d139cf | 525 | |
0d4ab9a5 | 526 | omap3_pmic_init("twl4030", &igep_twldata); |
58e11162 EBS |
527 | } |
528 | ||
fdfb03ba | 529 | static const struct usbhs_omap_board_data igep2_usbhs_bdata __initconst = { |
181b250c KM |
530 | .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, |
531 | .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED, | |
532 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, | |
d0885486 EBS |
533 | |
534 | .phy_reset = true, | |
f6b74535 EBS |
535 | .reset_gpio_port[0] = IGEP2_GPIO_USBH_NRESET, |
536 | .reset_gpio_port[1] = -EINVAL, | |
d0885486 EBS |
537 | .reset_gpio_port[2] = -EINVAL, |
538 | }; | |
539 | ||
2a60997a MR |
540 | static const struct usbhs_omap_board_data igep3_usbhs_bdata __initconst = { |
541 | .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED, | |
542 | .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, | |
543 | .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED, | |
544 | ||
545 | .phy_reset = true, | |
546 | .reset_gpio_port[0] = -EINVAL, | |
547 | .reset_gpio_port[1] = IGEP3_GPIO_USBH_NRESET, | |
548 | .reset_gpio_port[2] = -EINVAL, | |
549 | }; | |
550 | ||
ca5742bd TL |
551 | #ifdef CONFIG_OMAP_MUX |
552 | static struct omap_board_mux board_mux[] __initdata = { | |
a71eb61c JMC |
553 | /* SMSC9221 LAN Controller ETH IRQ (GPIO_176) */ |
554 | OMAP3_MUX(MCSPI1_CS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), | |
ca5742bd TL |
555 | { .reg_offset = OMAP_MUX_TERMINATOR }, |
556 | }; | |
ca5742bd TL |
557 | #endif |
558 | ||
5a9fcc99 | 559 | #if defined(CONFIG_LIBERTAS_SDIO) || defined(CONFIG_LIBERTAS_SDIO_MODULE) |
fdfb03ba | 560 | static struct gpio igep_wlan_bt_gpios[] __initdata = { |
bc593f5d IG |
561 | { -EINVAL, GPIOF_OUT_INIT_HIGH, "GPIO_WIFI_NPD" }, |
562 | { -EINVAL, GPIOF_OUT_INIT_HIGH, "GPIO_WIFI_NRESET" }, | |
563 | { -EINVAL, GPIOF_OUT_INIT_HIGH, "GPIO_BT_NRESET" }, | |
564 | }; | |
5a9fcc99 | 565 | |
fdfb03ba | 566 | static void __init igep_wlan_bt_init(void) |
5a9fcc99 | 567 | { |
bc593f5d | 568 | int err; |
5a9fcc99 EBS |
569 | |
570 | /* GPIO's for WLAN-BT combo depends on hardware revision */ | |
571 | if (hwrev == IGEP2_BOARD_HWREV_B) { | |
fdfb03ba MR |
572 | igep_wlan_bt_gpios[0].gpio = IGEP2_RB_GPIO_WIFI_NPD; |
573 | igep_wlan_bt_gpios[1].gpio = IGEP2_RB_GPIO_WIFI_NRESET; | |
574 | igep_wlan_bt_gpios[2].gpio = IGEP2_RB_GPIO_BT_NRESET; | |
2a60997a | 575 | } else if (hwrev == IGEP2_BOARD_HWREV_C || machine_is_igep0030()) { |
fdfb03ba MR |
576 | igep_wlan_bt_gpios[0].gpio = IGEP2_RC_GPIO_WIFI_NPD; |
577 | igep_wlan_bt_gpios[1].gpio = IGEP2_RC_GPIO_WIFI_NRESET; | |
578 | igep_wlan_bt_gpios[2].gpio = IGEP2_RC_GPIO_BT_NRESET; | |
5a9fcc99 EBS |
579 | } else |
580 | return; | |
581 | ||
cbf6bae1 AH |
582 | /* Make sure that the GPIO pins are muxed correctly */ |
583 | omap_mux_init_gpio(igep_wlan_bt_gpios[0].gpio, OMAP_PIN_OUTPUT); | |
584 | omap_mux_init_gpio(igep_wlan_bt_gpios[1].gpio, OMAP_PIN_OUTPUT); | |
585 | omap_mux_init_gpio(igep_wlan_bt_gpios[2].gpio, OMAP_PIN_OUTPUT); | |
586 | ||
fdfb03ba MR |
587 | err = gpio_request_array(igep_wlan_bt_gpios, |
588 | ARRAY_SIZE(igep_wlan_bt_gpios)); | |
bc593f5d IG |
589 | if (err) { |
590 | pr_warning("IGEP2: Could not obtain WIFI/BT gpios\n"); | |
591 | return; | |
592 | } | |
593 | ||
fdfb03ba MR |
594 | gpio_export(igep_wlan_bt_gpios[0].gpio, 0); |
595 | gpio_export(igep_wlan_bt_gpios[1].gpio, 0); | |
596 | gpio_export(igep_wlan_bt_gpios[2].gpio, 0); | |
bc593f5d | 597 | |
fdfb03ba | 598 | gpio_set_value(igep_wlan_bt_gpios[1].gpio, 0); |
bc593f5d | 599 | udelay(10); |
fdfb03ba | 600 | gpio_set_value(igep_wlan_bt_gpios[1].gpio, 1); |
5a9fcc99 | 601 | |
5a9fcc99 EBS |
602 | } |
603 | #else | |
fdfb03ba | 604 | static inline void __init igep_wlan_bt_init(void) { } |
5a9fcc99 EBS |
605 | #endif |
606 | ||
5b3689f4 RD |
607 | static struct regulator_consumer_supply dummy_supplies[] = { |
608 | REGULATOR_SUPPLY("vddvario", "smsc911x.0"), | |
609 | REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), | |
610 | }; | |
611 | ||
fdfb03ba | 612 | static void __init igep_init(void) |
58e11162 | 613 | { |
1a21932e | 614 | regulator_register_fixed(1, dummy_supplies, ARRAY_SIZE(dummy_supplies)); |
ca5742bd | 615 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
3f8c48d9 EBS |
616 | |
617 | /* Get IGEP2 hardware revision */ | |
618 | igep2_get_revision(); | |
3b972bf0 TL |
619 | |
620 | omap_hsmmc_init(mmc); | |
621 | ||
91d139cf | 622 | /* Register I2C busses and drivers */ |
fdfb03ba MR |
623 | igep_i2c_init(); |
624 | platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices)); | |
58e11162 | 625 | omap_serial_init(); |
a4ca9dbe TL |
626 | omap_sdrc_init(m65kxxxxam_sdrc_params, |
627 | m65kxxxxam_sdrc_params); | |
9e18630b | 628 | usb_musb_init(NULL); |
58e11162 | 629 | |
fdfb03ba MR |
630 | igep_flash_init(); |
631 | igep_leds_init(); | |
ac51c90f | 632 | omap_twl4030_audio_init("igep2"); |
58e11162 | 633 | |
5a9fcc99 | 634 | /* |
25985edc | 635 | * WLAN-BT combo module from MuRata which has a Marvell WLAN |
5a9fcc99 EBS |
636 | * (88W8686) + CSR Bluetooth chipset. Uses SDIO interface. |
637 | */ | |
fdfb03ba | 638 | igep_wlan_bt_init(); |
c67b0d98 | 639 | |
2a60997a MR |
640 | if (machine_is_igep0020()) { |
641 | omap_display_init(&igep2_dss_data); | |
2a60997a MR |
642 | igep2_init_smsc911x(); |
643 | usbhs_init(&igep2_usbhs_bdata); | |
644 | } else { | |
645 | usbhs_init(&igep3_usbhs_bdata); | |
646 | } | |
58e11162 EBS |
647 | } |
648 | ||
58e11162 | 649 | MACHINE_START(IGEP0020, "IGEP v2 board") |
5e52b435 | 650 | .atag_offset = 0x100, |
71ee7dad | 651 | .reserve = omap_reserve, |
3dc3bad6 | 652 | .map_io = omap3_map_io, |
8f5b5a41 | 653 | .init_early = omap35xx_init_early, |
741e3a89 | 654 | .init_irq = omap3_init_irq, |
6b2f55d7 | 655 | .handle_irq = omap3_intc_handle_irq, |
fdfb03ba | 656 | .init_machine = igep_init, |
bbd707ac | 657 | .init_late = omap35xx_init_late, |
6bb27d73 | 658 | .init_time = omap3_sync32k_timer_init, |
187e3e06 | 659 | .restart = omap3xxx_restart, |
58e11162 | 660 | MACHINE_END |
2a60997a MR |
661 | |
662 | MACHINE_START(IGEP0030, "IGEP OMAP3 module") | |
5e52b435 | 663 | .atag_offset = 0x100, |
2a60997a MR |
664 | .reserve = omap_reserve, |
665 | .map_io = omap3_map_io, | |
8f5b5a41 | 666 | .init_early = omap35xx_init_early, |
741e3a89 | 667 | .init_irq = omap3_init_irq, |
6b2f55d7 | 668 | .handle_irq = omap3_intc_handle_irq, |
2a60997a | 669 | .init_machine = igep_init, |
bbd707ac | 670 | .init_late = omap35xx_init_late, |
6bb27d73 | 671 | .init_time = omap3_sync32k_timer_init, |
187e3e06 | 672 | .restart = omap3xxx_restart, |
58e11162 | 673 | MACHINE_END |