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58e11162 EBS |
1 | /* |
2 | * Copyright (C) 2009 Integration Software and Electronic Engineering. | |
3 | * | |
4 | * Modified from mach-omap2/board-generic.c | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/err.h> | |
16 | #include <linux/clk.h> | |
17 | #include <linux/io.h> | |
18 | #include <linux/gpio.h> | |
19 | #include <linux/interrupt.h> | |
20 | ||
21 | #include <linux/regulator/machine.h> | |
ebeb53e1 | 22 | #include <linux/i2c/twl.h> |
58e11162 EBS |
23 | |
24 | #include <asm/mach-types.h> | |
25 | #include <asm/mach/arch.h> | |
26 | ||
27 | #include <plat/board.h> | |
28 | #include <plat/common.h> | |
29 | #include <plat/gpmc.h> | |
58e11162 | 30 | #include <plat/usb.h> |
691de27f | 31 | #include <plat/display.h> |
cddb483a | 32 | #include <plat/onenand.h> |
58e11162 | 33 | |
ca5742bd | 34 | #include "mux.h" |
d02a900b | 35 | #include "hsmmc.h" |
58e11162 EBS |
36 | |
37 | #define IGEP2_SMSC911X_CS 5 | |
38 | #define IGEP2_SMSC911X_GPIO 176 | |
39 | #define IGEP2_GPIO_USBH_NRESET 24 | |
40 | #define IGEP2_GPIO_LED0_RED 26 | |
41 | #define IGEP2_GPIO_LED0_GREEN 27 | |
42 | #define IGEP2_GPIO_LED1_RED 28 | |
691de27f | 43 | #define IGEP2_GPIO_DVI_PUP 170 |
58e11162 | 44 | |
cddb483a EBS |
45 | #if defined(CONFIG_MTD_ONENAND_OMAP2) || \ |
46 | defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) | |
47 | ||
48 | #define ONENAND_MAP 0x20000000 | |
49 | ||
50 | /* NAND04GR4E1A ( x2 Flash built-in COMBO POP MEMORY ) | |
51 | * Since the device is equipped with two DataRAMs, and two-plane NAND | |
52 | * Flash memory array, these two component enables simultaneous program | |
53 | * of 4KiB. Plane1 has only even blocks such as block0, block2, block4 | |
54 | * while Plane2 has only odd blocks such as block1, block3, block5. | |
55 | * So MTD regards it as 4KiB page size and 256KiB block size 64*(2*2048) | |
56 | */ | |
57 | ||
58 | static struct mtd_partition igep2_onenand_partitions[] = { | |
59 | { | |
60 | .name = "X-Loader", | |
61 | .offset = 0, | |
62 | .size = 2 * (64*(2*2048)) | |
63 | }, | |
64 | { | |
65 | .name = "U-Boot", | |
66 | .offset = MTDPART_OFS_APPEND, | |
67 | .size = 6 * (64*(2*2048)), | |
68 | }, | |
69 | { | |
70 | .name = "Environment", | |
71 | .offset = MTDPART_OFS_APPEND, | |
72 | .size = 2 * (64*(2*2048)), | |
73 | }, | |
74 | { | |
75 | .name = "Kernel", | |
76 | .offset = MTDPART_OFS_APPEND, | |
77 | .size = 12 * (64*(2*2048)), | |
78 | }, | |
79 | { | |
80 | .name = "File System", | |
81 | .offset = MTDPART_OFS_APPEND, | |
82 | .size = MTDPART_SIZ_FULL, | |
83 | }, | |
84 | }; | |
85 | ||
86 | static int igep2_onenand_setup(void __iomem *onenand_base, int freq) | |
87 | { | |
88 | /* nothing is required to be setup for onenand as of now */ | |
89 | return 0; | |
90 | } | |
91 | ||
92 | static struct omap_onenand_platform_data igep2_onenand_data = { | |
93 | .parts = igep2_onenand_partitions, | |
94 | .nr_parts = ARRAY_SIZE(igep2_onenand_partitions), | |
95 | .onenand_setup = igep2_onenand_setup, | |
96 | .dma_channel = -1, /* disable DMA in OMAP OneNAND driver */ | |
97 | }; | |
98 | ||
99 | static struct platform_device igep2_onenand_device = { | |
100 | .name = "omap2-onenand", | |
101 | .id = -1, | |
102 | .dev = { | |
103 | .platform_data = &igep2_onenand_data, | |
104 | }, | |
105 | }; | |
106 | ||
107 | void __init igep2_flash_init(void) | |
108 | { | |
109 | u8 cs = 0; | |
110 | u8 onenandcs = GPMC_CS_NUM + 1; | |
111 | ||
112 | while (cs < GPMC_CS_NUM) { | |
113 | u32 ret = 0; | |
114 | ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1); | |
115 | ||
116 | /* Check if NAND/oneNAND is configured */ | |
117 | if ((ret & 0xC00) == 0x800) | |
118 | /* NAND found */ | |
119 | pr_err("IGEP v2: Unsupported NAND found\n"); | |
120 | else { | |
121 | ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); | |
122 | if ((ret & 0x3F) == (ONENAND_MAP >> 24)) | |
123 | /* ONENAND found */ | |
124 | onenandcs = cs; | |
125 | } | |
126 | cs++; | |
127 | } | |
128 | if (onenandcs > GPMC_CS_NUM) { | |
129 | pr_err("IGEP v2: Unable to find configuration in GPMC\n"); | |
130 | return; | |
131 | } | |
132 | ||
133 | if (onenandcs < GPMC_CS_NUM) { | |
134 | igep2_onenand_data.cs = onenandcs; | |
135 | if (platform_device_register(&igep2_onenand_device) < 0) | |
136 | pr_err("IGEP v2: Unable to register OneNAND device\n"); | |
137 | } | |
138 | } | |
139 | ||
140 | #else | |
141 | void __init igep2_flash_init(void) {} | |
142 | #endif | |
143 | ||
58e11162 EBS |
144 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) |
145 | ||
146 | #include <linux/smsc911x.h> | |
147 | ||
148 | static struct smsc911x_platform_config igep2_smsc911x_config = { | |
149 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | |
150 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, | |
151 | .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS , | |
152 | .phy_interface = PHY_INTERFACE_MODE_MII, | |
153 | }; | |
154 | ||
155 | static struct resource igep2_smsc911x_resources[] = { | |
156 | { | |
157 | .flags = IORESOURCE_MEM, | |
158 | }, | |
159 | { | |
160 | .start = OMAP_GPIO_IRQ(IGEP2_SMSC911X_GPIO), | |
161 | .end = OMAP_GPIO_IRQ(IGEP2_SMSC911X_GPIO), | |
162 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL, | |
163 | }, | |
164 | }; | |
165 | ||
166 | static struct platform_device igep2_smsc911x_device = { | |
167 | .name = "smsc911x", | |
168 | .id = 0, | |
169 | .num_resources = ARRAY_SIZE(igep2_smsc911x_resources), | |
170 | .resource = igep2_smsc911x_resources, | |
171 | .dev = { | |
172 | .platform_data = &igep2_smsc911x_config, | |
173 | }, | |
174 | }; | |
175 | ||
176 | static inline void __init igep2_init_smsc911x(void) | |
177 | { | |
178 | unsigned long cs_mem_base; | |
179 | ||
180 | if (gpmc_cs_request(IGEP2_SMSC911X_CS, SZ_16M, &cs_mem_base) < 0) { | |
181 | pr_err("IGEP v2: Failed request for GPMC mem for smsc911x\n"); | |
182 | gpmc_cs_free(IGEP2_SMSC911X_CS); | |
183 | return; | |
184 | } | |
185 | ||
186 | igep2_smsc911x_resources[0].start = cs_mem_base + 0x0; | |
187 | igep2_smsc911x_resources[0].end = cs_mem_base + 0xff; | |
188 | ||
189 | if ((gpio_request(IGEP2_SMSC911X_GPIO, "SMSC911X IRQ") == 0) && | |
190 | (gpio_direction_input(IGEP2_SMSC911X_GPIO) == 0)) { | |
191 | gpio_export(IGEP2_SMSC911X_GPIO, 0); | |
192 | } else { | |
193 | pr_err("IGEP v2: Could not obtain gpio for for SMSC911X IRQ\n"); | |
194 | return; | |
195 | } | |
196 | ||
197 | platform_device_register(&igep2_smsc911x_device); | |
198 | } | |
199 | ||
200 | #else | |
201 | static inline void __init igep2_init_smsc911x(void) { } | |
202 | #endif | |
203 | ||
204 | static struct omap_board_config_kernel igep2_config[] __initdata = { | |
205 | }; | |
206 | ||
207 | static struct regulator_consumer_supply igep2_vmmc1_supply = { | |
208 | .supply = "vmmc", | |
209 | }; | |
210 | ||
211 | /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ | |
212 | static struct regulator_init_data igep2_vmmc1 = { | |
213 | .constraints = { | |
214 | .min_uV = 1850000, | |
215 | .max_uV = 3150000, | |
216 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
217 | | REGULATOR_MODE_STANDBY, | |
218 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | |
219 | | REGULATOR_CHANGE_MODE | |
220 | | REGULATOR_CHANGE_STATUS, | |
221 | }, | |
222 | .num_consumer_supplies = 1, | |
223 | .consumer_supplies = &igep2_vmmc1_supply, | |
224 | }; | |
225 | ||
68ff0423 | 226 | static struct omap2_hsmmc_info mmc[] = { |
58e11162 EBS |
227 | { |
228 | .mmc = 1, | |
229 | .wires = 4, | |
230 | .gpio_cd = -EINVAL, | |
231 | .gpio_wp = -EINVAL, | |
232 | }, | |
233 | { | |
234 | .mmc = 2, | |
235 | .wires = 4, | |
236 | .gpio_cd = -EINVAL, | |
237 | .gpio_wp = -EINVAL, | |
238 | }, | |
239 | {} /* Terminator */ | |
240 | }; | |
241 | ||
242 | static int igep2_twl_gpio_setup(struct device *dev, | |
243 | unsigned gpio, unsigned ngpio) | |
244 | { | |
245 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | |
246 | mmc[0].gpio_cd = gpio + 0; | |
68ff0423 | 247 | omap2_hsmmc_init(mmc); |
58e11162 EBS |
248 | |
249 | /* link regulators to MMC adapters ... we "know" the | |
250 | * regulators will be set up only *after* we return. | |
251 | */ | |
252 | igep2_vmmc1_supply.dev = mmc[0].dev; | |
253 | ||
254 | return 0; | |
255 | }; | |
256 | ||
257 | static struct twl4030_gpio_platform_data igep2_gpio_data = { | |
258 | .gpio_base = OMAP_MAX_GPIO_LINES, | |
259 | .irq_base = TWL4030_GPIO_IRQ_BASE, | |
260 | .irq_end = TWL4030_GPIO_IRQ_END, | |
261 | .use_leds = false, | |
262 | .setup = igep2_twl_gpio_setup, | |
263 | }; | |
264 | ||
265 | static struct twl4030_usb_data igep2_usb_data = { | |
266 | .usb_mode = T2_USB_MODE_ULPI, | |
267 | }; | |
268 | ||
691de27f EBS |
269 | static int igep2_enable_dvi(struct omap_dss_device *dssdev) |
270 | { | |
271 | gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1); | |
272 | ||
273 | return 0; | |
274 | } | |
275 | ||
276 | static void igep2_disable_dvi(struct omap_dss_device *dssdev) | |
277 | { | |
278 | gpio_direction_output(IGEP2_GPIO_DVI_PUP, 0); | |
279 | } | |
280 | ||
281 | static struct omap_dss_device igep2_dvi_device = { | |
282 | .type = OMAP_DISPLAY_TYPE_DPI, | |
283 | .name = "dvi", | |
284 | .driver_name = "generic_panel", | |
285 | .phy.dpi.data_lines = 24, | |
286 | .platform_enable = igep2_enable_dvi, | |
287 | .platform_disable = igep2_disable_dvi, | |
288 | }; | |
289 | ||
290 | static struct omap_dss_device *igep2_dss_devices[] = { | |
291 | &igep2_dvi_device | |
292 | }; | |
293 | ||
294 | static struct omap_dss_board_info igep2_dss_data = { | |
295 | .num_devices = ARRAY_SIZE(igep2_dss_devices), | |
296 | .devices = igep2_dss_devices, | |
297 | .default_device = &igep2_dvi_device, | |
298 | }; | |
299 | ||
300 | static struct platform_device igep2_dss_device = { | |
301 | .name = "omapdss", | |
302 | .id = -1, | |
303 | .dev = { | |
304 | .platform_data = &igep2_dss_data, | |
305 | }, | |
306 | }; | |
307 | ||
308 | static struct regulator_consumer_supply igep2_vpll2_supply = { | |
309 | .supply = "vdds_dsi", | |
310 | .dev = &igep2_dss_device.dev, | |
311 | }; | |
312 | ||
313 | static struct regulator_init_data igep2_vpll2 = { | |
314 | .constraints = { | |
315 | .name = "VDVI", | |
316 | .min_uV = 1800000, | |
317 | .max_uV = 1800000, | |
318 | .apply_uV = true, | |
319 | .valid_modes_mask = REGULATOR_MODE_NORMAL | |
320 | | REGULATOR_MODE_STANDBY, | |
321 | .valid_ops_mask = REGULATOR_CHANGE_MODE | |
322 | | REGULATOR_CHANGE_STATUS, | |
323 | }, | |
324 | .num_consumer_supplies = 1, | |
325 | .consumer_supplies = &igep2_vpll2_supply, | |
326 | }; | |
327 | ||
328 | static void __init igep2_display_init(void) | |
329 | { | |
330 | if (gpio_request(IGEP2_GPIO_DVI_PUP, "GPIO_DVI_PUP") && | |
331 | gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1)) | |
332 | pr_err("IGEP v2: Could not obtain gpio GPIO_DVI_PUP\n"); | |
333 | } | |
334 | ||
335 | static struct platform_device *igep2_devices[] __initdata = { | |
336 | &igep2_dss_device, | |
337 | }; | |
338 | ||
58e11162 EBS |
339 | static void __init igep2_init_irq(void) |
340 | { | |
341 | omap_board_config = igep2_config; | |
342 | omap_board_config_size = ARRAY_SIZE(igep2_config); | |
343 | omap2_init_common_hw(NULL, NULL); | |
344 | omap_init_irq(); | |
345 | omap_gpio_init(); | |
346 | } | |
347 | ||
7f5f23da EBS |
348 | static struct twl4030_codec_audio_data igep2_audio_data = { |
349 | .audio_mclk = 26000000, | |
350 | }; | |
351 | ||
352 | static struct twl4030_codec_data igep2_codec_data = { | |
353 | .audio_mclk = 26000000, | |
354 | .audio = &igep2_audio_data, | |
355 | }; | |
356 | ||
58e11162 EBS |
357 | static struct twl4030_platform_data igep2_twldata = { |
358 | .irq_base = TWL4030_IRQ_BASE, | |
359 | .irq_end = TWL4030_IRQ_END, | |
360 | ||
361 | /* platform_data for children goes here */ | |
362 | .usb = &igep2_usb_data, | |
7f5f23da | 363 | .codec = &igep2_codec_data, |
58e11162 EBS |
364 | .gpio = &igep2_gpio_data, |
365 | .vmmc1 = &igep2_vmmc1, | |
691de27f | 366 | .vpll2 = &igep2_vpll2, |
58e11162 EBS |
367 | |
368 | }; | |
369 | ||
370 | static struct i2c_board_info __initdata igep2_i2c_boardinfo[] = { | |
371 | { | |
372 | I2C_BOARD_INFO("twl4030", 0x48), | |
373 | .flags = I2C_CLIENT_WAKE, | |
374 | .irq = INT_34XX_SYS_NIRQ, | |
375 | .platform_data = &igep2_twldata, | |
376 | }, | |
377 | }; | |
378 | ||
379 | static int __init igep2_i2c_init(void) | |
380 | { | |
381 | omap_register_i2c_bus(1, 2600, igep2_i2c_boardinfo, | |
382 | ARRAY_SIZE(igep2_i2c_boardinfo)); | |
383 | /* Bus 3 is attached to the DVI port where devices like the pico DLP | |
384 | * projector don't work reliably with 400kHz */ | |
385 | omap_register_i2c_bus(3, 100, NULL, 0); | |
386 | return 0; | |
387 | } | |
388 | ||
d0885486 EBS |
389 | static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = { |
390 | .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN, | |
391 | .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY, | |
392 | .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN, | |
393 | ||
394 | .phy_reset = true, | |
395 | .reset_gpio_port[0] = -EINVAL, | |
396 | .reset_gpio_port[1] = IGEP2_GPIO_USBH_NRESET, | |
397 | .reset_gpio_port[2] = -EINVAL, | |
398 | }; | |
399 | ||
ca5742bd TL |
400 | #ifdef CONFIG_OMAP_MUX |
401 | static struct omap_board_mux board_mux[] __initdata = { | |
402 | { .reg_offset = OMAP_MUX_TERMINATOR }, | |
403 | }; | |
404 | #else | |
405 | #define board_mux NULL | |
406 | #endif | |
407 | ||
58e11162 EBS |
408 | static void __init igep2_init(void) |
409 | { | |
ca5742bd | 410 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); |
58e11162 | 411 | igep2_i2c_init(); |
691de27f | 412 | platform_add_devices(igep2_devices, ARRAY_SIZE(igep2_devices)); |
58e11162 EBS |
413 | omap_serial_init(); |
414 | usb_musb_init(); | |
d0885486 | 415 | usb_ehci_init(&ehci_pdata); |
58e11162 | 416 | |
cddb483a | 417 | igep2_flash_init(); |
691de27f | 418 | igep2_display_init(); |
58e11162 EBS |
419 | igep2_init_smsc911x(); |
420 | ||
421 | /* GPIO userspace leds */ | |
422 | if ((gpio_request(IGEP2_GPIO_LED0_RED, "GPIO_LED0_RED") == 0) && | |
423 | (gpio_direction_output(IGEP2_GPIO_LED0_RED, 1) == 0)) { | |
424 | gpio_export(IGEP2_GPIO_LED0_RED, 0); | |
425 | gpio_set_value(IGEP2_GPIO_LED0_RED, 0); | |
426 | } else | |
427 | pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_RED\n"); | |
428 | ||
429 | if ((gpio_request(IGEP2_GPIO_LED0_GREEN, "GPIO_LED0_GREEN") == 0) && | |
430 | (gpio_direction_output(IGEP2_GPIO_LED0_GREEN, 1) == 0)) { | |
431 | gpio_export(IGEP2_GPIO_LED0_GREEN, 0); | |
432 | gpio_set_value(IGEP2_GPIO_LED0_GREEN, 0); | |
433 | } else | |
434 | pr_warning("IGEP v2: Could not obtain gpio GPIO_LED0_GREEN\n"); | |
435 | ||
436 | if ((gpio_request(IGEP2_GPIO_LED1_RED, "GPIO_LED1_RED") == 0) && | |
437 | (gpio_direction_output(IGEP2_GPIO_LED1_RED, 1) == 0)) { | |
438 | gpio_export(IGEP2_GPIO_LED1_RED, 0); | |
439 | gpio_set_value(IGEP2_GPIO_LED1_RED, 0); | |
440 | } else | |
441 | pr_warning("IGEP v2: Could not obtain gpio GPIO_LED1_RED\n"); | |
442 | } | |
443 | ||
444 | static void __init igep2_map_io(void) | |
445 | { | |
446 | omap2_set_globals_343x(); | |
6fbd55d0 | 447 | omap34xx_map_common_io(); |
58e11162 EBS |
448 | } |
449 | ||
450 | MACHINE_START(IGEP0020, "IGEP v2 board") | |
451 | .phys_io = 0x48000000, | |
452 | .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc, | |
453 | .boot_params = 0x80000100, | |
454 | .map_io = igep2_map_io, | |
455 | .init_irq = igep2_init_irq, | |
456 | .init_machine = igep2_init, | |
457 | .timer = &omap_timer, | |
458 | MACHINE_END |